Lines Matching +full:rx +full:- +full:tx
3 /*-
71 r92ce_iq_calib_chain(struct rtwn_softc *sc, int chain, uint16_t tx[2], in r92ce_iq_calib_chain()
72 uint16_t rx[2]) in r92ce_iq_calib_chain()
82 if (sc->ntxchains > 1) { in r92ce_iq_calib_chain()
111 return (0); /* Tx failed. */ in r92ce_iq_calib_chain()
112 /* Read Tx IQ calibration results. */ in r92ce_iq_calib_chain()
113 tx[0] = MS(rtwn_bb_read(sc, R92C_TX_POWER_IQK_BEFORE(chain)), in r92ce_iq_calib_chain()
115 tx[1] = MS(rtwn_bb_read(sc, R92C_TX_POWER_IQK_AFTER(chain)), in r92ce_iq_calib_chain()
117 if (tx[0] == 0x142 || tx[1] == 0x042) in r92ce_iq_calib_chain()
118 return (0); /* Tx failed. */ in r92ce_iq_calib_chain()
121 return (1); /* Rx failed. */ in r92ce_iq_calib_chain()
122 /* Read Rx IQ calibration results. */ in r92ce_iq_calib_chain()
123 rx[0] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_BEFORE(chain)), in r92ce_iq_calib_chain()
125 rx[1] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_AFTER(chain)), in r92ce_iq_calib_chain()
127 if (rx[0] == 0x132 || rx[1] == 0x036) in r92ce_iq_calib_chain()
128 return (1); /* Rx failed. */ in r92ce_iq_calib_chain()
130 return (3); /* Both Tx and Rx succeeded. */ in r92ce_iq_calib_chain()
134 r92ce_iq_calib_run(struct rtwn_softc *sc, int n, uint16_t tx[2][2], in r92ce_iq_calib_run()
135 uint16_t rx[2][2], struct r92ce_iq_cal_reg_vals *vals) in r92ce_iq_calib_run()
149 vals->adda[i] = rtwn_bb_read(sc, reg_adda[i]); in r92ce_iq_calib_run()
151 vals->txpause = rtwn_read_1(sc, R92C_TXPAUSE); in r92ce_iq_calib_run()
152 vals->bcn_ctrl[0] = rtwn_read_1(sc, R92C_BCN_CTRL(0)); in r92ce_iq_calib_run()
153 vals->bcn_ctrl[1] = rtwn_read_1(sc, R92C_BCN_CTRL(1)); in r92ce_iq_calib_run()
154 vals->gpio_muxcfg = rtwn_read_4(sc, R92C_GPIO_MUXCFG); in r92ce_iq_calib_run()
157 if (sc->ntxchains == 1) { in r92ce_iq_calib_run()
175 vals->ofdm0_trxpathena = in r92ce_iq_calib_run()
177 vals->ofdm0_trmuxpar = rtwn_bb_read(sc, R92C_OFDM0_TRMUXPAR); in r92ce_iq_calib_run()
178 vals->fpga0_rfifacesw1 = in r92ce_iq_calib_run()
185 if (sc->ntxchains > 1) { in r92ce_iq_calib_run()
193 vals->bcn_ctrl[0] & ~R92C_BCN_CTRL_EN_BCN); in r92ce_iq_calib_run()
195 vals->bcn_ctrl[1] & ~R92C_BCN_CTRL_EN_BCN); in r92ce_iq_calib_run()
197 vals->gpio_muxcfg & ~R92C_GPIO_MUXCFG_ENBT); in r92ce_iq_calib_run()
200 if (sc->ntxchains > 1) in r92ce_iq_calib_run()
209 for (chain = 0; chain < sc->ntxchains; chain++) { in r92ce_iq_calib_run()
226 tx[chain], rx[chain]); in r92ce_iq_calib_run()
229 "%s: chain %d: Tx failed.\n", in r92ce_iq_calib_run()
231 tx[chain][0] = 0xff; in r92ce_iq_calib_run()
232 tx[chain][1] = 0xff; in r92ce_iq_calib_run()
233 rx[chain][0] = 0xff; in r92ce_iq_calib_run()
234 rx[chain][1] = 0xff; in r92ce_iq_calib_run()
237 "%s: chain %d: Rx failed.\n", in r92ce_iq_calib_run()
239 rx[chain][0] = 0xff; in r92ce_iq_calib_run()
240 rx[chain][1] = 0xff; in r92ce_iq_calib_run()
243 "%s: chain %d: Both Tx and Rx " in r92ce_iq_calib_run()
249 "%s: results for run %d chain %d: tx[0] 0x%x, " in r92ce_iq_calib_run()
250 "tx[1] 0x%x, rx[0] 0x%x, rx[1] 0x%x\n", __func__, n, chain, in r92ce_iq_calib_run()
251 tx[chain][0], tx[chain][1], rx[chain][0], rx[chain][1]); in r92ce_iq_calib_run()
255 vals->ofdm0_trxpathena); in r92ce_iq_calib_run()
257 vals->fpga0_rfifacesw1); in r92ce_iq_calib_run()
258 rtwn_bb_write(sc, R92C_OFDM0_TRMUXPAR, vals->ofdm0_trmuxpar); in r92ce_iq_calib_run()
262 if (sc->ntxchains > 1) in r92ce_iq_calib_run()
272 rtwn_bb_write(sc, reg_adda[i], vals->adda[i]); in r92ce_iq_calib_run()
274 rtwn_write_1(sc, R92C_TXPAUSE, vals->txpause); in r92ce_iq_calib_run()
275 rtwn_write_1(sc, R92C_BCN_CTRL(0), vals->bcn_ctrl[0]); in r92ce_iq_calib_run()
276 rtwn_write_1(sc, R92C_BCN_CTRL(1), vals->bcn_ctrl[1]); in r92ce_iq_calib_run()
277 rtwn_write_4(sc, R92C_GPIO_MUXCFG, vals->gpio_muxcfg); in r92ce_iq_calib_run()
289 for (chain = 0; chain < sc->ntxchains; chain++) { in r92ce_iq_calib_compare_results()
295 tx_ok[chain] = (abs(tx1[chain][i] - tx2[chain][i]) <= in r92ce_iq_calib_compare_results()
298 rx_ok[chain] = (abs(rx1[chain][i] - rx2[chain][i]) <= in r92ce_iq_calib_compare_results()
303 if (sc->ntxchains > 1) in r92ce_iq_calib_compare_results()
311 r92ce_iq_calib_write_results(struct rtwn_softc *sc, uint16_t tx[2], in r92ce_iq_calib_write_results()
312 uint16_t rx[2], int chain) in r92ce_iq_calib_write_results()
317 if (tx[0] == 0xff || tx[1] == 0xff) in r92ce_iq_calib_write_results()
322 x = tx[0]; in r92ce_iq_calib_write_results()
330 y = tx[1]; in r92ce_iq_calib_write_results()
341 if (rx[0] == 0xff || rx[1] == 0xff) in r92ce_iq_calib_write_results()
345 rx[0] & 0x3ff); in r92ce_iq_calib_write_results()
347 (rx[1] & 0x3f) << 10); in r92ce_iq_calib_write_results()
351 (rx[1] & 0x3c0) << 22); in r92ce_iq_calib_write_results()
354 (rx[1] & 0x3c0) << 6); in r92ce_iq_calib_write_results()
363 uint16_t tx[RTWN_IQ_CAL_NRUN][2][2], rx[RTWN_IQ_CAL_NRUN][2][2]; in r92ce_iq_calib() local
368 r92ce_iq_calib_run(sc, n, tx[n], rx[n], &vals); in r92ce_iq_calib()
374 valid = r92ce_iq_calib_compare_results(sc, tx[n - 1], in r92ce_iq_calib()
375 rx[n - 1], tx[n], rx[n]); in r92ce_iq_calib()
381 r92ce_iq_calib_write_results(sc, tx[n][0], rx[n][0], 0); in r92ce_iq_calib()
382 if (sc->ntxchains > 1) in r92ce_iq_calib()
383 r92ce_iq_calib_write_results(sc, tx[n][1], rx[n][1], 1); in r92ce_iq_calib()