Lines Matching +full:4 +full:- +full:ring
2 /*-
20 /*-
70 if (sc->sc_debug > 0) \
74 if (sc->sc_debug >= (n)) \
204 struct ieee80211com *ic = &sc->sc_ic;
208 sc->sc_id = id;
209 sc->sc_dev = dev;
211 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
214 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
215 mbufq_init(&sc->sc_snd, ifqmaxlen);
224 device_printf(sc->sc_dev,
231 rt2661_read_eeprom(sc, ic->ic_macaddr);
234 rt2661_get_rf(sc->rf_rev));
239 for (ac = 0; ac < 4; ac++) {
240 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
243 device_printf(sc->sc_dev,
244 "could not allocate Tx ring %d\n", ac);
249 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
251 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
255 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
257 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
261 ic->ic_softc = sc;
262 ic->ic_name = device_get_nameunit(dev);
263 ic->ic_opmode = IEEE80211_M_STA;
264 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
267 ic->ic_caps =
273 | IEEE80211_C_WDS /* 4-address traffic works */
285 rt2661_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
286 ic->ic_channels);
290 ic->ic_wme.wme_update = rt2661_wme_update;
292 ic->ic_scan_start = rt2661_scan_start;
293 ic->ic_scan_end = rt2661_scan_end;
294 ic->ic_getradiocaps = rt2661_getradiocaps;
295 ic->ic_set_channel = rt2661_set_channel;
296 ic->ic_updateslot = rt2661_update_slot;
297 ic->ic_update_promisc = rt2661_update_promisc;
298 ic->ic_raw_xmit = rt2661_raw_xmit;
299 ic->ic_transmit = rt2661_transmit;
300 ic->ic_parent = rt2661_parent;
301 ic->ic_vap_create = rt2661_vap_create;
302 ic->ic_vap_delete = rt2661_vap_delete;
305 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
307 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
313 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
320 fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
321 fail2: while (--ac >= 0)
322 rt2661_free_tx_ring(sc, &sc->txq[ac]);
323 fail1: mtx_destroy(&sc->sc_mtx);
331 struct ieee80211com *ic = &sc->sc_ic;
338 mbufq_drain(&sc->sc_snd);
340 rt2661_free_tx_ring(sc, &sc->txq[0]);
341 rt2661_free_tx_ring(sc, &sc->txq[1]);
342 rt2661_free_tx_ring(sc, &sc->txq[2]);
343 rt2661_free_tx_ring(sc, &sc->txq[3]);
344 rt2661_free_tx_ring(sc, &sc->mgtq);
345 rt2661_free_rx_ring(sc, &sc->rxq);
347 mtx_destroy(&sc->sc_mtx);
358 struct rt2661_softc *sc = ic->ic_softc;
370 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
371 device_printf(sc->sc_dev, "only 1 vap supported\n");
378 if (TAILQ_EMPTY(&ic->ic_vaps) ||
379 ic->ic_opmode != IEEE80211_M_HOSTAP) {
380 device_printf(sc->sc_dev,
392 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
396 vap = &rvp->ral_vap;
400 rvp->ral_newstate = vap->iv_newstate;
401 vap->iv_newstate = rt2661_newstate;
403 vap->iv_update_beacon = rt2661_beacon_update;
410 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
411 ic->ic_opmode = opmode;
446 if (sc->sc_ic.ic_nrunning > 0)
462 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
467 ring->count = count;
468 ring->queued = 0;
469 ring->cur = ring->next = ring->stat = 0;
471 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
474 0, NULL, NULL, &ring->desc_dmat);
476 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
480 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
481 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
483 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
487 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
488 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
491 device_printf(sc->sc_dev, "could not load desc DMA map\n");
495 ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
497 if (ring->data == NULL) {
498 device_printf(sc->sc_dev, "could not allocate soft data\n");
503 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
505 RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
507 device_printf(sc->sc_dev, "could not create data DMA tag\n");
512 error = bus_dmamap_create(ring->data_dmat, 0,
513 &ring->data[i].map);
515 device_printf(sc->sc_dev, "could not create DMA map\n");
522 fail: rt2661_free_tx_ring(sc, ring);
527 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
533 for (i = 0; i < ring->count; i++) {
534 desc = &ring->desc[i];
535 data = &ring->data[i];
537 if (data->m != NULL) {
538 bus_dmamap_sync(ring->data_dmat, data->map,
540 bus_dmamap_unload(ring->data_dmat, data->map);
541 m_freem(data->m);
542 data->m = NULL;
545 if (data->ni != NULL) {
546 ieee80211_free_node(data->ni);
547 data->ni = NULL;
550 desc->flags = 0;
553 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
555 ring->queued = 0;
556 ring->cur = ring->next = ring->stat = 0;
560 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
565 if (ring->desc != NULL) {
566 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
568 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
569 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
572 if (ring->desc_dmat != NULL)
573 bus_dma_tag_destroy(ring->desc_dmat);
575 if (ring->data != NULL) {
576 for (i = 0; i < ring->count; i++) {
577 data = &ring->data[i];
579 if (data->m != NULL) {
580 bus_dmamap_sync(ring->data_dmat, data->map,
582 bus_dmamap_unload(ring->data_dmat, data->map);
583 m_freem(data->m);
586 if (data->ni != NULL)
587 ieee80211_free_node(data->ni);
589 if (data->map != NULL)
590 bus_dmamap_destroy(ring->data_dmat, data->map);
593 free(ring->data, M_DEVBUF);
596 if (ring->data_dmat != NULL)
597 bus_dma_tag_destroy(ring->data_dmat);
601 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
609 ring->count = count;
610 ring->cur = ring->next = 0;
612 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
615 0, NULL, NULL, &ring->desc_dmat);
617 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
621 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
622 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
624 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
628 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
629 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
632 device_printf(sc->sc_dev, "could not load desc DMA map\n");
636 ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
638 if (ring->data == NULL) {
639 device_printf(sc->sc_dev, "could not allocate soft data\n");
645 * Pre-allocate Rx buffers and populate Rx ring.
647 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
649 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
651 device_printf(sc->sc_dev, "could not create data DMA tag\n");
656 desc = &sc->rxq.desc[i];
657 data = &sc->rxq.data[i];
659 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
661 device_printf(sc->sc_dev, "could not create DMA map\n");
665 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
666 if (data->m == NULL) {
667 device_printf(sc->sc_dev,
673 error = bus_dmamap_load(ring->data_dmat, data->map,
674 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
677 device_printf(sc->sc_dev,
682 desc->flags = htole32(RT2661_RX_BUSY);
683 desc->physaddr = htole32(physaddr);
686 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
690 fail: rt2661_free_rx_ring(sc, ring);
695 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
699 for (i = 0; i < ring->count; i++)
700 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
702 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
704 ring->cur = ring->next = 0;
708 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
713 if (ring->desc != NULL) {
714 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
716 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
717 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
720 if (ring->desc_dmat != NULL)
721 bus_dma_tag_destroy(ring->desc_dmat);
723 if (ring->data != NULL) {
724 for (i = 0; i < ring->count; i++) {
725 data = &ring->data[i];
727 if (data->m != NULL) {
728 bus_dmamap_sync(ring->data_dmat, data->map,
730 bus_dmamap_unload(ring->data_dmat, data->map);
731 m_freem(data->m);
734 if (data->map != NULL)
735 bus_dmamap_destroy(ring->data_dmat, data->map);
738 free(ring->data, M_DEVBUF);
741 if (ring->data_dmat != NULL)
742 bus_dma_tag_destroy(ring->data_dmat);
749 struct ieee80211com *ic = vap->iv_ic;
750 struct rt2661_softc *sc = ic->ic_softc;
753 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
761 error = rvp->ral_newstate(vap, nstate, arg);
764 struct ieee80211_node *ni = vap->iv_bss;
766 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
769 rt2661_set_basicrates(sc, &ni->ni_rates);
770 rt2661_set_bssid(sc, ni->ni_bssid);
773 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
774 vap->iv_opmode == IEEE80211_M_IBSS ||
775 vap->iv_opmode == IEEE80211_M_MBSS) {
780 if (vap->iv_opmode != IEEE80211_M_MONITOR)
816 /* write address (A5-A0 or A7-A0) */
818 for (; n >= 0; n--) {
827 /* read data Q15-Q0 */
829 for (n = 15; n >= 0; n--) {
849 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
855 txs->flags = IEEE80211_RATECTL_TX_FAIL_LONG;
866 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
869 data = &txq->data[txq->stat];
870 m = data->m;
871 data->m = NULL;
872 ni = data->ni;
873 data->ni = NULL;
881 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
882 txs->long_retries = RT2661_TX_RETRYCNT(val);
885 "%d retries\n", txs->long_retries);
886 if (data->rix != IEEE80211_FIXED_RATE_NONE)
892 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
893 txs->long_retries = RT2661_TX_RETRYCNT(val);
897 if (data->rix != IEEE80211_FIXED_RATE_NONE)
904 device_printf(sc->sc_dev,
909 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
911 txq->queued--;
912 if (++txq->stat >= txq->count) /* faster than % count */
913 txq->stat = 0;
918 sc->sc_tx_timer = 0;
929 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
932 desc = &txq->desc[txq->next];
933 data = &txq->data[txq->next];
935 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
936 !(le32toh(desc->flags) & RT2661_TX_VALID))
939 bus_dmamap_sync(txq->data_dmat, data->map,
941 bus_dmamap_unload(txq->data_dmat, data->map);
944 desc->flags &= ~htole32(RT2661_TX_VALID);
946 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
948 if (++txq->next >= txq->count) /* faster than % count */
949 txq->next = 0;
952 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
958 struct ieee80211com *ic = &sc->sc_ic;
967 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
973 desc = &sc->rxq.desc[sc->rxq.cur];
974 data = &sc->rxq.data[sc->rxq.cur];
976 if (le32toh(desc->flags) & RT2661_RX_BUSY)
979 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
980 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
986 le32toh(desc->flags));
987 counter_u64_add(ic->ic_ierrors, 1);
991 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
992 counter_u64_add(ic->ic_ierrors, 1);
997 * Try to allocate a new mbuf for this ring element and load it
998 * before processing the current mbuf. If the ring element
1005 counter_u64_add(ic->ic_ierrors, 1);
1009 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1011 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1013 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1020 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1021 mtod(data->m, void *), MCLBYTES,
1026 device_get_name(sc->sc_dev));
1028 counter_u64_add(ic->ic_ierrors, 1);
1033 * New mbuf successfully loaded, update Rx ring and continue
1036 m = data->m;
1037 data->m = mnew;
1038 desc->physaddr = htole32(physaddr);
1041 m->m_pkthdr.len = m->m_len =
1042 (le32toh(desc->flags) >> 16) & 0xfff;
1044 rssi = rt2661_get_rssi(sc, desc->rssi);
1047 rssi = -30; /* XXX ignored by net80211 */
1051 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1058 tap->wr_tsf =
1060 tap->wr_flags = 0;
1061 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1062 (desc->flags & htole32(RT2661_RX_OFDM)) ?
1064 tap->wr_antsignal = nf + rssi;
1065 tap->wr_antnoise = nf;
1067 sc->sc_flags |= RAL_INPUT_RUNNING;
1081 sc->sc_flags &= ~RAL_INPUT_RUNNING;
1083 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1085 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1087 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1090 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1133 /* don't re-enable interrupts if we're shutting down */
1134 if (!(sc->sc_flags & RAL_RUNNING)) {
1146 rt2661_tx_dma_intr(sc, &sc->mgtq);
1152 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1155 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1158 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1161 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1175 /* re-enable MAC and MCU interrupts */
1186 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1196 /* CCK rates (NB: not IEEE std, device-specific) */
1198 case 4: return 0x1;
1210 struct ieee80211com *ic = &sc->sc_ic;
1214 desc->flags = htole32(flags);
1215 desc->flags |= htole32(len << 16);
1216 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1218 desc->xflags = htole16(xflags);
1219 desc->xflags |= htole16(nsegs << 13);
1221 desc->wme = htole16(
1224 RT2661_LOGCWMIN(4) |
1232 desc->qid = ac;
1235 desc->plcp_signal = rt2661_plcp_signal(rate);
1236 desc->plcp_service = 4;
1239 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1240 desc->flags |= htole32(RT2661_TX_OFDM);
1243 desc->plcp_length_hi = plcp_length >> 6;
1244 desc->plcp_length_lo = plcp_length & 0x3f;
1250 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1252 desc->plcp_length_hi = plcp_length >> 8;
1253 desc->plcp_length_lo = plcp_length & 0xff;
1255 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1256 desc->plcp_signal |= 0x08;
1261 desc->addr[i] = htole32(segs[i].ds_addr);
1262 desc->len [i] = htole16(segs[i].ds_len);
1270 struct ieee80211vap *vap = ni->ni_vap;
1271 struct ieee80211com *ic = ni->ni_ic;
1281 desc = &sc->mgtq.desc[sc->mgtq.cur];
1282 data = &sc->mgtq.data[sc->mgtq.cur];
1284 rate = ni->ni_txparms->mgmtrate;
1288 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1296 error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
1299 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1306 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1308 tap->wt_flags = 0;
1309 tap->wt_rate = rate;
1314 data->m = m0;
1315 data->ni = ni;
1317 data->rix = IEEE80211_FIXED_RATE_NONE;
1321 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1324 dur = ieee80211_ack_duration(ic->ic_rt,
1325 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1326 *(uint16_t *)wh->i_dur = htole16(dur);
1334 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1336 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1337 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1341 m0->m_pkthdr.len, sc->mgtq.cur, rate);
1344 sc->mgtq.queued++;
1345 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1355 struct ieee80211com *ic = ni->ni_ic;
1356 struct rt2661_tx_ring *txq = &sc->txq[ac];
1366 if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, 1);
1367 device_printf(sc->sc_dev,
1372 data = &txq->data[txq->cur];
1373 desc = &txq->desc[txq->cur];
1375 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1378 device_printf(sc->sc_dev,
1384 data->m = mprot;
1385 data->ni = ieee80211_ref_node(ni);
1387 data->rix = IEEE80211_FIXED_RATE_NONE;
1389 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1394 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1397 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1398 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1400 txq->queued++;
1401 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1410 struct ieee80211vap *vap = ni->ni_vap;
1411 struct ieee80211com *ic = &sc->sc_ic;
1412 struct rt2661_tx_ring *txq = &sc->txq[ac];
1416 const struct ieee80211_txparam *tp = ni->ni_txparms;
1426 if (m0->m_flags & M_EAPOL) {
1427 rate = tp->mgmtrate;
1428 } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1429 rate = tp->mcastrate;
1430 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1431 rate = tp->ucastrate;
1434 rate = ni->ni_txrate;
1438 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS_DATA)
1441 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1453 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1455 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1457 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1458 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1459 prot = ic->ic_protmode;
1470 data = &txq->data[txq->cur];
1471 desc = &txq->desc[txq->cur];
1473 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
1476 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1484 device_printf(sc->sc_dev,
1491 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
1494 device_printf(sc->sc_dev,
1505 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1507 tap->wt_flags = 0;
1508 tap->wt_rate = rate;
1513 data->m = m0;
1514 data->ni = ni;
1517 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1518 data->rix = ni->ni_txrate;
1520 data->rssi = ic->ic_node_getrssi(ni);
1522 data->rix = IEEE80211_FIXED_RATE_NONE;
1524 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1527 dur = ieee80211_ack_duration(ic->ic_rt,
1528 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1529 *(uint16_t *)wh->i_dur = htole16(dur);
1532 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1535 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1536 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1539 m0->m_pkthdr.len, txq->cur, rate);
1542 txq->queued++;
1543 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1552 struct rt2661_softc *sc = ic->ic_softc;
1556 if ((sc->sc_flags & RAL_RUNNING) == 0) {
1560 error = mbufq_enqueue(&sc->sc_snd, m);
1581 if (!(sc->sc_flags & RAL_RUNNING) || sc->sc_invalid)
1584 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1586 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1587 /* there is no place left in this ring */
1588 mbufq_prepend(&sc->sc_snd, m);
1591 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1593 if_inc_counter(ni->ni_vap->iv_ifp,
1598 sc->sc_tx_timer = 5;
1606 struct ieee80211com *ic = ni->ni_ic;
1607 struct rt2661_softc *sc = ic->ic_softc;
1612 if (!(sc->sc_flags & RAL_RUNNING)) {
1617 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1630 sc->sc_tx_timer = 5;
1647 KASSERT(sc->sc_flags & RAL_RUNNING, ("not running"));
1649 if (sc->sc_invalid) /* card ejected */
1652 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1653 device_printf(sc->sc_dev, "device timeout\n");
1655 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
1659 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
1665 struct rt2661_softc *sc = ic->ic_softc;
1669 if (ic->ic_nrunning > 0) {
1670 if ((sc->sc_flags & RAL_RUNNING) == 0) {
1675 } else if (sc->sc_flags & RAL_RUNNING)
1694 device_printf(sc->sc_dev, "could not write to BBP\n");
1701 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1716 device_printf(sc->sc_dev, "could not read from BBP\n");
1730 device_printf(sc->sc_dev, "could not read from BBP\n");
1746 device_printf(sc->sc_dev, "could not write to RF\n");
1755 sc->rf_regs[reg] = val;
1757 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1780 bbp4 = rt2661_bbp_read(sc, 4);
1789 rt2661_bbp_write(sc, 4, bbp4);
1797 * Enable multi-rate retries for frames sent at OFDM rates.
1803 struct ieee80211com *ic = &sc->sc_ic;
1809 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1819 struct ieee80211com *ic = &sc->sc_ic;
1825 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1835 struct ieee80211com *ic = &sc->sc_ic;
1840 for (i = 0; i < rs->rs_nrates; i++) {
1841 rate = rs->rs_rates[i];
1846 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,
1872 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1873 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1881 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1882 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1904 struct ieee80211com *ic = &sc->sc_ic;
1914 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
1919 power = sc->txpow[i];
1924 bbp94 += power - 31;
1930 * vice-versa, BBP registers need to be reprogrammed.
1932 if (c->ic_flags != sc->sc_curchan->ic_flags) {
1936 sc->sc_curchan = c;
1941 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
1948 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
1955 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
1957 /* enable smart mode for MIMO-capable RFs */
1961 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
1982 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
1994 tmp = addr[4] | addr[5] << 8;
2001 struct rt2661_softc *sc = ic->ic_softc;
2007 if (ic->ic_promisc == 0)
2013 (ic->ic_promisc > 0) ? "entering" : "leaving");
2017 * Update QoS (802.11e) settings for each h/w Tx ring.
2022 struct rt2661_softc *sc = ic->ic_softc;
2045 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2052 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2059 wmep[WME_AC_VI].wmep_aifsn << 4 |
2068 struct rt2661_softc *sc = ic->ic_softc;
2107 macaddr[4] = val & 0xff;
2112 sc->rf_rev = (val >> 11) & 0x1f;
2113 sc->hw_radio = (val >> 10) & 0x1;
2114 sc->rx_ant = (val >> 4) & 0x3;
2115 sc->tx_ant = (val >> 2) & 0x3;
2116 sc->nb_ant = val & 0x3;
2118 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2121 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2122 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2125 sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2129 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2131 /* Only [-10, 10] is valid */
2132 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2133 sc->rssi_2ghz_corr = 0;
2137 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2139 /* Only [-10, 10] is valid */
2140 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2141 sc->rssi_5ghz_corr = 0;
2143 /* adjust RSSI correction for external low-noise amplifier */
2144 if (sc->ext_2ghz_lna)
2145 sc->rssi_2ghz_corr -= 14;
2146 if (sc->ext_5ghz_lna)
2147 sc->rssi_5ghz_corr -= 14;
2150 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2154 sc->rfprog = (val >> 8) & 0x3;
2156 sc->rffreq = val & 0xff;
2158 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2163 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2165 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2166 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2168 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2171 /* read vendor-specific BBP values */
2176 sc->bbp_prom[i].reg = val >> 8;
2177 sc->bbp_prom[i].val = val & 0xff;
2178 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2179 sc->bbp_prom[i].val);
2197 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2207 /* write vendor-specific BBP values (from EEPROM) */
2209 if (sc->bbp_prom[i].reg == 0)
2211 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2220 struct ieee80211com *ic = &sc->sc_ic;
2221 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2227 if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2230 device_printf(sc->sc_dev,
2235 sc->sc_flags |= RAL_FW_LOADED;
2241 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2242 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2243 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2244 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2246 /* initialize Mgt ring */
2247 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2249 /* initialize Rx ring */
2250 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2261 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2273 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2276 /* load base address of Rx ring */
2283 rt2661_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
2307 sc->sc_curchan = ic->ic_curchan;
2308 rt2661_select_band(sc, sc->sc_curchan);
2310 rt2661_set_chan(sc, sc->sc_curchan);
2316 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2319 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2320 ic->ic_opmode != IEEE80211_M_MBSS)
2322 if (ic->ic_promisc == 0)
2332 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2344 sc->sc_flags |= RAL_RUNNING;
2346 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2353 struct ieee80211com *ic = &sc->sc_ic;
2359 if (sc->sc_flags & RAL_RUNNING)
2366 volatile int *flags = &sc->sc_flags;
2370 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2372 callout_stop(&sc->watchdog_ch);
2373 sc->sc_tx_timer = 0;
2375 if (sc->sc_flags & RAL_RUNNING) {
2376 sc->sc_flags &= ~RAL_RUNNING;
2398 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2399 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2400 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2401 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2402 rt2661_reset_tx_ring(sc, &sc->mgtq);
2403 rt2661_reset_rx_ring(sc, &sc->rxq);
2426 switch (sc->sc_id) {
2431 device_printf(sc->sc_dev, "%s: unexpected pci device id 0x%x, "
2433 __func__, sc->sc_id);
2440 device_printf(sc->sc_dev,
2459 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2472 device_printf(sc->sc_dev,
2497 * external low-noise amplifier.
2500 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2502 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2503 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2510 if (dbm >= -35) {
2512 } else if (dbm >= -58) {
2514 } else if (dbm >= -66) {
2516 } else if (dbm >= -74) {
2519 /* RSSI < -74dBm, tune using false CCA count */
2521 bbp17 = sc->bbp17; /* current value */
2523 hi -= 2 * (-74 - dbm);
2534 if (--bbp17 < lo)
2539 if (bbp17 != sc->bbp17) {
2541 sc->bbp17 = bbp17;
2563 sc->bbp18 = rt2661_bbp_read(sc, 18);
2564 sc->bbp21 = rt2661_bbp_read(sc, 21);
2565 sc->bbp22 = rt2661_bbp_read(sc, 22);
2566 sc->bbp16 = rt2661_bbp_read(sc, 16);
2567 sc->bbp17 = rt2661_bbp_read(sc, 17);
2568 sc->bbp64 = rt2661_bbp_read(sc, 64);
2574 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2590 rt2661_bbp_write(sc, 16, sc->bbp16);
2591 rt2661_bbp_write(sc, 17, sc->bbp17);
2592 rt2661_bbp_write(sc, 18, sc->bbp18);
2593 rt2661_bbp_write(sc, 21, sc->bbp21);
2594 rt2661_bbp_write(sc, 22, sc->bbp22);
2595 rt2661_bbp_write(sc, 64, sc->bbp64);
2604 struct ieee80211com *ic = vap->iv_ic;
2609 if ((m0 = ieee80211_beacon_alloc(vap->iv_bss))== NULL) {
2610 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2615 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2618 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2625 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2639 struct ieee80211com *ic = &sc->sc_ic;
2640 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2643 if (vap->iv_opmode != IEEE80211_M_STA) {
2654 tmp |= vap->iv_bss->ni_intval * 16;
2657 if (vap->iv_opmode == IEEE80211_M_STA)
2690 * NB: Since RSSI is relative to noise floor, -1 is
2693 return -1;
2696 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2698 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2699 rssi += sc->rssi_2ghz_corr;
2702 rssi -= 64;
2704 rssi -= 74;
2706 rssi -= 90;
2708 rssi += sc->rssi_5ghz_corr;
2711 rssi -= 64;
2713 rssi -= 86;
2715 rssi -= 100;
2723 struct rt2661_softc *sc = ic->ic_softc;
2735 struct rt2661_softc *sc = ic->ic_softc;
2736 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2740 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2747 struct rt2661_softc *sc = ic->ic_softc;
2755 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
2765 struct rt2661_softc *sc = ic->ic_softc;
2768 rt2661_set_chan(sc, ic->ic_curchan);