Lines Matching +full:pci +full:- +full:domain
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
35 /* some PCI bus constants */
37 #define PCI_MAXMAPS_1 2 /* max. no. of maps for PCI to PCI bridge */
42 /* Config registers for PCI-PCI and PCI-Cardbus bridges. */
51 /* Interesting values for PCI power management */
53 uint16_t pp_cap; /* PCI power management capabilities */
89 /* Interesting values for PCI MSI */
100 /* Interesting values for PCI MSI-X */
108 u_int mte_vector; /* 1-based index into msix_vectors array. */
115 uint8_t msix_location; /* Offset of MSI-X capability registers. */
135 uint8_t ht_slave; /* Non-zero if device is an HT slave. */
141 /* Interesting values for PCI-express */
143 uint8_t pcie_location; /* Offset of PCI-e capability registers. */
157 uint8_t pcix_location; /* Offset of PCI-X capability registers. */
178 #define PCICFG_VF 0x0001 /* Device is an SR-IOV Virtual Function */
191 uint16_t cmdreg; /* disable/enable chip and PCI options */
192 uint16_t statreg; /* supported PCI features and error state */
194 uint8_t baseclass; /* chip PCI class */
195 uint8_t subclass; /* chip PCI subclass */
196 uint8_t progif; /* chip PCI programming interface */
201 uint8_t intpin; /* PCI interrupt pin */
208 uint8_t mfdev; /* multi-function device (from hdrtype reg) */
209 uint8_t nummaps; /* actual number of PCI maps used */
211 uint32_t domain; /* PCI domain */ member
221 struct pcicfg_msi msi; /* PCI MSI */
222 struct pcicfg_msix msix; /* PCI MSI-X */
224 struct pcicfg_pcie pcie; /* PCI Express */
225 struct pcicfg_pcix pcix; /* PCI-X */
226 struct pcicfg_iov *iov; /* SR-IOV */
227 struct pcicfg_vf vf; /* SR-IOV Virtual Function */
231 /* additional type 1 device config header information (PCI to PCI bridge) */
270 * modules with devices on the PCI bus.
324 MODULE_PNP_INFO(PCI_PNP_STR, pci, table, table, \
371 * Simplified accessors for pci devices
374 __BUS_ACCESSOR(pci, var, PCI, ivar, type)
387 PCI_ACCESSOR(domain, DOMAIN, uint32_t) in PCI_ACCESSOR()
416 * Ivars for pci bridges.
428 PCIB_ACCESSOR(domain, DOMAIN, uint32_t) in PCIB_ACCESSOR() argument
434 * PCI interrupt validation. Invalid interrupt values such as 0 or 128 in PCIB_ACCESSOR()
502 * PCI power states are as defined by ACPI:
506 * D1 Class-specific low-power state in which device context may or may not
509 * D2 Class-specific low-power state in which device context may or may
520 #define PCI_POWERSTATE_UNKNOWN -1
674 /* Can be used by drivers to manage the MSI-X table. */
705 * cdev switch for control device, initialised in generic PCI code
710 * List of all PCI devices, generation count for the list.
732 * Global eventhandlers invoked when PCI devices are added or removed