Lines Matching +full:dma +full:- +full:queues

46 /* XXX: Currently multi-queue can be used on the Tx side only */
53 #if MVNETA_TX_QNUM_MAX & (MVNETA_TX_QNUM_MAX - 1) != 0
56 #if MVNETA_RX_QNUM_MAX & (MVNETA_RX_QNUM_MAX - 1) != 0
62 #define MVNETA_TX_QUEUE_ALL ((1<<MVNETA_TX_QNUM_MAX)-1)
63 #define MVNETA_RX_QUEUE_ALL ((1<<MVNETA_RX_QNUM_MAX)-1)
99 /* Rx DMA Hardware Parser Registers */
117 /* Rx DMA Miscellaneous Registers */
123 /* Rx DMA Networking Controller Miscellaneous Registers */
124 #define MVNETA_PRXC(q) (0x1400 + ((q) << 2)) /*Port RX queues Config*/
125 #define MVNETA_PRXSNP(q) (0x1420 + ((q) << 2)) /* Port RX queues Snoop */
129 #define MVNETA_PRXS(q) (0x14e0 + ((q) << 2)) /*Port RX queues Status */
134 /* Rx DMA Wake on LAN Registers 0x3690 - 0x36b8 */
136 /* Tx DMA Miscellaneous Registers */
143 /* Tx DMA Networking Controller Miscellaneous Registers */
146 #define MVNETA_PTXS(q) (0x3c40 + ((q) << 2)) /* Port TX queues Status*/
149 #define MVNETA_TXTBC(q) (0x3ca0 + ((q) << 2)) /* TX Trans-ed Buf Count*/
152 /* Tx DMA Packet Modification Registers */
157 /* Tx DMA Queue Arbiter Registers (Version 1) */
159 #define MVNETA_TQTBC_V1 0x24e0 /* Transmit Queue Token-Bucket Cfg */
161 #define MVNETA_PMTBS_V1 0x24ec /* Port Max Token-Bucket Size */
163 /* Transmit Queue Token-Bucket Counter */
165 /* Transmit Queue Token-Bucket Configuration */
168 /* Tx DMA Queue Arbiter Registers (Version 3) */
174 #define MVNETA_PMTBS_V3 0x3e14 /* Port Max Token-Bucket Size */
178 /* Transmit Queue Max Token-Bucket Size */
180 /* Transmit Queue Token-Bucket Counter */
190 /* RX_TX DMA Registers */
207 /* Gigabit Ethernet Auto-Negotiation Configuration Registers */
208 #define MVNETA_PANC 0x2c0c /* Port Auto-Negotiation Configuration*/
269 /* MAC MIB Counters 0x3000 - 0x307c */
330 #define MVNETA_S_SIZE(size) (((size) - 1) & 0xffff0000)
333 #define MVNETA_BARE_EN_MASK ((1 << MVNETA_NWINDOW) - 1)
420 * Rx DMA Hardware Parser Registers
433 #define MVNETA_DF_QUEUE_ALL ((MVNETA_RX_QNUM_MAX-1) << 1)
434 #define MVNETA_DF_QUEUE_MASK ((MVNETA_RX_QNUM_MAX-1) << 1)
437 * Rx DMA Miscellaneous Registers
440 #define MVNETA_PMFS_RXMFS(rxmfs) (((rxmfs) - 40) & 0x7c)
451 * Rx DMA Networking Controller Miscellaneous Registers
453 /* Port RX queues Configuration (MVNETA_PRXC) */
456 /* Port RX queues Snoop (MVNETA_PRXSNP) */
460 /* Port RX queues Descriptors Queue Size (MVNETA_PRXDQS) */
464 /* Port RX queues Descriptors Queue Threshold (MVNETA_PRXDQTH) */
470 /* Port RX queues Status (MVNETA_PRXS) */
478 /* Port RX queues Status Update (MVNETA_PRXSU) */
486 * Tx DMA Miscellaneous Registers
497 * Tx DMA Networking Controller Miscellaneous Registers
499 /* Port TX queues Descriptors Queue Size (MVNETA_PTXDQS) */
507 /* Port TX queues Status (MVNETA_PTXS) */
516 /* Port TX queues Status Update (MVNETA_PTXSU) */
530 * Tx DMA Queue Arbiter Registers (Version 1 )
536 * RX_TX DMA Registers
608 * Gigabit Ethernet Auto-Negotiation Configuration Registers
610 /* Port Auto-Negotiation Configuration (MVNETA_PANC) */
717 #define MVNETA_PSR_PDP (1 << 8) /*Port is Doing Back-Pressure*/
823 * DMA descriptors