Lines Matching +full:region +full:- +full:freeze +full:- +full:timeout +full:- +full:us
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #define IC_HC0 0x000001ff /* bits 0-8 = HC0 */
44 #define IC_HC1 (IC_HC0 << IC_HC_SHIFT) /* 9-17 = HC1 */
58 #define IC_MAIN_RSVD (0xfe000000) /* bits 31-25 */
59 #define IC_MAIN_RSVD_5 (0xfff10000) /* bits 31-19 */
60 #define IC_MAIN_RSVD_SOC (0xfffffec0) /* bits 31-9, 7-6 */
65 #define CHIP_SOC_HC0_MASK(num) (0xff >> ((4 - (num)) * 2))
87 #define HC_RQOP 0x4 /* Request Queue Out-Pointer */
88 #define HC_RQIP 0x8 /* Response Queue In-Pointer */
147 /* Non-fatal Errors */
149 #define EDMA_REQQIP 0x14 /* Request Queue In-Pointer */
150 #define EDMA_REQQOP 0x18 /* Request Queue Out-Pointer */
156 #define EDMA_RESQIP 0x20 /* Response Queue In-Pointer */
157 #define EDMA_RESQOP 0x24 /* Response Queue Out-Pointer */
166 #define EDMA_CMD_EEDMAFRZ (1 << 4) /* EDMA Freeze */
176 #define EDMA_IORT 0x34 /* IORdy Timeout */
251 #define DMA_DRLA 0x234 /* Data Region Low Address */
252 #define DMA_DRHA 0x238 /* Data Region High Address */
254 /* Serial-ATA Registers */
321 #define SATA_SATAICFG 0x050 /* Serial-ATA Interface Configuration */
346 #define SATA_SATAICTL 0x344 /* Serial-ATA Interface Control */
354 #define SATA_SATAITC 0x348 /* Serial-ATA Interface Test Control */
355 #define SATA_SATAIS 0x34c /* Serial-ATA Interface Status */
420 uint32_t drbc; /* Data Region Byte Count */
424 /* EDMA Phisical Region Descriptors (ePRD) Table Data Structure */
509 struct callout timeout; /* Execution timeout */ member
555 int fbs_enabled; /* FIS-based switching enabled */
561 uint32_t toslots; /* Slots in timeout */
573 int resetting; /* Hard-reset in progress. */
574 int resetpolldiv; /* Hard-reset poll divider. */
583 struct callout reset_timer; /* Hard-reset timeout */
585 struct mvs_device user[16]; /* User-specified settings */
602 int ccc; /* CCC timeout */
618 MVS_ERR_INVALID, /* Error detected by us before submitting. */
622 MVS_ERR_TIMEOUT, /* Command execution timeout. */