Lines Matching full:timing

190 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing);
212     enum mmc_bus_timing timing);
216     enum mmc_bus_timing timing);
218     enum mmc_bus_timing timing);
225     enum mmc_bus_timing timing);
226 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
321 	enum mmc_bus_timing timing;
349 			timing = mmcbr_get_timing(busdev);
362 			if (timing >= bus_timing_mmc_ddr52 &&
368 				    "setting bus width to %d bits %s timing\n",
371 				    mmc_timing_to_string(timing));
373 			if (mmc_set_card_bus_width(sc, ivar, timing) !=
382 			if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
387 			if (timing >= bus_timing_mmc_hs200 &&
742     enum mmc_bus_timing timing)
775 			if (timing == bus_timing_mmc_hs400 ||
776 			    timing == bus_timing_mmc_hs400es)
781 			switch (timing) {
795 			switch (timing) {
825 	enum mmc_bus_timing timing;
829 	timing = mmcbr_get_timing(dev);
832 	    timing == bus_timing_normal || bus_width == bus_width_1)
843 			if (timing >= bus_timing_mmc_ddr52 &&
863 			if (timing == bus_timing_mmc_ddr52 &&
897     enum mmc_bus_timing timing)
904 		switch (timing) {
920 		mmcbr_set_timing(sc->dev, timing);
923 		switch (timing) {
946 		mmcbr_set_timing(sc->dev, timing);
956     enum mmc_bus_timing timing)
959 	if (isset(&ivar->vccq_120, timing))
961 	else if (isset(&ivar->vccq_180, timing))
1454 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1457 	switch (timing) {
1483 mmc_timing_to_string(enum mmc_bus_timing timing)
1486 	switch (timing) {
1510 mmc_host_timing(device_t dev, enum mmc_bus_timing timing)
1525 	switch (timing) {
1561 	enum mmc_bus_timing timing;
1566 	for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1567 		if (isset(&ivar->timings, timing))
1571 	device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1574 	    mmc_timing_to_dtr(ivar, timing) / 1000000,
1575 	    mmc_timing_to_string(timing));
2116 	enum mmc_bus_timing max_timing, timing;
2128 				for (timing = max_timing - 1; timing >=
2129 				    bus_timing_normal; timing--) {
2130 					if (isset(&ivar->timings, timing) &&
2131 					    mmc_host_timing(dev, timing)) {
2132 						max_timing = timing;
2148 		    "setting transfer rate to %d.%03dMHz (%s timing)\n",
2156 	 * timing mode selection" of the eMMC specification v5.1, too, and
2162 	timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing;
2175 		if (timing == bus_timing_mmc_hs200 ||	/* includes HS400 */
2176 		    timing == bus_timing_mmc_hs400es) {
2177 			if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2184 		if (timing == bus_timing_mmc_hs200) {	/* includes HS400 */
2186 			if (mmc_set_card_bus_width(sc, ivar, timing) !=
2194 		} else if (timing == bus_timing_mmc_hs400es) {
2195 			if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) !=
2198 				    "%d failed to set %s timing\n", rca,
2199 				    mmc_timing_to_string(timing));
2205 		if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) {
2207 			    "failed to set %s timing\n", rca,
2208 			    mmc_timing_to_string(timing));
2212 		if (timing == bus_timing_mmc_ddr52) {
2217 			if (mmc_set_card_bus_width(sc, ivar, timing) !=
2225 			if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2242 		if (timing <= bus_timing_uhs_sdr25 ||
2243 		    timing == bus_timing_mmc_ddr52)
2255 			    "failed to set %s timing\n", rca,
2272  * to HS400ES.  This follows the sequences described in "6.6.2.3 HS400 timing
2285 	 * Both clock and timing must be set as appropriate for high speed
2326 	 * Both clock and timing must initially be set as appropriate for
2337 	 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios.
2362 	enum mmc_bus_timing timing;
2371 	timing = mmcbr_get_timing(busdev);
2372 	if (timing == bus_timing_mmc_hs400) {
2379 		 * the switch timing dance.
2389 	if (err != 0 && timing == bus_timing_mmc_hs400)
2399 	if (timing == bus_timing_mmc_hs400) {
2400 		if (mmc_switch_to_hs400(sc, ivar, clock, timing) !=