Lines Matching defs:priv
144 mlx5e_del_eth_addr_from_flow_table(struct mlx5e_priv *priv,
250 mlx5e_add_eth_addr_rule_sub(struct mlx5e_priv *priv,
257 struct mlx5_flow_table *ft = priv->fts.main.t;
262 u32 *tirn = priv->tirn;
426 mlx5e_del_eth_addr_from_flow_table(priv, ai);
432 mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv,
440 mlx5_en_err(priv->ifp, "alloc failed\n");
444 err = mlx5e_add_eth_addr_rule_sub(priv, ai, type, spec);
453 mlx5e_del_main_vxlan_rules(struct mlx5e_priv *priv)
455 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_IPSEC_ESP]);
456 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_IPSEC_ESP]);
457 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_IPSEC_AH]);
458 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_IPSEC_AH]);
459 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_TCP]);
460 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_TCP]);
461 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_UDP]);
462 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_UDP]);
463 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV6]);
464 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_IPV4]);
465 mlx5_del_flow_rules(&priv->fts.main_vxlan_rule[MLX5E_TT_ANY]);
469 mlx5e_add_main_vxlan_rules_sub(struct mlx5e_priv *priv,
474 struct mlx5_flow_table *ft = priv->fts.main_vxlan.t;
475 u32 *tirn = priv->tirn_inner_vxlan;
494 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV4];
501 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV6];
511 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_UDP];
518 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_UDP];
527 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_TCP];
534 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_TCP];
543 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_IPSEC_AH];
550 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_IPSEC_AH];
559 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV4_IPSEC_ESP];
566 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_IPV6_IPSEC_ESP];
577 rule_p = &priv->fts.main_vxlan_rule[MLX5E_TT_ANY];
588 mlx5e_del_main_vxlan_rules(priv);
594 mlx5e_add_main_vxlan_rules(struct mlx5e_priv *priv)
601 mlx5_en_err(priv->ifp, "alloc failed\n");
605 err = mlx5e_add_main_vxlan_rules_sub(priv, spec);
613 static int mlx5e_vport_context_update_vlans(struct mlx5e_priv *priv)
615 if_t ifp = priv->ifp;
624 for_each_set_bit(vlan, priv->vlan.active_vlans, VLAN_N_VID)
627 max_list_size = 1 << MLX5_CAP_GEN(priv->mdev, log_max_vlan_list);
641 for_each_set_bit(vlan, priv->vlan.active_vlans, VLAN_N_VID) {
647 err = mlx5_modify_nic_vport_vlans(priv->mdev, vlans, list_size);
664 mlx5e_add_vlan_rule_sub(struct mlx5e_priv *priv,
668 struct mlx5_flow_table *ft = priv->fts.vlan.t;
684 dest.ft = priv->fts.vxlan.t;
690 rule_p = &priv->vlan.untagged_ft_rule;
694 rule_p = &priv->vlan.any_cvlan_ft_rule;
699 rule_p = &priv->vlan.any_svlan_ft_rule;
704 rule_p = &priv->vlan.active_vlans_ft_rule[vid];
709 mlx5e_vport_context_update_vlans(priv);
717 mlx5_en_err(priv->ifp, "add rule failed\n");
724 mlx5e_add_vlan_rule(struct mlx5e_priv *priv,
732 mlx5_en_err(priv->ifp, "alloc failed\n");
737 err = mlx5e_add_vlan_rule_sub(priv, rule_type, vid, spec);
746 mlx5e_del_vlan_rule(struct mlx5e_priv *priv,
751 mlx5_del_flow_rules(&priv->vlan.untagged_ft_rule);
754 mlx5_del_flow_rules(&priv->vlan.any_cvlan_ft_rule);
757 mlx5_del_flow_rules(&priv->vlan.any_svlan_ft_rule);
760 mlx5_del_flow_rules(&priv->vlan.active_vlans_ft_rule[vid]);
761 mlx5e_vport_context_update_vlans(priv);
769 mlx5e_del_any_vid_rules(struct mlx5e_priv *priv)
771 mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_CTAG_VID, 0);
772 mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_STAG_VID, 0);
776 mlx5e_add_any_vid_rules(struct mlx5e_priv *priv)
780 err = mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_CTAG_VID, 0);
784 err = mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_STAG_VID, 0);
786 mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_CTAG_VID, 0);
792 mlx5e_enable_vlan_filter(struct mlx5e_priv *priv)
794 if (priv->vlan.filter_disabled) {
795 priv->vlan.filter_disabled = false;
796 if (if_getflags(priv->ifp) & IFF_PROMISC)
798 if (test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
799 mlx5e_del_any_vid_rules(priv);
804 mlx5e_disable_vlan_filter(struct mlx5e_priv *priv)
806 if (!priv->vlan.filter_disabled) {
807 priv->vlan.filter_disabled = true;
808 if (if_getflags(priv->ifp) & IFF_PROMISC)
810 if (test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
811 mlx5e_add_any_vid_rules(priv);
818 struct mlx5e_priv *priv = arg;
820 if (ifp != priv->ifp)
823 PRIV_LOCK(priv);
824 if (!test_and_set_bit(vid, priv->vlan.active_vlans) &&
825 test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
826 mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_MATCH_VID, vid);
827 PRIV_UNLOCK(priv);
833 struct mlx5e_priv *priv = arg;
835 if (ifp != priv->ifp)
838 PRIV_LOCK(priv);
839 clear_bit(vid, priv->vlan.active_vlans);
840 if (test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
841 mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_MATCH_VID, vid);
842 PRIV_UNLOCK(priv);
846 mlx5e_add_all_vlan_rules(struct mlx5e_priv *priv)
851 set_bit(0, priv->vlan.active_vlans);
852 for_each_set_bit(i, priv->vlan.active_vlans, VLAN_N_VID) {
853 err = mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_MATCH_VID,
859 err = mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_UNTAGGED, 0);
863 if (priv->vlan.filter_disabled) {
864 err = mlx5e_add_any_vid_rules(priv);
870 mlx5e_del_all_vlan_rules(priv);
875 mlx5e_del_all_vlan_rules(struct mlx5e_priv *priv)
879 if (priv->vlan.filter_disabled)
880 mlx5e_del_any_vid_rules(priv);
882 mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_UNTAGGED, 0);
884 for_each_set_bit(i, priv->vlan.active_vlans, VLAN_N_VID)
885 mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_MATCH_VID, i);
886 clear_bit(0, priv->vlan.active_vlans);
894 mlx5e_execute_action(struct mlx5e_priv *priv,
899 mlx5e_add_eth_addr_rule(priv, &hn->ai, MLX5E_FULLMATCH);
904 mlx5e_del_eth_addr_from_flow_table(priv, &hn->ai);
906 mlx5_mpfs_del_mac(priv->mdev, hn->mpfs_index);
962 mlx5e_sync_ifp_addr(struct mlx5e_priv *priv)
969 if_t ifp = priv->ifp;
973 PRIV_ASSERT_LOCKED(priv);
1009 if (mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_uc, hn) == 0)
1012 mlx5_mpfs_add_mac(priv->mdev, &hn->mpfs_index,
1019 if (mlx5e_add_eth_addr_to_hash(priv->eth_addr.if_mc, hn) == 0)
1035 static void mlx5e_fill_addr_array(struct mlx5e_priv *priv, int list_type,
1039 if_t ifp = priv->ifp;
1046 addr_list = is_uc ? priv->eth_addr.if_uc : priv->eth_addr.if_mc;
1050 else if (priv->eth_addr.broadcast_enabled)
1062 static void mlx5e_vport_context_update_addr_list(struct mlx5e_priv *priv,
1075 size = is_uc ? 0 : (priv->eth_addr.broadcast_enabled ? 1 : 0);
1077 1 << MLX5_CAP_GEN(priv->mdev, log_max_current_uc_list) :
1078 1 << MLX5_CAP_GEN(priv->mdev, log_max_current_mc_list);
1080 addr_list = is_uc ? priv->eth_addr.if_uc : priv->eth_addr.if_mc;
1085 mlx5_en_err(priv->ifp,
1097 mlx5e_fill_addr_array(priv, list_type, addr_array, size);
1100 err = mlx5_modify_nic_vport_mac_list(priv->mdev, list_type, addr_array, size);
1103 mlx5_en_err(priv->ifp,
1109 static void mlx5e_vport_context_update(struct mlx5e_priv *priv)
1111 struct mlx5e_eth_addr_db *ea = &priv->eth_addr;
1113 mlx5e_vport_context_update_addr_list(priv, MLX5_NIC_VPORT_LIST_TYPE_UC);
1114 mlx5e_vport_context_update_addr_list(priv, MLX5_NIC_VPORT_LIST_TYPE_MC);
1115 mlx5_modify_nic_vport_promisc(priv->mdev, 0,
1121 mlx5e_apply_ifp_addr(struct mlx5e_priv *priv)
1127 mlx5e_for_each_hash_node(hn, tmp, priv->eth_addr.if_uc, i)
1128 mlx5e_execute_action(priv, hn);
1130 mlx5e_for_each_hash_node(hn, tmp, priv->eth_addr.if_mc, i)
1131 mlx5e_execute_action(priv, hn);
1135 mlx5e_handle_ifp_addr(struct mlx5e_priv *priv, bool rx_mode_enable)
1141 mlx5e_for_each_hash_node(hn, tmp, priv->eth_addr.if_uc, i)
1143 mlx5e_for_each_hash_node(hn, tmp, priv->eth_addr.if_mc, i)
1147 mlx5e_sync_ifp_addr(priv);
1149 mlx5e_apply_ifp_addr(priv);
1153 mlx5e_set_rx_mode_core(struct mlx5e_priv *priv, bool rx_mode_enable)
1155 struct mlx5e_eth_addr_db *ea = &priv->eth_addr;
1156 if_t ndev = priv->ifp;
1171 ether_addr_copy(priv->eth_addr.broadcast.addr,
1172 if_getbroadcastaddr(priv->ifp));
1175 mlx5e_add_eth_addr_rule(priv, &ea->promisc, MLX5E_PROMISC);
1176 if (!priv->vlan.filter_disabled)
1177 mlx5e_add_any_vid_rules(priv);
1180 mlx5e_add_eth_addr_rule(priv, &ea->allmulti, MLX5E_ALLMULTI);
1182 mlx5e_add_eth_addr_rule(priv, &ea->broadcast, MLX5E_FULLMATCH);
1184 mlx5e_handle_ifp_addr(priv, rx_mode_enable);
1187 mlx5e_del_eth_addr_from_flow_table(priv, &ea->broadcast);
1189 mlx5e_del_eth_addr_from_flow_table(priv, &ea->allmulti);
1191 if (!priv->vlan.filter_disabled)
1192 mlx5e_del_any_vid_rules(priv);
1193 mlx5e_del_eth_addr_from_flow_table(priv, &ea->promisc);
1200 mlx5e_vport_context_update(priv);
1206 struct mlx5e_priv *priv =
1209 PRIV_LOCK(priv);
1210 if (test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
1211 mlx5e_set_rx_mode_core(priv, true);
1212 PRIV_UNLOCK(priv);
1490 mlx5e_create_main_flow_table(struct mlx5e_priv *priv, bool inner_vxlan)
1492 struct mlx5e_flow_table *ft = inner_vxlan ? &priv->fts.main_vxlan :
1493 &priv->fts.main;
1499 if (priv->ipsec)
1503 ft->t = mlx5_create_flow_table(priv->fts.ns, &ft_attr);
1532 static void mlx5e_destroy_main_flow_table(struct mlx5e_priv *priv)
1534 mlx5e_destroy_flow_table(&priv->fts.main);
1537 static void mlx5e_destroy_main_vxlan_flow_table(struct mlx5e_priv *priv)
1539 mlx5e_destroy_flow_table(&priv->fts.main_vxlan);
1621 mlx5e_create_vlan_flow_table(struct mlx5e_priv *priv)
1623 struct mlx5e_flow_table *ft = &priv->fts.vlan;
1629 ft_attr.level = (priv->ipsec) ? 9 : 0;
1630 ft->t = mlx5_create_flow_table(priv->fts.ns, &ft_attr);
1660 mlx5e_destroy_vlan_flow_table(struct mlx5e_priv *priv)
1662 mlx5e_destroy_flow_table(&priv->fts.vlan);
1666 mlx5e_add_vxlan_rule_sub(struct mlx5e_priv *priv, struct mlx5_flow_spec *spec,
1669 struct mlx5_flow_table *ft = priv->fts.vxlan.t;
1686 dest.ft = priv->fts.main_vxlan.t;
1702 mlx5_en_err(priv->ifp, "add rule failed\n");
1709 mlx5e_vxlan_find_db_el(struct mlx5e_priv *priv, u_int proto, u_int port)
1713 TAILQ_FOREACH(el, &priv->vxlan.head, link) {
1721 mlx5e_vxlan_alloc_db_el(struct mlx5e_priv *priv, u_int proto, u_int port)
1749 mlx5e_add_vxlan_rule_from_db(struct mlx5e_priv *priv,
1757 mlx5_en_err(priv->ifp, "alloc failed\n");
1762 err = mlx5e_add_vxlan_rule_sub(priv, spec, el);
1771 mlx5e_add_vxlan_rule(struct mlx5e_priv *priv, sa_family_t family, u_int port)
1781 el = mlx5e_vxlan_find_db_el(priv, proto, port);
1787 el = mlx5e_vxlan_alloc_db_el(priv, proto, port);
1789 if ((if_getcapenable(priv->ifp) & IFCAP_VXLAN_HWCSUM) != 0) {
1790 err = mlx5e_add_vxlan_rule_from_db(priv, el);
1795 TAILQ_INSERT_TAIL(&priv->vxlan.head, el, link);
1803 mlx5e_add_vxlan_catchall_rule_sub(struct mlx5e_priv *priv,
1806 struct mlx5_flow_table *ft = priv->fts.vxlan.t;
1818 dest.ft = priv->fts.main.t;
1820 rule_p = &priv->fts.vxlan_catchall_ft_rule;
1826 mlx5_en_err(priv->ifp, "add rule failed\n");
1834 mlx5e_add_vxlan_catchall_rule(struct mlx5e_priv *priv)
1841 mlx5_en_err(priv->ifp, "alloc failed\n");
1846 err = mlx5e_add_vxlan_catchall_rule_sub(priv, spec);
1855 mlx5e_add_all_vxlan_rules(struct mlx5e_priv *priv)
1861 TAILQ_FOREACH(el, &priv->vxlan.head, link) {
1864 err = mlx5e_add_vxlan_rule_from_db(priv, el);
1874 mlx5e_del_vxlan_rule(struct mlx5e_priv *priv, sa_family_t family, u_int port)
1884 el = mlx5e_vxlan_find_db_el(priv, proto, port);
1894 TAILQ_REMOVE(&priv->vxlan.head, el, link);
1900 mlx5e_del_all_vxlan_rules(struct mlx5e_priv *priv)
1904 TAILQ_FOREACH(el, &priv->vxlan.head, link) {
1913 mlx5e_del_vxlan_catchall_rule(struct mlx5e_priv *priv)
1915 mlx5_del_flow_rules(&priv->fts.vxlan_catchall_ft_rule);
1922 struct mlx5e_priv *priv = arg;
1925 PRIV_LOCK(priv);
1926 err = mlx5_vxlan_udp_port_add(priv->mdev, port);
1927 if (err == 0 && test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
1928 mlx5e_add_vxlan_rule(priv, family, port);
1929 PRIV_UNLOCK(priv);
1936 struct mlx5e_priv *priv = arg;
1938 PRIV_LOCK(priv);
1939 if (test_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state))
1940 mlx5e_del_vxlan_rule(priv, family, port);
1941 (void)mlx5_vxlan_udp_port_delete(priv->mdev, port);
1942 PRIV_UNLOCK(priv);
2009 mlx5e_create_vxlan_flow_table(struct mlx5e_priv *priv)
2011 struct mlx5e_flow_table *ft = &priv->fts.vxlan;
2017 ft_attr.level = (priv->ipsec) ? 10 : 1;
2018 ft->t = mlx5_create_flow_table(priv->fts.ns, &ft_attr);
2035 TAILQ_INIT(&priv->vxlan.head);
2125 mlx5e_create_inner_rss_flow_table(struct mlx5e_priv *priv)
2127 struct mlx5e_flow_table *ft = &priv->fts.inner_rss;
2133 ft_attr.level = (priv->ipsec) ? 11 : 3;
2134 ft->t = mlx5_create_flow_table(priv->fts.ns, &ft_attr);
2164 static void mlx5e_destroy_inner_rss_flow_table(struct mlx5e_priv *priv)
2166 mlx5e_destroy_flow_table(&priv->fts.inner_rss);
2170 mlx5e_destroy_vxlan_flow_table(struct mlx5e_priv *priv)
2172 mlx5e_destroy_flow_table(&priv->fts.vxlan);
2176 mlx5e_open_flow_tables(struct mlx5e_priv *priv)
2181 priv->fts.ns = mlx5_get_flow_namespace(
2182 priv->mdev, MLX5_FLOW_NAMESPACE_KERNEL);
2184 err = mlx5e_accel_ipsec_fs_rx_tables_create(priv);
2188 err = mlx5e_create_vlan_flow_table(priv);
2192 err = mlx5e_create_vxlan_flow_table(priv);
2196 err = mlx5e_create_main_flow_table(priv, true);
2200 err = mlx5e_create_inner_rss_flow_table(priv);
2204 err = mlx5e_create_main_flow_table(priv, false);
2208 err = mlx5e_add_vxlan_catchall_rule(priv);
2212 err = mlx5e_accel_ipsec_fs_rx_catchall_rules(priv);
2216 err = mlx5e_accel_fs_tcp_create(priv);
2223 mlx5e_accel_ipsec_fs_rx_catchall_rules_destroy(priv);
2225 mlx5e_del_vxlan_catchall_rule(priv);
2227 mlx5e_destroy_main_flow_table(priv);
2229 mlx5e_destroy_inner_rss_flow_table(priv);
2231 mlx5e_destroy_main_vxlan_flow_table(priv);
2233 mlx5e_destroy_vxlan_flow_table(priv);
2235 mlx5e_destroy_vlan_flow_table(priv);
2237 mlx5e_accel_ipsec_fs_rx_tables_destroy(priv);
2243 mlx5e_close_flow_tables(struct mlx5e_priv *priv)
2245 mlx5e_accel_fs_tcp_destroy(priv);
2246 mlx5e_accel_ipsec_fs_rx_catchall_rules_destroy(priv);
2247 mlx5e_del_vxlan_catchall_rule(priv);
2248 mlx5e_destroy_main_flow_table(priv);
2249 mlx5e_destroy_inner_rss_flow_table(priv);
2250 mlx5e_destroy_main_vxlan_flow_table(priv);
2251 mlx5e_destroy_vxlan_flow_table(priv);
2252 mlx5e_destroy_vlan_flow_table(priv);
2253 mlx5e_accel_ipsec_fs_rx_tables_destroy(priv);
2257 mlx5e_open_flow_rules(struct mlx5e_priv *priv)
2261 err = mlx5e_add_all_vlan_rules(priv);
2265 err = mlx5e_add_main_vxlan_rules(priv);
2269 err = mlx5e_add_all_vxlan_rules(priv);
2273 mlx5e_set_rx_mode_core(priv, true);
2275 set_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state);
2280 mlx5e_del_main_vxlan_rules(priv);
2283 mlx5e_del_all_vlan_rules(priv);
2289 mlx5e_close_flow_rules(struct mlx5e_priv *priv)
2291 clear_bit(MLX5E_STATE_FLOW_RULES_READY, &priv->state);
2293 mlx5e_set_rx_mode_core(priv, false);
2294 mlx5e_del_all_vxlan_rules(priv);
2295 mlx5e_del_main_vxlan_rules(priv);
2296 mlx5e_del_all_vlan_rules(priv);