Lines Matching defs:typ
47 #define __mlx5_nullp(typ) ((struct mlx5_ifc_##typ##_bits *)0)
48 #define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld)
49 #define __mlx5_bit_off(typ, fld) __offsetof(struct mlx5_ifc_##typ##_bits, fld)
50 #define __mlx5_16_off(typ, fld) (__mlx5_bit_off(typ, fld) / 16)
51 #define __mlx5_dw_off(typ, fld) (__mlx5_bit_off(typ, fld) / 32)
52 #define __mlx5_64_off(typ, fld) (__mlx5_bit_off(typ, fld) / 64)
53 #define __mlx5_16_bit_off(typ, fld) (16 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0xf))
54 #define __mlx5_dw_bit_off(typ, fld) (32 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0x1f))
55 #define __mlx5_mask(typ, fld) ((u32)((1ull << __mlx5_bit_sz(typ, fld)) - 1))
56 #define __mlx5_dw_mask(typ, fld) (__mlx5_mask(typ, fld) << __mlx5_dw_bit_off(typ, fld))
57 #define __mlx5_mask16(typ, fld) ((u16)((1ull << __mlx5_bit_sz(typ, fld)) - 1))
58 #define __mlx5_16_mask(typ, fld) (__mlx5_mask16(typ, fld) << __mlx5_16_bit_off(typ, fld))
59 #define __mlx5_st_sz_bits(typ) sizeof(struct mlx5_ifc_##typ##_bits)
61 #define MLX5_FLD_SZ_BYTES(typ, fld) (__mlx5_bit_sz(typ, fld) / 8)
62 #define MLX5_ST_SZ_BYTES(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 8)
63 #define MLX5_ST_SZ_DW(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 32)
64 #define MLX5_ST_SZ_QW(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 64)
65 #define MLX5_UN_SZ_BYTES(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 8)
66 #define MLX5_UN_SZ_DW(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 32)
67 #define MLX5_BYTE_OFF(typ, fld) (__mlx5_bit_off(typ, fld) / 8)
68 #define MLX5_ADDR_OF(typ, p, fld) ((char *)(p) + MLX5_BYTE_OFF(typ, fld))
71 #define MLX5_SET(typ, p, fld, v) do { \
72 BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 32); \
73 BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) > 32); \
74 *((__be32 *)(p) + __mlx5_dw_off(typ, fld)) = \
75 cpu_to_be32((be32_to_cpu(*((__be32 *)(p) + __mlx5_dw_off(typ, fld))) & \
76 (~__mlx5_dw_mask(typ, fld))) | (((v) & __mlx5_mask(typ, fld)) \
77 << __mlx5_dw_bit_off(typ, fld))); \
80 #define MLX5_SET_TO_ONES(typ, p, fld) do { \
81 BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 32); \
82 BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) > 32); \
83 *((__be32 *)(p) + __mlx5_dw_off(typ, fld)) = \
84 cpu_to_be32((be32_to_cpu(*((__be32 *)(p) + __mlx5_dw_off(typ, fld))) & \
85 (~__mlx5_dw_mask(typ, fld))) | ((__mlx5_mask(typ, fld)) \
86 << __mlx5_dw_bit_off(typ, fld))); \
89 #define MLX5_GET(typ, p, fld) ((be32_to_cpu(*((__be32 *)(p) +\
90 __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \
91 __mlx5_mask(typ, fld))
93 #define MLX5_GET_PR(typ, p, fld) ({ \
94 u32 ___t = MLX5_GET(typ, p, fld); \
99 #define __MLX5_SET64(typ, p, fld, v) do { \
100 BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) != 64); \
101 *((__be64 *)(p) + __mlx5_64_off(typ, fld)) = cpu_to_be64(v); \
104 #define MLX5_SET64(typ, p, fld, v) do { \
105 BUILD_BUG_ON(__mlx5_bit_off(typ, fld) % 64); \
106 __MLX5_SET64(typ, p, fld, v); \
109 #define MLX5_ARRAY_SET64(typ, p, fld, idx, v) do { \
110 BUILD_BUG_ON(__mlx5_bit_off(typ, fld) % 64); \
111 __MLX5_SET64(typ, p, fld[idx], v); \
114 #define MLX5_GET64(typ, p, fld) be64_to_cpu(*((__be64 *)(p) + __mlx5_64_off(typ, fld)))
116 #define MLX5_GET16(typ, p, fld) ((be16_to_cpu(*((__be16 *)(p) +\
117 __mlx5_16_off(typ, fld))) >> __mlx5_16_bit_off(typ, fld)) & \
118 __mlx5_mask16(typ, fld))
120 #define MLX5_SET16(typ, p, fld, v) do { \
122 BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 16); \
123 *((__be16 *)(p) + __mlx5_16_off(typ, fld)) = \
124 cpu_to_be16((be16_to_cpu(*((__be16 *)(p) + __mlx5_16_off(typ, fld))) & \
125 (~__mlx5_16_mask(typ, fld))) | (((_v) & __mlx5_mask16(typ, fld)) \
126 << __mlx5_16_bit_off(typ, fld))); \
129 #define MLX5_GET64_BE(typ, p, fld) (*((__be64 *)(p) +\
130 __mlx5_64_off(typ, fld)))
132 #define MLX5_GET_BE(type_t, typ, p, fld) ({ \
136 tmp = (__force type_t)MLX5_GET(typ, p, fld); \
139 tmp = (__force type_t)cpu_to_be16(MLX5_GET(typ, p, fld)); \
142 tmp = (__force type_t)cpu_to_be32(MLX5_GET(typ, p, fld)); \
145 tmp = (__force type_t)MLX5_GET64_BE(typ, p, fld); \
161 #define MLX5_VSC_SET(typ, p, fld, v) do { \
162 BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 32); \
163 BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) > 32); \
164 *((__le32 *)(p) + __mlx5_dw_off(typ, fld)) = \
165 cpu_to_le32((le32_to_cpu(*((__le32 *)(p) + __mlx5_dw_off(typ, fld))) & \
166 (~__mlx5_dw_mask(typ, fld))) | (((v) & __mlx5_mask(typ, fld)) \
167 << __mlx5_dw_bit_off(typ, fld))); \
170 #define MLX5_VSC_GET(typ, p, fld) ((le32_to_cpu(*((__le32 *)(p) +\
171 __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \
172 __mlx5_mask(typ, fld))
174 #define MLX5_VSC_GET_PR(typ, p, fld) ({ \
175 u32 ___t = MLX5_VSC_GET(typ, p, fld); \