Lines Matching defs:mlx_enquiry2
267 struct mlx_enquiry2 /* MLX_CMD_ENQUIRY2 */ struct
269 u_int32_t me_hardware_id;
270 u_int32_t me_firmware_id;
271 u_int32_t res1;
272 u_int8_t me_configured_channels;
273 u_int8_t me_actual_channels;
274 u_int8_t me_max_targets;
275 u_int8_t me_max_tags;
276 u_int8_t me_max_sys_drives;
277 u_int8_t me_max_arms;
278 u_int8_t me_max_spans;
279 u_int8_t res2;
280 u_int32_t res3;
281 u_int32_t me_mem_size;
282 u_int32_t me_cache_size;
283 u_int32_t me_flash_size;
284 u_int32_t me_nvram_size;
285 u_int16_t me_mem_type;
286 u_int16_t me_clock_speed;
287 u_int16_t me_mem_speed;
288 u_int16_t me_hardware_speed;
289 u_int8_t res4[12];
290 u_int16_t me_max_commands;
291 u_int16_t me_max_sg;
292 u_int16_t me_max_dp;
293 u_int16_t me_max_iod;
294 u_int16_t me_max_comb;
295 u_int8_t me_latency;
296 u_int8_t res5;
297 u_int8_t me_scsi_timeout;
298 u_int8_t res6;
299 u_int16_t me_min_freelines;
300 u_int8_t res7[8];
301 u_int8_t me_rate_const;
302 u_int8_t res8[11];
303 u_int16_t me_physblk;
304 u_int16_t me_logblk;
305 u_int16_t me_maxblk;
306 u_int16_t me_blocking_factor;
307 u_int16_t me_cacheline;
308 u_int8_t me_scsi_cap;
309 u_int8_t res9[5];
310 u_int16_t me_firmware_build;
311 u_int8_t me_fault_mgmt_type;
312 u_int8_t res10;
313 u_int32_t me_firmware_features;
314 u_int8_t res11[8];