Lines Matching +full:pse +full:- +full:pd

3 /*-
4  * SPDX-License-Identifier: BSD-2-Clause
128 #define	ANAR_X_FD	0x0020	/* local device supports 1000BASE-X FD */
129 #define	ANAR_X_HD	0x0040	/* local device supports 1000BASE-X HD */
153 #define	ANLPAR_X_FD	0x0020	/* local device supports 1000BASE-X FD */
154 #define	ANLPAR_X_HD	0x0040	/* local device supports 1000BASE-X HD */
164 #define ANER_LPNP	0x0008	/* link parter next page-able */
165 #define ANER_NP		0x0004	/* next page-able */
167 #define ANER_LPAN	0x0001	/* link parter autoneg-able */
176 #define	MII_100T2CR	0x09	/* 100base-T2 control register */
185 #define	MII_100T2SR	0x0a	/* 100base-T2 status register */
195 #define	MII_PSECR	0x0b	/* PSE control register */
197 #define	PSECR_PSEENMASK	0x0003	/* PSE enable mask */
198 #define	PSECR_PINOUTB	0x0008	/* PSE pinout Alternative B */
199 #define	PSECR_PINOUTA	0x0004	/* PSE pinout Alternative A */
201 #define	PSECR_PSEEN	0x0001	/* PSE Enabled */
202 #define	PSECR_PSEDIS	0x0000	/* PSE Disabled */
204 #define	MII_PSESR	0x0c	/* PSE status register */
206 #define	PSESR_VALSIG	0x0800	/* Valid PD signature detected */
207 #define	PSESR_INVALSIG	0x0400	/* Invalid PD signature detected */
211 #define	PSESR_PDCLMASK	0x0070	/* PD Class mask */
212 #define	PSESR_STATMASK	0x000e	/* PSE Status mask */
231 #define	EXTSR_1000XFDX	0x8000	/* 1000X full-duplex capable */
232 #define	EXTSR_1000XHDX	0x4000	/* 1000X half-duplex capable */
233 #define	EXTSR_1000TFDX	0x2000	/* 1000T full-duplex capable */
234 #define	EXTSR_1000THDX	0x1000	/* 1000T half-duplex capable */