Lines Matching defs:vmdq
2380 * @vmdq: VMDq "set" or "pool" index
2385 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
2401 hw->mac.ops.set_vmdq(hw, index, vmdq);
2540 * @vmdq: VMDq "set" or "pool" index
2544 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
2560 hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);
2592 u32 vmdq;
2614 addr = next(hw, &addr_list, &vmdq);
2615 ixgbe_add_uc_addr(hw, addr, vmdq);
2732 u32 vmdq;
2752 ixgbe_set_mta(hw, next(hw, &mc_addr_list, &vmdq));
3718 * @vmdq: VMDq pool to assign
3723 s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
3760 ixgbe_set_vmdq(hw, rar, vmdq);
3764 ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);
3767 ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);
3787 * @vmdq: VMDq pool index to remove from the rar
3789 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
3812 if (vmdq == IXGBE_CLEAR_VMDQ_ALL) {
3821 } else if (vmdq < 32) {
3822 mpsar_lo &= ~(1 << vmdq);
3825 mpsar_hi &= ~(1 << (vmdq - 32));
3841 * @vmdq: VMDq pool index
3843 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
3857 if (vmdq < 32) {
3859 mpsar |= 1 << vmdq;
3863 mpsar |= 1 << (vmdq - 32);
3873 * @vmdq: VMDq pool index
3880 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)
3886 if (vmdq < 32) {
3887 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 1 << vmdq);
3891 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 1 << (vmdq - 32));