Lines Matching defs:regval
463 u32 regval;
474 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i));
475 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
476 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval);
480 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
481 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN |
483 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
3442 * @regval: register value to write to RXCTRL
3446 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)
3450 if (regval & IXGBE_RXCTRL_RXEN)
4523 u32 regval;
4530 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i));
4531 regval |= IXGBE_DCA_TXCTRL_DESC_WRO_EN;
4532 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval);
4536 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
4537 regval |= IXGBE_DCA_RXCTRL_DATA_WRO_EN |
4539 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);