Lines Matching +full:inverted +full:- +full:rx
3 Copyright (c) 2001-2017, Intel Corporation
43 if (!(sc->feat_en & IXGBE_FEATURE_FDIR))
46 sc->hw.mac.ops.setup_rxpba(&sc->hw, 0, hdrm,
48 ixgbe_init_fdir_signature_82599(&sc->hw, fdir_pballoc);
58 if (!(sc->feat_en & IXGBE_FEATURE_FDIR))
60 if (sc->fdir_reinit != 1) /* Shouldn't happen */
62 ixgbe_reinit_fdir_tables_82599(&sc->hw);
63 sc->fdir_reinit = 0;
64 /* re-enable flow director interrupts */
65 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
82 struct ixgbe_softc *sc = txr->sc;
94 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
96 etype = eh->evl_proto;
99 etype = eh->evl_encap_proto;
106 ip = (struct ip *)(mp->m_data + ehdrlen);
107 ip_hlen = ip->ip_hl << 2;
110 switch (ip->ip_p) {
113 /* src and dst are inverted */
114 common.port.dst ^= th->th_sport;
115 common.port.src ^= th->th_dport;
120 /* src and dst are inverted */
121 common.port.dst ^= uh->uh_sport;
122 common.port.src ^= uh->uh_dport;
129 input.formatted.vlan_id = htobe16(mp->m_pkthdr.ether_vtag);
130 if (mp->m_pkthdr.ether_vtag)
134 common.ip ^= ip->ip_src.s_addr ^ ip->ip_dst.s_addr;
136 que = &sc->queues[txr->me];
138 * This assumes the Rx queue and Tx
141 ixgbe_fdir_add_signature_filter_82599(&sc->hw,
142 input, common, que->msix);