Lines Matching defs:hw
10 static void igc_reload_nvm_generic(struct igc_hw *hw);
14 * @hw: pointer to the HW structure
18 void igc_init_nvm_ops_generic(struct igc_hw *hw)
20 struct igc_nvm_info *nvm = &hw->nvm;
36 * @hw: pointer to the HW structure
41 s32 igc_null_read_nvm(struct igc_hw IGC_UNUSEDARG *hw,
51 * @hw: pointer to the HW structure
53 void igc_null_nvm_generic(struct igc_hw IGC_UNUSEDARG *hw)
61 * @hw: pointer to the HW structure
66 s32 igc_null_write_nvm(struct igc_hw IGC_UNUSEDARG *hw,
76 * @hw: pointer to the HW structure
81 static void igc_raise_eec_clk(struct igc_hw *hw, u32 *eecd)
84 IGC_WRITE_REG(hw, IGC_EECD, *eecd);
85 IGC_WRITE_FLUSH(hw);
86 usec_delay(hw->nvm.delay_usec);
91 * @hw: pointer to the HW structure
96 static void igc_lower_eec_clk(struct igc_hw *hw, u32 *eecd)
99 IGC_WRITE_REG(hw, IGC_EECD, *eecd);
100 IGC_WRITE_FLUSH(hw);
101 usec_delay(hw->nvm.delay_usec);
106 * @hw: pointer to the HW structure
114 static void igc_shift_out_eec_bits(struct igc_hw *hw, u16 data, u16 count)
116 struct igc_nvm_info *nvm = &hw->nvm;
117 u32 eecd = IGC_READ_REG(hw, IGC_EECD);
132 IGC_WRITE_REG(hw, IGC_EECD, eecd);
133 IGC_WRITE_FLUSH(hw);
137 igc_raise_eec_clk(hw, &eecd);
138 igc_lower_eec_clk(hw, &eecd);
144 IGC_WRITE_REG(hw, IGC_EECD, eecd);
149 * @hw: pointer to the HW structure
158 static u16 igc_shift_in_eec_bits(struct igc_hw *hw, u16 count)
166 eecd = IGC_READ_REG(hw, IGC_EECD);
173 igc_raise_eec_clk(hw, &eecd);
175 eecd = IGC_READ_REG(hw, IGC_EECD);
181 igc_lower_eec_clk(hw, &eecd);
189 * @hw: pointer to the HW structure
195 s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg)
204 reg = IGC_READ_REG(hw, IGC_EERD);
206 reg = IGC_READ_REG(hw, IGC_EEWR);
219 * @hw: pointer to the HW structure
225 s32 igc_acquire_nvm_generic(struct igc_hw *hw)
227 u32 eecd = IGC_READ_REG(hw, IGC_EECD);
232 IGC_WRITE_REG(hw, IGC_EECD, eecd | IGC_EECD_REQ);
233 eecd = IGC_READ_REG(hw, IGC_EECD);
239 eecd = IGC_READ_REG(hw, IGC_EECD);
245 IGC_WRITE_REG(hw, IGC_EECD, eecd);
255 * @hw: pointer to the HW structure
259 static void igc_standby_nvm(struct igc_hw *hw)
261 struct igc_nvm_info *nvm = &hw->nvm;
262 u32 eecd = IGC_READ_REG(hw, IGC_EECD);
269 IGC_WRITE_REG(hw, IGC_EECD, eecd);
270 IGC_WRITE_FLUSH(hw);
273 IGC_WRITE_REG(hw, IGC_EECD, eecd);
274 IGC_WRITE_FLUSH(hw);
281 * @hw: pointer to the HW structure
285 static void igc_stop_nvm(struct igc_hw *hw)
291 eecd = IGC_READ_REG(hw, IGC_EECD);
292 if (hw->nvm.type == igc_nvm_eeprom_spi) {
295 igc_lower_eec_clk(hw, &eecd);
301 * @hw: pointer to the HW structure
305 void igc_release_nvm_generic(struct igc_hw *hw)
311 igc_stop_nvm(hw);
313 eecd = IGC_READ_REG(hw, IGC_EECD);
315 IGC_WRITE_REG(hw, IGC_EECD, eecd);
320 * @hw: pointer to the HW structure
324 static s32 igc_ready_nvm_eeprom(struct igc_hw *hw)
326 struct igc_nvm_info *nvm = &hw->nvm;
327 u32 eecd = IGC_READ_REG(hw, IGC_EECD);
337 IGC_WRITE_REG(hw, IGC_EECD, eecd);
338 IGC_WRITE_FLUSH(hw);
347 igc_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
348 hw->nvm.opcode_bits);
349 spi_stat_reg = (u8)igc_shift_in_eec_bits(hw, 8);
354 igc_standby_nvm(hw);
369 * @hw: pointer to the HW structure
376 s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
378 struct igc_nvm_info *nvm = &hw->nvm;
397 IGC_WRITE_REG(hw, IGC_EERD, eerd);
398 ret_val = igc_poll_eerd_eewr_done(hw, IGC_NVM_POLL_READ);
402 data[i] = (IGC_READ_REG(hw, IGC_EERD) >>
414 * @hw: pointer to the HW structure
424 s32 igc_write_nvm_spi(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
426 struct igc_nvm_info *nvm = &hw->nvm;
444 ret_val = nvm->ops.acquire(hw);
448 ret_val = igc_ready_nvm_eeprom(hw);
450 nvm->ops.release(hw);
454 igc_standby_nvm(hw);
457 igc_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
460 igc_standby_nvm(hw);
469 igc_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
470 igc_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
477 igc_shift_out_eec_bits(hw, word_out, 16);
481 igc_standby_nvm(hw);
486 nvm->ops.release(hw);
494 * @hw: pointer to the HW structure
501 s32 igc_read_pba_string_generic(struct igc_hw *hw, u8 *pba_num,
517 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
523 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
568 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
589 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
608 * @hw: pointer to the HW structure
614 s32 igc_read_mac_addr_generic(struct igc_hw *hw)
620 rar_high = IGC_READ_REG(hw, IGC_RAH(0));
621 rar_low = IGC_READ_REG(hw, IGC_RAL(0));
624 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
627 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
630 hw->mac.addr[i] = hw->mac.perm_addr[i];
637 * @hw: pointer to the HW structure
642 s32 igc_validate_nvm_checksum_generic(struct igc_hw *hw)
651 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
669 * @hw: pointer to the HW structure
675 s32 igc_update_nvm_checksum_generic(struct igc_hw *hw)
684 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
692 ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
701 * @hw: pointer to the HW structure
706 static void igc_reload_nvm_generic(struct igc_hw *hw)
713 ctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT);
715 IGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext);
716 IGC_WRITE_FLUSH(hw);
721 * @hw: pointer to the HW structure
726 void igc_get_fw_version(struct igc_hw *hw, struct igc_fw_version *fw_vers)
738 switch (hw->mac.type) {
740 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
742 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
744 hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset + 1,
746 hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset,
766 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
769 hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
790 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);
791 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);
795 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);
796 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);