Lines Matching defs:hw

58  * @hw: pointer to the hardware structure
62 static void ice_adminq_init_regs(struct ice_hw *hw)
64 struct ice_ctl_q_info *cq = &hw->adminq;
66 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
73 * @hw: pointer to the hardware structure
77 static void ice_mailbox_init_regs(struct ice_hw *hw)
79 struct ice_ctl_q_info *cq = &hw->mailboxq;
86 * @hw: pointer to the hardware structure
90 static void ice_sb_init_regs(struct ice_hw *hw)
92 struct ice_ctl_q_info *cq = &hw->sbq;
94 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
101 * @hw: pointer to the HW struct
106 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq)
110 return (rd32(hw, cq->sq.len) & (cq->sq.len_mask |
119 * @hw: pointer to the hardware structure
123 ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
127 cq->sq.desc_buf.va = ice_alloc_dma_mem(hw, &cq->sq.desc_buf, size);
136 * @hw: pointer to the hardware structure
140 ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
144 cq->rq.desc_buf.va = ice_alloc_dma_mem(hw, &cq->rq.desc_buf, size);
152 * @hw: pointer to the hardware structure
158 static void ice_free_cq_ring(struct ice_hw *hw, struct ice_ctl_q_ring *ring)
160 ice_free_dma_mem(hw, &ring->desc_buf);
165 * @hw: pointer to the hardware structure
169 ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
176 cq->rq.dma_head = ice_calloc(hw, cq->num_rq_entries,
188 bi->va = ice_alloc_dma_mem(hw, bi, cq->rq_buf_size);
219 ice_free_dma_mem(hw, &cq->rq.r.rq_bi[i]);
221 ice_free(hw, cq->rq.dma_head);
229 * @hw: pointer to the hardware structure
233 ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
238 cq->sq.dma_head = ice_calloc(hw, cq->num_sq_entries,
249 bi->va = ice_alloc_dma_mem(hw, bi, cq->sq_buf_size);
259 ice_free_dma_mem(hw, &cq->sq.r.sq_bi[i]);
261 ice_free(hw, cq->sq.dma_head);
268 ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)
271 wr32(hw, ring->head, 0);
272 wr32(hw, ring->tail, 0);
275 wr32(hw, ring->len, (num_entries | ring->len_ena_mask));
276 wr32(hw, ring->bal, ICE_LO_DWORD(ring->desc_buf.pa));
277 wr32(hw, ring->bah, ICE_HI_DWORD(ring->desc_buf.pa));
280 if (rd32(hw, ring->bal) != ICE_LO_DWORD(ring->desc_buf.pa))
288 * @hw: pointer to the hardware structure
294 ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
296 return ice_cfg_cq_regs(hw, &cq->sq, cq->num_sq_entries);
301 * @hw: pointer to the hardware structure
307 ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
311 status = ice_cfg_cq_regs(hw, &cq->rq, cq->num_rq_entries);
316 wr32(hw, cq->rq.tail, (u32)(cq->num_rq_entries - 1));
321 #define ICE_FREE_CQ_BUFS(hw, qi, ring) \
329 ice_free_dma_mem((hw), \
333 ice_free(hw, (qi)->ring.dma_head); \
338 * @hw: pointer to the hardware structure
350 static int ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
354 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
372 ret_code = ice_alloc_ctrlq_sq_ring(hw, cq);
377 ret_code = ice_alloc_sq_bufs(hw, cq);
382 ret_code = ice_cfg_sq_regs(hw, cq);
391 ICE_FREE_CQ_BUFS(hw, cq, sq);
392 ice_free_cq_ring(hw, &cq->sq);
400 * @hw: pointer to the hardware structure
412 static int ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
416 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
434 ret_code = ice_alloc_ctrlq_rq_ring(hw, cq);
439 ret_code = ice_alloc_rq_bufs(hw, cq);
444 ret_code = ice_cfg_rq_regs(hw, cq);
453 ICE_FREE_CQ_BUFS(hw, cq, rq);
454 ice_free_cq_ring(hw, &cq->rq);
462 * @hw: pointer to the hardware structure
468 ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
472 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
482 wr32(hw, cq->sq.head, 0);
483 wr32(hw, cq->sq.tail, 0);
484 wr32(hw, cq->sq.len, 0);
485 wr32(hw, cq->sq.bal, 0);
486 wr32(hw, cq->sq.bah, 0);
491 ICE_FREE_CQ_BUFS(hw, cq, sq);
492 ice_free_cq_ring(hw, &cq->sq);
501 * @hw: pointer to the hardware structure
507 static bool ice_aq_ver_check(struct ice_hw *hw)
509 u8 exp_fw_api_ver_major = EXP_FW_API_VER_MAJOR_BY_MAC(hw);
510 u8 exp_fw_api_ver_minor = EXP_FW_API_VER_MINOR_BY_MAC(hw);
512 if (hw->api_maj_ver > exp_fw_api_ver_major) {
514 ice_warn(hw, "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
516 } else if (hw->api_maj_ver == exp_fw_api_ver_major) {
517 if (hw->api_min_ver > (exp_fw_api_ver_minor + 2))
518 ice_info(hw, "The driver for the device detected a newer version (%u.%u) of the NVM image than expected (%u.%u). Please install the most recent version of the network driver.\n",
519 hw->api_maj_ver, hw->api_min_ver,
521 else if ((hw->api_min_ver + 2) < exp_fw_api_ver_minor)
522 ice_info(hw, "The driver for the device detected an older version (%u.%u) of the NVM image than expected (%u.%u). Please update the NVM image.\n",
523 hw->api_maj_ver, hw->api_min_ver,
527 ice_info(hw, "The driver for the device detected an older version (%u.%u) of the NVM image than expected (%u.%u). Please update the NVM image.\n",
528 hw->api_maj_ver, hw->api_min_ver,
536 * @hw: pointer to the hardware structure
542 ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
546 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
556 wr32(hw, cq->rq.head, 0);
557 wr32(hw, cq->rq.tail, 0);
558 wr32(hw, cq->rq.len, 0);
559 wr32(hw, cq->rq.bal, 0);
560 wr32(hw, cq->rq.bah, 0);
566 ICE_FREE_CQ_BUFS(hw, cq, rq);
567 ice_free_cq_ring(hw, &cq->rq);
576 * @hw: pointer to the hardware structure
579 void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
581 wr32(hw, cq->sq.len, 0);
582 wr32(hw, cq->rq.len, 0);
589 * @hw: pointer to the hardware structure
591 static int ice_init_check_adminq(struct ice_hw *hw)
593 struct ice_ctl_q_info *cq = &hw->adminq;
596 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
598 status = ice_aq_get_fw_ver(hw, NULL);
602 if (!ice_aq_ver_check(hw)) {
610 ice_shutdown_rq(hw, cq);
611 ice_shutdown_sq(hw, cq);
617 * @hw: pointer to the hardware structure
629 static int ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
634 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
638 ice_adminq_init_regs(hw);
639 cq = &hw->adminq;
642 ice_sb_init_regs(hw);
643 cq = &hw->sbq;
646 ice_mailbox_init_regs(hw);
647 cq = &hw->mailboxq;
664 ret_code = ice_init_sq(hw, cq);
669 ret_code = ice_init_rq(hw, cq);
677 ice_shutdown_sq(hw, cq);
683 * @hw: pointer to the hardware structure
688 static bool ice_is_sbq_supported(struct ice_hw *hw)
690 return ice_is_generic_mac(hw);
695 * @hw: pointer to the hardware structure
702 ice_shutdown_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type,
707 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
711 cq = &hw->adminq;
712 if (ice_check_sq_alive(hw, cq))
713 ice_aq_q_shutdown(hw, unloading);
716 cq = &hw->sbq;
719 cq = &hw->mailboxq;
725 ice_shutdown_sq(hw, cq);
726 ice_shutdown_rq(hw, cq);
731 * @hw: pointer to the hardware structure
738 void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading)
740 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
742 ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN, unloading);
744 if (ice_is_sbq_supported(hw))
745 ice_shutdown_ctrlq(hw, ICE_CTL_Q_SB, unloading);
747 ice_shutdown_ctrlq(hw, ICE_CTL_Q_MAILBOX, unloading);
752 * @hw: pointer to the hardware structure
763 int ice_init_all_ctrlq(struct ice_hw *hw)
768 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
772 status = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN);
776 status = ice_init_check_adminq(hw);
780 ice_debug(hw, ICE_DBG_AQ_MSG, "Retry Admin Queue init due to FW critical error\n");
781 ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN, true);
791 if (ice_is_sbq_supported(hw)) {
792 status = ice_init_ctrlq(hw, ICE_CTL_Q_SB);
797 return ice_init_ctrlq(hw, ICE_CTL_Q_MAILBOX);
814 * @hw: pointer to the hardware structure
828 int ice_create_all_ctrlq(struct ice_hw *hw)
830 ice_init_ctrlq_locks(&hw->adminq);
831 if (ice_is_sbq_supported(hw))
832 ice_init_ctrlq_locks(&hw->sbq);
833 ice_init_ctrlq_locks(&hw->mailboxq);
835 return ice_init_all_ctrlq(hw);
852 * @hw: pointer to the hardware structure
859 void ice_destroy_all_ctrlq(struct ice_hw *hw)
862 ice_shutdown_all_ctrlq(hw, true);
864 ice_destroy_ctrlq_locks(&hw->adminq);
865 if (ice_is_sbq_supported(hw))
866 ice_destroy_ctrlq_locks(&hw->sbq);
867 ice_destroy_ctrlq_locks(&hw->mailboxq);
872 * @hw: pointer to the hardware structure
877 static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
886 head = rd32(hw, sq->head);
888 ice_debug(hw, ICE_DBG_AQ_MSG,
895 ice_debug(hw, ICE_DBG_AQ_MSG,
904 head = rd32(hw, sq->head);
906 ice_debug(hw, ICE_DBG_AQ_MSG,
942 * @hw: pointer to the hardware structure
952 ice_debug_cq(struct ice_hw *hw, struct ice_ctl_q_info *cq,
958 if (!((ICE_DBG_AQ_DESC | ICE_DBG_AQ_DESC_BUF) & hw->debug_mask))
967 ice_debug(hw, ICE_DBG_AQ_DESC, "%s %s: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
971 ice_debug(hw, ICE_DBG_AQ_DESC, "\tcookie (h,l) 0x%08X 0x%08X\n",
974 ice_debug(hw, ICE_DBG_AQ_DESC, "\tparam (0,1) 0x%08X 0x%08X\n",
977 ice_debug(hw, ICE_DBG_AQ_DESC, "\taddr (h,l) 0x%08X 0x%08X\n",
986 ice_debug(hw, ICE_DBG_AQ_DESC_BUF, "Buffer:\n");
987 ice_debug_array(hw, ICE_DBG_AQ_DESC_BUF, 16, 1, (u8 *)buf,
994 * @hw: pointer to the HW struct
1000 bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
1005 return rd32(hw, cq->sq.head) == cq->sq.next_to_use;
1010 * @hw: pointer to the HW struct
1022 ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
1035 if (hw->reset_ongoing)
1041 ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send queue not initialized.\n");
1053 ice_debug(hw, ICE_DBG_AQ_MSG, "Invalid buffer size for Control Send queue: %d.\n",
1064 val = rd32(hw, cq->sq.head);
1066 ice_debug(hw, ICE_DBG_AQ_MSG, "head overrun at %d in the Control Send Queue ring\n",
1077 if (ice_clean_sq(hw, cq) == 0) {
1078 ice_debug(hw, ICE_DBG_AQ_MSG, "Error: Control Send Queue is full.\n");
1107 ice_debug(hw, ICE_DBG_AQ_DESC, "ATQ: Control Send queue desc and buffer:\n");
1108 ice_debug_cq(hw, cq, (void *)desc_on_ring, buf, buf_size, false);
1113 wr32(hw, cq->sq.tail, cq->sq.next_to_use);
1114 ice_flush(hw);
1122 if (ice_sq_done(hw, cq))
1130 if (ice_sq_done(hw, cq)) {
1138 ice_debug(hw, ICE_DBG_AQ_MSG, "Return len %d > than buf len %d\n",
1148 ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue command 0x%04X completed with error 0x%X\n",
1161 ice_debug(hw, ICE_DBG_AQ_MSG, "ATQ: desc and buffer writeback:\n");
1162 ice_debug_cq(hw, cq, (void *)desc, buf, buf_size, true);
1171 if (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||
1172 rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {
1173 ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");
1176 ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue Writeback timeout.\n");
1187 * @hw: pointer to the HW struct
1199 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
1206 if (hw->reset_ongoing)
1210 status = ice_sq_send_cmd_nolock(hw, cq, desc, buf, buf_size, cd);
1233 * @hw: pointer to the HW struct
1243 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
1263 ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive queue not initialized.\n");
1269 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);
1285 ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive Queue Event 0x%04X received with error 0x%X\n",
1295 ice_debug(hw, ICE_DBG_AQ_DESC, "ARQ: desc and buffer:\n");
1296 ice_debug_cq(hw, cq, (void *)desc, e->msg_buf, cq->rq_buf_size, true);
1312 wr32(hw, cq->rq.tail, ntc);
1324 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);