Lines Matching full:flush

69 		 * pages to flush (in addition to the 'cur' page).
134 	struct hyperv_tlb_flush *flush;
147 	flush = *VMBUS_PCPU_PTR(sc, cpu_mem, curcpu);
148 	if (flush == NULL)
180 	flush->processor_mask = 0;
185 		flush->address_space = 0;
186 		flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
189 		flush->address_space = cr3;
190 		flush->address_space &= ~CR3_PCID_MASK;
191 		flush->flags = 0;
194 		flush->flags |= HV_FLUSH_ALL_PROCESSORS;
204 			set_bit(vcpu, &flush->processor_mask);
206 		if (!flush->processor_mask )
209 	max_gvas = (PAGE_SIZE - sizeof(*flush)) / sizeof(flush->gva_list[0]);
211 		flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
213 		    (uint64_t)flush, (uint64_t)NULL);
216 		    (uint64_t)flush, (uint64_t)NULL);
218 		gva_n = fill_gva_list(flush->gva_list, addr1, addr2);
221 		    gva_n, 0, (uint64_t)flush, (uint64_t)NULL);
254 	struct hv_tlb_flush_ex *flush;
257 	flush = *VMBUS_PCPU_PTR(sc, cpu_mem, curcpu);
266 		flush->address_space = 0;
267 		flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
270 		flush->address_space = cr3;
271 		flush->address_space &= ~CR3_PCID_MASK;
272 		flush->flags = 0;
275 	flush->hv_vp_set.valid_bank_mask = 0;
277 	flush->hv_vp_set.format = HV_GENERIC_SET_SPARSE_4K;
278 	nr_bank = hv_cpumask_to_vpset(&flush->hv_vp_set, &mask, sc);
283 	 * We can flush not more than max_gvas with one hypercall. Flush the
286 	max_gvas = (PAGE_SIZE - sizeof(*flush) - nr_bank *
287 	    sizeof(flush->hv_vp_set.bank_contents[0])) /
288 	    sizeof(flush->hv_vp_set.bank_contents[0]);
291 		flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
294 				0, nr_bank, (uint64_t)flush, (uint64_t)NULL);
299 		    0, nr_bank, (uint64_t)flush, (uint64_t)NULL);
301 		gva_n = fill_gva_list(&flush->hv_vp_set.bank_contents[nr_bank],
305 		    gva_n, nr_bank, (uint64_t)flush, (uint64_t)NULL);