Lines Matching defs:intr_conf

122 		    struct gpioc_pin_intr *intr_conf);
194 gpioc_allocate_pin_intr(struct gpioc_pin_intr *intr_conf, uint32_t flags)
198 	intr_conf->config_locked = true;
199 	mtx_unlock(&intr_conf->mtx);
201 	intr_conf->intr_res = gpio_alloc_intr_resource(intr_conf->pin->dev,
202 	    &intr_conf->intr_rid, RF_ACTIVE, intr_conf->pin, flags);
203 	if (intr_conf->intr_res == NULL) {
208 	err = bus_setup_intr(intr_conf->pin->dev, intr_conf->intr_res,
210 	    intr_conf, &intr_conf->intr_cookie);
214 	intr_conf->pin->flags = flags;
217 	mtx_lock(&intr_conf->mtx);
218 	intr_conf->config_locked = false;
219 	wakeup(&intr_conf->config_locked);
225 gpioc_release_pin_intr(struct gpioc_pin_intr *intr_conf)
229 	intr_conf->config_locked = true;
230 	mtx_unlock(&intr_conf->mtx);
232 	if (intr_conf->intr_cookie != NULL) {
233 		err = bus_teardown_intr(intr_conf->pin->dev,
234 		    intr_conf->intr_res, intr_conf->intr_cookie);
238 			intr_conf->intr_cookie = NULL;
241 	if (intr_conf->intr_res != NULL) {
242 		err = bus_release_resource(intr_conf->pin->dev, SYS_RES_IRQ,
243 		    intr_conf->intr_rid, intr_conf->intr_res);
247 			intr_conf->intr_rid = 0;
248 			intr_conf->intr_res = NULL;
252 	intr_conf->pin->flags = 0;
256 	mtx_lock(&intr_conf->mtx);
257 	intr_conf->config_locked = false;
258 	wakeup(&intr_conf->config_locked);
265     struct gpioc_pin_intr *intr_conf)
274 	mtx_assert(&intr_conf->mtx, MA_OWNED);
276 	SLIST_FOREACH(priv_link, &intr_conf->privs, next) {
283 		if (pin_link->pin == intr_conf)
306 	pin_link->pin = intr_conf;
307 	SLIST_INSERT_HEAD(&intr_conf->privs, priv_link, next);
316     struct gpioc_pin_intr *intr_conf)
325 	mtx_assert(&intr_conf->mtx, MA_OWNED);
327 	SLIST_FOREACH_SAFE(priv_link, &intr_conf->privs, next, priv_link_temp) {
329 			SLIST_REMOVE(&intr_conf->privs, priv_link, gpioc_privs,
338 		if (pin_link->pin == intr_conf) {
363     struct gpioc_pin_intr *intr_conf)
367 	mtx_assert(&intr_conf->mtx, MA_OWNED);
369 	if (SLIST_EMPTY(&intr_conf->privs))
372 	SLIST_FOREACH(priv_link, &intr_conf->privs, next) {
385 	struct gpioc_pin_intr	*intr_conf = &sc->sc_pin_intr[pin];
389 	flags = intr_conf->pin->flags;
394 	mtx_lock(&intr_conf->mtx);
395 	SLIST_FOREACH(priv_link, &intr_conf->privs, next) {
401 	mtx_unlock(&intr_conf->mtx);
410 	struct gpioc_pin_intr *intr_conf = &sc->sc_pin_intr[pin];
414 	if (intr_conf->pin->flags == 0 && flags == 0) {
418 	mtx_lock(&intr_conf->mtx);
419 	while (intr_conf->config_locked == true)
420 		mtx_sleep(&intr_conf->config_locked, &intr_conf->mtx, 0,
422 	if (intr_conf->pin->flags == 0 && flags != 0) {
427 		res = gpioc_allocate_pin_intr(intr_conf, flags);
429 			res = gpioc_attach_priv_pin(priv, intr_conf);
432 	} else if (intr_conf->pin->flags == flags) {
437 		res = gpioc_attach_priv_pin(priv, intr_conf);
440 	} else if (intr_conf->pin->flags != 0 && flags == 0) {
446 		if (gpioc_intr_reconfig_allowed(priv, intr_conf)) {
447 			res = gpioc_release_pin_intr(intr_conf);
450 			res = gpioc_detach_priv_pin(priv, intr_conf);
456 		if (!gpioc_intr_reconfig_allowed(priv, intr_conf))
459 			res = gpioc_release_pin_intr(intr_conf);
461 				res = gpioc_allocate_pin_intr(intr_conf, flags);
463 				res = gpioc_attach_priv_pin(priv, intr_conf);
468 	mtx_unlock(&intr_conf->mtx);
476 	struct gpioc_pin_intr *intr_conf;
482 	intr_conf = arg;
483 	sc = intr_conf->sc;
487 	if (intr_conf->pin->flags & GPIO_INTR_EDGE_BOTH)
488 		GPIO_PIN_GET(sc->sc_pdev, intr_conf->pin->pin, &pin_state);
489 	else if (intr_conf->pin->flags & GPIO_INTR_EDGE_RISING)
494 	mtx_lock(&intr_conf->mtx);
496 	if (intr_conf->config_locked == true) {
499 		    intr_conf->pin->pin);
500 		mtx_unlock(&intr_conf->mtx);
504 	if (SLIST_EMPTY(&intr_conf->privs)) {
506 		    "occurred interrupt on pin %d.\n", intr_conf->pin->pin);
507 		mtx_unlock(&intr_conf->mtx);
511 	SLIST_FOREACH(privs, &intr_conf->privs, next) {
517 			if (privpin->pin == intr_conf)
556 	mtx_unlock(&intr_conf->mtx);