Lines Matching full:177
84 #define GEM_INTR_BITS "\177\020" \
102 #define GEM_PCI_ERR_BITS "\177\020b\0ACKBAD\0b\1DTRTO\0b\2OTHER\0\0"
109 #define GEM_PCI_BIF_CNF_BITS "\177\020b\0SLOWCLK\0b\1HOST64\0" \
322 #define GEM_MAC_STATUS_BITS "\177\020b\0PAUSED\0b\1PAUSE\0b\2RESUME\0\0"
336 #define GEM_MAC_XIF_BITS "\177\020b\0TXMIIENA\0b\1MIILOOP\0b\2NOECHO" \
360 #define GEM_MAC_TX_CONFIG_BITS "\177\020" \
380 #define GEM_MAC_RX_CONFIG_BITS "\177\020" \
389 #define GEM_MAC_CC_BITS "\177\020b\0TXPAUSE\0b\1RXPAUSE\0b\2NOPAUSE\0\0"
428 #define GEM_MIF_CONFIG_BITS "\177\020b\0PHYSEL\0b\1POLL\0b\2BBENA\0" \
466 #define GEM_MII_CONTROL_BITS "\177\020b\7COLTST\0b\x8_FD\0b\x9RAN\0" \
478 #define GEM_MII_STATUS_BITS "\177\020b\0EXTCAP\0b\1JABBER\0b\2LINKSTS\0" \
492 #define GEM_MII_ANEG_BITS "\177\020b\5FDX\0b\6HDX\0b\7SYMPAUSE\0" \
506 #define GEM_MII_CONFIG_BITS "\177\020b\0PCSENA\0\0"
519 #define GEM_MII_DATAPATH_BITS "\177\020" \
535 "\177\020b\0LOOP\0b\1ENASYNC\0b\2LOCKREF" \