Lines Matching defs:clkid
176 zynqmp_firmware_clock_enable(device_t dev, uint32_t clkid)
183 rv = zynqmp_call_smc(PM_CLOCK_ENABLE, clkid, 0, 0, 0, payload, false);
190 zynqmp_firmware_clock_disable(device_t dev, uint32_t clkid)
197 rv = zynqmp_call_smc(PM_CLOCK_DISABLE, clkid, 0, 0, 0, payload, false);
204 zynqmp_firmware_clock_getstate(device_t dev, uint32_t clkid, bool *enabled)
211 rv = zynqmp_call_smc(PM_CLOCK_GETSTATE, clkid, 0, 0, 0, payload, false);
223 zynqmp_firmware_clock_setdivider(device_t dev, uint32_t clkid, uint32_t div)
230 rv = zynqmp_call_smc(PM_CLOCK_SETDIVIDER, clkid, div, 0, 0, payload, false);
237 zynqmp_firmware_clock_getdivider(device_t dev, uint32_t clkid, uint32_t *div)
244 rv = zynqmp_call_smc(PM_CLOCK_GETDIVIDER, clkid, 0, 0, 0, payload, false);
256 zynqmp_firmware_clock_setparent(device_t dev, uint32_t clkid, uint32_t parentid)
263 rv = zynqmp_call_smc(PM_CLOCK_SETPARENT, clkid, parentid, 0, 0, payload, false);
270 zynqmp_firmware_clock_getparent(device_t dev, uint32_t clkid, uint32_t *parentid)
277 rv = zynqmp_call_smc(PM_CLOCK_GETPARENT, clkid, 0, 0, 0, payload, false);
324 zynqmp_firmware_clock_get_fixedfactor(device_t dev, uint32_t clkid, uint32_t *mult, uint32_t *div)
331 rv = zynqmp_call_smc(PM_QUERY_DATA, PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, clkid, 0, 0, payload, true);