Lines Matching +full:tcam +full:- +full:based
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
35 * high-functioning network interface. The DPNI supports features that are
112 mtx_assert(&(__sc)->lock, MA_NOTOWNED); \
113 mtx_lock(&(__sc)->lock); \
116 mtx_assert(&(__sc)->lock, MA_OWNED); \
117 mtx_unlock(&(__sc)->lock); \
120 mtx_assert(&(__sc)->lock, MA_OWNED); \
124 (&(sc)->channels[(chan)]->txc_queue.tx_rings[(tc)])
126 MALLOC_DEFINE(M_DPAA2_TXB, "dpaa2_txb", "DPAA2 DMA-mapped buffer (Tx)");
142 #define DPAA2_ETH_MFL (ETHER_MAX_LEN_JUMBO + ETHER_VLAN_ENCAP_LEN - \
179 #define DPAA2_NI_BUF_ADDR_MASK (0x1FFFFFFFFFFFFul) /* 49-bit addresses max. */
198 /* Enables TCAM for Flow Steering and QoS look-ups. */
213 /* L3-L4 network traffic flow hash options. */
500 sc->dev = dev;
501 sc->ifp = NULL;
502 sc->miibus = NULL;
503 sc->mii = NULL;
504 sc->media_status = 0;
505 sc->if_flags = 0;
506 sc->link_state = LINK_STATE_UNKNOWN;
507 sc->buf_align = 0;
510 sc->rx_anomaly_frames = 0;
511 sc->rx_single_buf_frames = 0;
512 sc->rx_sg_buf_frames = 0;
513 sc->rx_enq_rej_frames = 0;
514 sc->rx_ieoi_err_frames = 0;
515 sc->tx_single_buf_frames = 0;
516 sc->tx_sg_frames = 0;
518 DPAA2_ATOMIC_XCHG(&sc->buf_num, 0);
519 DPAA2_ATOMIC_XCHG(&sc->buf_free, 0);
521 sc->rxd_dmat = NULL;
522 sc->qos_dmat = NULL;
524 sc->qos_kcfg.dmap = NULL;
525 sc->qos_kcfg.paddr = 0;
526 sc->qos_kcfg.vaddr = NULL;
528 sc->rxd_kcfg.dmap = NULL;
529 sc->rxd_kcfg.paddr = 0;
530 sc->rxd_kcfg.vaddr = NULL;
532 sc->mac.dpmac_id = 0;
533 sc->mac.phy_dev = NULL;
534 memset(sc->mac.addr, 0, ETHER_ADDR_LEN);
536 error = bus_alloc_resources(sc->dev, dpaa2_ni_spec, sc->res);
544 mcp_dev = (device_t) rman_get_start(sc->res[DPAA2_NI_MCP_RID(0)]);
546 dinfo->portal = mcp_dinfo->portal;
548 mtx_init(&sc->lock, device_get_nameunit(dev), "dpaa2_ni", MTX_DEF);
552 sc->ifp = ifp;
553 if_initname(ifp, DPAA2_NI_IFNAME, device_get_unit(sc->dev));
568 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
571 "id=%d, error=%d\n", __func__, rcinfo->id, error);
574 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
577 "id=%d, error=%d\n", __func__, dinfo->id, error);
585 * XXX-DSL: Release new buffers on Buffer Pool State Change Notification
590 sc->bp_taskq = taskqueue_create(tq_name, M_WAITOK,
591 taskqueue_thread_enqueue, &sc->bp_taskq);
592 taskqueue_start_threads(&sc->bp_taskq, 1, PI_NET, "%s", tq_name);
594 /* sc->cleanup_taskq = taskqueue_create("dpaa2_ch cleanup", M_WAITOK, */
595 /* taskqueue_thread_enqueue, &sc->cleanup_taskq); */
596 /* taskqueue_start_threads(&sc->cleanup_taskq, 1, PI_NET, */
631 ether_ifattach(sc->ifp, sc->mac.addr);
632 callout_init(&sc->mii_callout, 0);
650 ifmr->ifm_count = 0;
651 ifmr->ifm_mask = 0;
652 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
653 ifmr->ifm_current = ifmr->ifm_active =
654 sc->fixed_ifmedia.ifm_cur->ifm_media;
657 * In non-PHY usecases, we need to signal link state up, otherwise
683 sc->fixed_link = true;
685 ifmedia_init(&sc->fixed_ifmedia, 0, dpaa2_ni_media_change,
687 ifmedia_add(&sc->fixed_ifmedia, IFM_ETHER | IFM_1000_T, 0, NULL);
688 ifmedia_set(&sc->fixed_ifmedia, IFM_ETHER | IFM_1000_T);
720 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
723 "id=%d, error=%d\n", __func__, rcinfo->id, error);
726 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
729 "id=%d, error=%d\n", __func__, dinfo->id, error);
734 error = DPAA2_CMD_NI_GET_API_VERSION(dev, child, &cmd, &sc->api_major,
735 &sc->api_minor);
743 "need >= %u.%u\n", __func__, sc->api_major, sc->api_minor,
753 __func__, dinfo->id);
758 error = DPAA2_CMD_NI_GET_ATTRIBUTES(dev, child, &cmd, &sc->attr);
761 "id=%d\n", __func__, dinfo->id);
766 "wriop_version=%#x\n", sc->attr.options, sc->attr.num.queues,
767 sc->attr.num.channels, sc->attr.wriop_ver);
769 "cgs_groups=%d\n", sc->attr.num.rx_tcs, sc->attr.num.tx_tcs,
770 sc->attr.num.cgs);
772 "fs=%d\n", sc->attr.entries.mac, sc->attr.entries.vlan,
773 sc->attr.entries.qos, sc->attr.entries.fs);
775 sc->attr.key_size.qos, sc->attr.key_size.fs);
794 ep1_desc.obj_id = dinfo->id;
796 ep1_desc.type = dinfo->dtype;
818 sc->mac.dpmac_id = ep2_desc.obj_id;
827 error = DPAA2_CMD_MAC_OPEN(sc->dev, child,
828 DPAA2_CMD_TK(&cmd, rc_token), sc->mac.dpmac_id,
839 sc->mac.dpmac_id);
847 "error=%d\n", __func__, dinfo->id,
863 &sc->mac.phy_dev, sc->mac.dpmac_id);
866 sc->mac.phy_dev, dev);
873 sc->mac.phy_dev), error);
878 sc->mac.phy_dev, &sc->mac.phy_loc);
887 sc->mac.phy_dev), error);
891 error = mii_attach(sc->mac.phy_dev,
892 &sc->miibus, sc->ifp,
895 BMSR_DEFCAPMASK, sc->mac.phy_loc,
905 sc->mii = device_get_softc(sc->miibus);
984 /* Calculate number of the channels based on the allocated resources */
986 if (!sc->res[DPAA2_NI_IO_RID(i)]) {
992 if (!sc->res[DPAA2_NI_CON_RID(i)]) {
997 sc->chan_n = num_chan > DPAA2_MAX_CHANNELS
999 sc->chan_n = sc->chan_n > sc->attr.num.queues
1000 ? sc->attr.num.queues : sc->chan_n;
1002 KASSERT(sc->chan_n > 0u, ("%s: positive number of channels expected: "
1003 "chan_n=%d", __func__, sc->chan_n));
1005 device_printf(dev, "channels=%d\n", sc->chan_n);
1007 for (i = 0; i < sc->chan_n; i++) {
1008 iodev = (device_t)rman_get_start(sc->res[DPAA2_NI_IO_RID(i)]);
1009 condev = (device_t)rman_get_start(sc->res[DPAA2_NI_CON_RID(i)]);
1011 bpdev = (device_t)rman_get_start(sc->res[DPAA2_NI_BP_RID(0)]);
1014 &sc->channels[i], i, dpaa2_ni_cleanup_task);
1023 error = dpaa2_chan_setup_fq(dev, sc->channels[0], DPAA2_NI_QUEUE_RX_ERR);
1055 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1058 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1061 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1064 "id=%d, error=%d\n", __func__, dinfo->id, error);
1069 bp_dev = (device_t) rman_get_start(sc->res[DPAA2_NI_BP_RID(0)]);
1074 pools_cfg.pools[0].bp_obj_id = bp_info->id;
1076 pools_cfg.pools[0].buf_sz = sc->buf_sz;
1107 for (uint32_t i = 0; i < sc->chan_n; i++) {
1108 chan = sc->channels[i];
1111 for (uint32_t j = 0; j < chan->rxq_n; j++) {
1112 error = dpaa2_ni_setup_rx_flow(dev, &chan->rx_queues[j]);
1121 error = dpaa2_ni_setup_tx_flow(dev, &chan->txc_queue);
1130 error = dpaa2_ni_setup_rx_err_flow(dev, &sc->rxe_queue);
1142 &sc->tx_qdid);
1171 * Have the interface implicitly distribute traffic based on the default
1192 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1195 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1198 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1201 "id=%d, error=%d\n", __func__, dinfo->id, error);
1206 con_info = device_get_ivars(fq->chan->con_dev);
1209 queue_cfg.tc = fq->tc;
1210 queue_cfg.idx = fq->flowid;
1219 fq->fqid = queue_cfg.fqid;
1221 queue_cfg.dest_id = con_info->id;
1238 "user_ctx=%#jx\n", fq->flowid, fq->tc, fq->chan->id,
1239 fq->fqid, (uint64_t) fq);
1260 struct dpaa2_channel *ch = fq->chan;
1274 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1277 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1280 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1283 "id=%d, error=%d\n", __func__, dinfo->id, error);
1288 con_info = device_get_ivars(fq->chan->con_dev);
1290 KASSERT(sc->attr.num.tx_tcs <= DPAA2_MAX_TCS,
1292 sc->attr.num.tx_tcs));
1298 for (int i = 0; i < sc->attr.num.tx_tcs; i++) {
1301 queue_cfg.idx = fq->flowid;
1302 queue_cfg.chan_id = fq->chan->id;
1312 tx = &fq->tx_rings[i];
1313 tx->fq = fq;
1314 tx->fqid = queue_cfg.fqid;
1315 tx->txid = tx_rings_n;
1319 "fqid=%d\n", fq->flowid, i, fq->chan->id,
1323 mtx_init(&tx->lock, "dpaa2_tx_ring", NULL, MTX_DEF);
1326 tx->br = buf_ring_alloc(DPAA2_TX_BUFRING_SZ, M_DEVBUF, M_NOWAIT,
1327 &tx->lock);
1328 if (tx->br == NULL) {
1330 " (2) fqid=%d\n", __func__, tx->fqid);
1339 DPAA2_BUF_INIT_TAGOPT(buf, ch->tx_dmat, tx);
1341 buf->sgt = malloc(sizeof(struct dpaa2_buf), M_DPAA2_TXB,
1344 DPAA2_BUF_INIT_TAGOPT(buf->sgt, ch->sgt_dmat, buf);
1349 buf_ring_enqueue(tx->br, buf);
1356 fq->tx_qdbin = queue_cfg.qdbin;
1360 queue_cfg.idx = fq->flowid;
1369 fq->fqid = queue_cfg.fqid;
1371 queue_cfg.dest_id = con_info->id;
1413 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1416 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1419 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1422 "id=%d, error=%d\n", __func__, dinfo->id, error);
1427 con_info = device_get_ivars(fq->chan->con_dev);
1430 queue_cfg.tc = fq->tc; /* ignored */
1431 queue_cfg.idx = fq->flowid; /* ignored */
1439 fq->fqid = queue_cfg.fqid;
1441 queue_cfg.dest_id = con_info->id;
1484 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1487 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1490 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1493 "id=%d, error=%d\n", __func__, dinfo->id, error);
1503 if ((sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
1504 &sc->irq_rid[0], RF_ACTIVE | RF_SHAREABLE)) == NULL) {
1509 if (bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
1510 NULL, dpaa2_ni_intr, sc, &sc->intr)) {
1551 val = pci_msi_count(sc->dev);
1553 device_printf(sc->dev, "MSI: actual=%d, expected=%d\n", val,
1557 if (pci_alloc_msi(sc->dev, &val) != 0)
1561 sc->irq_rid[i] = i + 1;
1572 const bool en_rxcsum = if_getcapenable(sc->ifp) & IFCAP_RXCSUM;
1573 const bool en_txcsum = if_getcapenable(sc->ifp) & IFCAP_TXCSUM;
1574 device_t pdev = device_get_parent(sc->dev);
1575 device_t dev = sc->dev;
1585 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1588 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1591 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1594 "id=%d, error=%d\n", __func__, dinfo->id, error);
1648 const bool en_promisc = if_getflags(sc->ifp) & IFF_PROMISC;
1649 const bool en_allmulti = if_getflags(sc->ifp) & IFF_ALLMULTI;
1650 device_t pdev = device_get_parent(sc->dev);
1651 device_t dev = sc->dev;
1661 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1664 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1667 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1670 "id=%d, error=%d\n", __func__, dinfo->id, error);
1710 ctx = device_get_sysctl_ctx(sc->dev);
1711 parent = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev));
1723 CTLFLAG_RD, &sc->rx_anomaly_frames,
1726 CTLFLAG_RD, &sc->rx_single_buf_frames,
1729 CTLFLAG_RD, &sc->rx_sg_buf_frames,
1732 CTLFLAG_RD, &sc->rx_enq_rej_frames,
1735 CTLFLAG_RD, &sc->rx_ieoi_err_frames,
1738 CTLFLAG_RD, &sc->tx_single_buf_frames,
1741 CTLFLAG_RD, &sc->tx_sg_frames,
1751 parent = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev));
1757 for (int i = 0; i < sc->chan_n; i++) {
1765 CTLFLAG_RD, &sc->channels[i]->tx_frames,
1768 CTLFLAG_RD, &sc->channels[i]->tx_dropped,
1778 device_t dev = sc->dev;
1781 KASSERT((sc->buf_align == BUF_ALIGN) || (sc->buf_align == BUF_ALIGN_V1),
1782 ("unexpected buffer alignment: %d\n", sc->buf_align));
1794 &sc->rxd_dmat);
1810 &sc->qos_dmat);
1838 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
1841 "id=%d, error=%d\n", __func__, rcinfo->id, error);
1844 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
1846 device_printf(sc->dev, "%s: failed to open DPMAC: id=%d, "
1847 "error=%d\n", __func__, dinfo->id, error);
1856 sc->buf_align = (sc->attr.wriop_ver == WRIOP_VERSION(0, 0, 0) ||
1857 sc->attr.wriop_ver == WRIOP_VERSION(1, 0, 0))
1864 sc->buf_sz = ALIGN_DOWN(DPAA2_RX_BUF_SIZE, sc->buf_align);
1868 sc->buf_sz, sc->buf_align);
1874 * ADDR -> |---------------------|
1876 * |---------------------|
1878 * |---------------------|
1880 * ADDR + OFFSET -> |---------------------|
1886 * |---------------------|
1888 * |---------------------|
1907 /* Tx-confirmation buffer layout */
1923 error = DPAA2_CMD_NI_GET_TX_DATA_OFF(dev, child, &cmd, &sc->tx_data_off);
1931 device_printf(dev, "Tx data offset=%d\n", sc->tx_data_off);
1933 if ((sc->tx_data_off % 64) != 0) {
1935 "of 64 bytes\n", sc->tx_data_off);
1941 * ADDR -> |---------------------|
1943 * |---------------------|
1945 * |---------------------|
1946 * | DATA HEADROOM | OFFSET-BUF_RX_HWA_SIZE
1947 * ADDR + OFFSET -> |---------------------|
1953 * |---------------------|
1955 * |---------------------|
1961 buf_layout.fd_align = sc->buf_align;
1962 buf_layout.head_size = sc->tx_data_off - BUF_RX_HWA_SIZE - BUF_SWA_SIZE;
2012 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2015 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2018 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2020 device_printf(sc->dev, "%s: failed to open DPMAC: id=%d, "
2021 "error=%d\n", __func__, dinfo->id, error);
2043 sc->link_options = link_cfg.options;
2066 struct dpaa2_buf *buf = &sc->qos_kcfg;
2071 if (sc->attr.num.rx_tcs == 1 ||
2072 !(sc->attr.options & DPNI_OPT_HAS_KEY_MASKING)) {
2085 if (__predict_true(buf->dmat == NULL)) {
2086 buf->dmat = sc->qos_dmat;
2089 error = bus_dmamem_alloc(buf->dmat, (void **)&buf->vaddr,
2090 BUS_DMA_ZERO | BUS_DMA_COHERENT, &buf->dmap);
2097 error = bus_dmamap_load(buf->dmat, buf->dmap, buf->vaddr,
2098 ETH_QOS_KCFG_BUF_SIZE, dpaa2_dmamap_oneseg_cb, &buf->paddr,
2108 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2111 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2114 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2116 device_printf(sc->dev, "%s: failed to open DPMAC: id=%d, "
2117 "error=%d\n", __func__, dinfo->id, error);
2124 tbl.kcfg_busaddr = buf->paddr;
2152 if_t ifp = sc->ifp;
2164 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2167 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2170 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2172 device_printf(sc->dev, "%s: failed to open DPMAC: id=%d, "
2173 "error=%d\n", __func__, dinfo->id, error);
2207 sc->mac.addr[i] = mac_addr[i];
2224 sc->mac.addr[i] = mac_addr[i];
2228 sc->mac.addr[i] = dpni_mac_addr[i];
2253 if (sc->fixed_link || sc->mii == NULL) {
2256 if ((if_getdrvflags(sc->ifp) & IFF_DRV_RUNNING) == 0) {
2261 * sc->link_state and not trigger the update once needed,
2269 * cannot rely on ifp->if_linkstate here.
2271 if (sc->mii->mii_media_status & IFM_AVALID) {
2272 if (sc->mii->mii_media_status & IFM_ACTIVE) {
2281 if (link_state != sc->link_state) {
2282 sc->link_state = link_state;
2286 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id,
2290 "container: id=%d, error=%d\n", __func__, rcinfo->id,
2294 error = DPAA2_CMD_MAC_OPEN(dev, child, &cmd, sc->mac.dpmac_id,
2297 device_printf(sc->dev, "%s: failed to open DPMAC: "
2298 "id=%d, error=%d\n", __func__, sc->mac.dpmac_id,
2306 mac_link.supported = sc->mii->mii_media.ifm_media;
2307 mac_link.advert = sc->mii->mii_media.ifm_media;
2319 device_printf(sc->dev, "%s: failed to set DPMAC "
2321 sc->mac.dpmac_id, error);
2345 if (sc->mii) {
2346 mii_mediachg(sc->mii);
2347 sc->media_status = sc->mii->mii_media.ifm_media;
2348 } else if (sc->fixed_link) {
2349 if_printf(sc->ifp, "%s: can't change media in fixed mode\n",
2377 if (sc->mii) {
2378 mii_pollstat(sc->mii);
2379 ifmr->ifm_active = sc->mii->mii_media_active;
2380 ifmr->ifm_status = sc->mii->mii_media_status;
2394 if (sc->mii) {
2395 mii_tick(sc->mii);
2396 if (sc->media_status != sc->mii->mii_media.ifm_media) {
2398 __func__, sc->mii->mii_media.ifm_media);
2399 dpaa2_ni_media_change(sc->ifp);
2404 callout_reset(&sc->mii_callout, hz, dpaa2_ni_media_tick, sc);
2411 if_t ifp = sc->ifp;
2412 device_t pdev = device_get_parent(sc->dev);
2413 device_t dev = sc->dev;
2430 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2433 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2436 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2439 "id=%d, error=%d\n", __func__, dinfo->id, error);
2453 if (sc->mii) {
2460 callout_reset(&sc->mii_callout, hz, dpaa2_ni_media_tick, sc);
2488 fqid = m->m_pkthdr.flowid;
2489 for (int i = 0; i < sc->chan_n; i++) {
2490 ch = sc->channels[i];
2491 for (int j = 0; j < ch->rxq_n; j++) {
2492 if (fqid == ch->rx_queues[j].fqid) {
2493 chidx = ch->flowid;
2504 ch = sc->channels[chidx];
2505 error = buf_ring_enqueue(ch->xmit_br, m);
2509 taskqueue_enqueue(ch->cleanup_tq, &ch->cleanup_task);
2527 device_t pdev = device_get_parent(sc->dev);
2528 device_t dev = sc->dev;
2539 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2542 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2545 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2548 "id=%d, error=%d\n", __func__, dinfo->id, error);
2555 mtu = ifr->ifr_mtu;
2576 changed = if_getcapenable(ifp) ^ ifr->ifr_reqcap;
2578 if ((ifr->ifr_reqcap & changed) & IFCAP_HWCSUM) {
2595 changed = if_getflags(ifp) ^ sc->if_flags;
2609 sc->if_flags = if_getflags(ifp);
2628 if (sc->mii)
2629 rc = ifmedia_ioctl(ifp, ifr, &sc->mii->mii_media, c);
2630 else if(sc->fixed_link) {
2631 rc = ifmedia_ioctl(ifp, ifr, &sc->fixed_ifmedia, c);
2656 device_t pdev = device_get_parent(sc->dev);
2657 device_t dev = sc->dev;
2667 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2670 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2673 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2676 "id=%d, error=%d\n", __func__, dinfo->id, error);
2707 struct dpaa2_ni_softc *sc = if_getsoftc(ctx->ifp);
2708 device_t pdev = device_get_parent(sc->dev);
2709 device_t dev = sc->dev;
2717 if (ctx->error != 0) {
2724 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id,
2728 "container: id=%d, error=%d\n", __func__, rcinfo->id,
2732 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id,
2736 "id=%d, error=%d\n", __func__, dinfo->id, error);
2742 ctx->error = DPAA2_CMD_NI_ADD_MAC_ADDR(dev, child, &cmd,
2750 if (ctx->error != 0) {
2753 "mode\n", __func__, ctx->nent);
2757 if_setflagbits(ctx->ifp, IFF_ALLMULTI, 0);
2758 sc->if_flags |= IFF_ALLMULTI;
2759 ctx->error = dpaa2_ni_setup_if_flags(sc);
2764 ctx->nent++;
2774 device_t pdev = device_get_parent(sc->dev);
2775 device_t dev = sc->dev;
2786 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
2789 "id=%d, error=%d\n", __func__, rcinfo->id, error);
2792 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
2795 "id=%d, error=%d\n", __func__, dinfo->id, error);
2802 device_printf(sc->dev, "%s: failed to obtain IRQ status: "
2816 * NOTE: Should not be re-entrant for the same channel. It is achieved by
2817 * enqueuing the cleanup routine on a single-threaded taskqueue.
2823 struct dpaa2_ni_softc *sc = device_get_softc(ch->ni_dev);
2830 if (__predict_false((if_getdrvflags(sc->ifp) &
2840 /* Re-arm channel to generate CDAN */
2841 error = DPAA2_SWP_CONF_WQ_CHANNEL(ch->io_dev, &ch->ctx);
2844 __func__, ch->id, error);
2854 struct dpaa2_io_softc *iosc = device_get_softc(ch->io_dev);
2855 struct dpaa2_swp *swp = iosc->swp;
2857 struct dpaa2_buf *buf = &ch->store;
2862 error = dpaa2_swp_pull(swp, ch->id, buf, DPAA2_ETH_STORE_FRAMES);
2864 device_printf(ch->ni_dev, "%s: failed to pull frames: "
2865 "chan_id=%d, error=%d\n", __func__, ch->id, error);
2873 device_printf(ch->ni_dev, "%s: timeout to consume "
2874 "frames: chan_id=%d\n", __func__, ch->id);
2876 } while (--budget);
2878 return (DPAA2_RX_BUDGET - budget);
2884 struct dpaa2_ni_softc *sc = device_get_softc(ch->ni_dev);
2885 struct dpaa2_ni_tx_ring *tx = &ch->txc_queue.tx_rings[0];
2890 mtx_assert(&ch->xmit_mtx, MA_NOTOWNED);
2891 mtx_lock(&ch->xmit_mtx);
2892 m = buf_ring_dequeue_sc(ch->xmit_br);
2893 mtx_unlock(&ch->xmit_mtx);
2901 } while (--budget);
2903 return (DPAA2_TX_BUDGET - budget);
2910 device_t dev = sc->dev;
2911 struct dpaa2_ni_fq *fq = tx->fq;
2919 mtx_assert(&tx->lock, MA_NOTOWNED);
2920 mtx_lock(&tx->lock);
2921 buf = buf_ring_dequeue_sc(tx->br);
2922 mtx_unlock(&tx->lock);
2929 buf->m = m;
2930 sgt = buf->sgt;
2934 struct dpaa2_ni_tx_ring *btx = (struct dpaa2_ni_tx_ring *)buf->opt;
2935 KASSERT(buf->opt == tx, ("%s: unexpected Tx ring", __func__));
2936 KASSERT(btx->fq->chan == ch, ("%s: unexpected channel", __func__));
2939 BPF_MTAP(sc->ifp, m);
2941 error = bus_dmamap_load_mbuf_sg(buf->dmat, buf->dmap, m, segs, &nsegs,
2948 fq->chan->tx_dropped++;
2952 buf->m = m = md;
2953 error = bus_dmamap_load_mbuf_sg(buf->dmat, buf->dmap, m, segs,
2958 fq->chan->tx_dropped++;
2967 fq->chan->tx_dropped++;
2974 rc = DPAA2_SWP_ENQ_MULTIPLE_FQ(fq->chan->io_dev, tx->fqid, &fd, 1);
2980 bus_dmamap_sync(buf->dmat, buf->dmap, BUS_DMASYNC_PREWRITE);
2981 bus_dmamap_sync(sgt->dmat, sgt->dmap, BUS_DMASYNC_PREWRITE);
2984 fq->chan->tx_dropped++;
2987 fq->chan->tx_frames++;
2992 bus_dmamap_unload(buf->dmat, buf->dmap);
2993 if (sgt->paddr != 0) {
2994 bus_dmamap_unload(sgt->dmat, sgt->dmap);
2997 m_freem(buf->m);
2998 buf_ring_enqueue(tx->br, buf);
3019 if (dq != NULL && !IS_NULL_RESPONSE(dq->fdr.desc.stat)) {
3020 fd = &dq->fdr.fd;
3021 fq = (struct dpaa2_ni_fq *) dq->fdr.desc.fqd_ctx;
3023 switch (fq->type) {
3040 if (dq != NULL && !IS_NULL_RESPONSE(dq->fdr.desc.stat)) {
3041 fd = &dq->fdr.fd;
3042 fq = (struct dpaa2_ni_fq *) dq->fdr.desc.fqd_ctx;
3044 switch (fq->type) {
3071 KASSERT(chan->store_idx < chan->store_sz, ("%s: store_idx(%d) >= "
3072 "store_sz(%d)", __func__, chan->store_idx, chan->store_sz));
3095 bus_addr_t paddr = (bus_addr_t)fd->addr;
3097 struct dpaa2_buf *buf = fa->buf;
3098 struct dpaa2_channel *bch = (struct dpaa2_channel *)buf->opt;
3099 struct dpaa2_ni_softc *sc = device_get_softc(bch->ni_dev);
3107 KASSERT(fa->magic == DPAA2_MAGIC, ("%s: wrong magic", __func__));
3114 if (__predict_false(paddr != buf->paddr)) {
3116 __func__, paddr, buf->paddr);
3121 sc->rx_enq_rej_frames++;
3124 sc->rx_ieoi_err_frames++;
3131 sc->rx_single_buf_frames++;
3134 sc->rx_sg_buf_frames++;
3140 mtx_assert(&bch->dma_mtx, MA_NOTOWNED);
3141 mtx_lock(&bch->dma_mtx);
3143 bus_dmamap_sync(buf->dmat, buf->dmap, BUS_DMASYNC_POSTREAD);
3144 bus_dmamap_unload(buf->dmat, buf->dmap);
3145 m = buf->m;
3147 buf_data = (uint8_t *)buf->vaddr + dpaa2_ni_fd_offset(fd);
3148 /* Prepare buffer to be re-cycled */
3149 buf->m = NULL;
3150 buf->paddr = 0;
3151 buf->vaddr = NULL;
3152 buf->seg.ds_addr = 0;
3153 buf->seg.ds_len = 0;
3154 buf->nseg = 0;
3156 mtx_unlock(&bch->dma_mtx);
3158 m->m_flags |= M_PKTHDR;
3159 m->m_data = buf_data;
3160 m->m_len = buf_len;
3161 m->m_pkthdr.len = buf_len;
3162 m->m_pkthdr.rcvif = sc->ifp;
3163 m->m_pkthdr.flowid = fq->fqid;
3166 if (ctx->head == NULL) {
3167 KASSERT(ctx->tail == NULL, ("%s: tail already given?", __func__));
3168 ctx->head = m;
3169 ctx->tail = m;
3171 KASSERT(ctx->head != NULL, ("%s: head is NULL", __func__));
3172 ctx->tail->m_nextpkt = m;
3173 ctx->tail = m;
3175 ctx->cnt++;
3177 if (ctx->last) {
3178 ctx->tail->m_nextpkt = NULL;
3179 if_input(sc->ifp, ctx->head);
3183 ch->recycled[ch->recycled_n++] = buf;
3185 /* Re-seed and release recycled buffers back to the pool */
3186 if (ch->recycled_n == DPAA2_SWP_BUFS_PER_CMD) {
3188 taskqueue_enqueue(sc->bp_taskq, &ch->bp_task);
3190 for (int i = 0; i < ch->recycled_n; i++) {
3191 buf = ch->recycled[i];
3192 bch = (struct dpaa2_channel *)buf->opt;
3194 mtx_assert(&bch->dma_mtx, MA_NOTOWNED);
3195 mtx_lock(&bch->dma_mtx);
3196 error = dpaa2_buf_seed_rxb(sc->dev, buf,
3197 DPAA2_RX_BUF_SIZE, &bch->dma_mtx);
3198 mtx_unlock(&bch->dma_mtx);
3207 released[released_n++] = buf->paddr;
3211 bpdev = (device_t)rman_get_start(sc->res[DPAA2_NI_BP_RID(0)]);
3214 error = DPAA2_SWP_RELEASE_BUFS(ch->io_dev, bpsc->attr.bpid,
3217 device_printf(sc->dev, "%s: failed to release buffers "
3221 ch->recycled_n = 0;
3234 bus_addr_t paddr = (bus_addr_t)fd->addr;
3236 struct dpaa2_buf *buf = fa->buf;
3237 struct dpaa2_channel *bch = (struct dpaa2_channel *)buf->opt;
3238 struct dpaa2_ni_softc *sc = device_get_softc(bch->ni_dev);
3243 KASSERT(fa->magic == DPAA2_MAGIC, ("%s: wrong magic", __func__));
3250 if (__predict_false(paddr != buf->paddr)) {
3252 __func__, paddr, buf->paddr);
3256 bpdev = (device_t)rman_get_start(sc->res[DPAA2_NI_BP_RID(0)]);
3260 error = DPAA2_SWP_RELEASE_BUFS(ch->io_dev, bpsc->attr.bpid, &paddr, 1);
3262 device_printf(sc->dev, "%s: failed to release frame buffer to "
3277 bus_addr_t paddr = (bus_addr_t)fd->addr;
3279 struct dpaa2_buf *buf = fa->buf;
3280 struct dpaa2_buf *sgt = buf->sgt;
3281 struct dpaa2_ni_tx_ring *tx = (struct dpaa2_ni_tx_ring *)buf->opt;
3282 struct dpaa2_channel *bch = tx->fq->chan;
3284 KASSERT(fa->magic == DPAA2_MAGIC, ("%s: wrong magic", __func__));
3293 if (paddr != buf->paddr) {
3295 __func__, paddr, buf->paddr);
3298 mtx_assert(&bch->dma_mtx, MA_NOTOWNED);
3299 mtx_lock(&bch->dma_mtx);
3301 bus_dmamap_sync(buf->dmat, buf->dmap, BUS_DMASYNC_POSTWRITE);
3302 bus_dmamap_sync(sgt->dmat, sgt->dmap, BUS_DMASYNC_POSTWRITE);
3303 bus_dmamap_unload(buf->dmat, buf->dmap);
3304 bus_dmamap_unload(sgt->dmat, sgt->dmap);
3305 m_freem(buf->m);
3306 buf->m = NULL;
3307 buf->paddr = 0;
3308 buf->vaddr = NULL;
3309 sgt->paddr = 0;
3311 mtx_unlock(&bch->dma_mtx);
3314 buf_ring_enqueue(tx->br, buf);
3326 if (sc->api_major == major) {
3327 return sc->api_minor - minor;
3329 return sc->api_major - major;
3339 struct dpaa2_buf *sgt = buf->sgt;
3345 KASSERT(buf->opt != NULL, ("%s: no Tx ring?", __func__));
3347 KASSERT(sgt->vaddr != NULL, ("%s: no S/G vaddr?", __func__));
3353 sge = (struct dpaa2_sg_entry *)sgt->vaddr + sc->tx_data_off;
3359 sge[i-1].offset_fmt |= 0x8000u; /* set final entry flag */
3361 KASSERT(sgt->paddr == 0, ("%s: paddr(%#jx) != 0", __func__,
3362 sgt->paddr));
3364 error = bus_dmamap_load(sgt->dmat, sgt->dmap, sgt->vaddr,
3365 DPAA2_TX_SGT_SZ, dpaa2_dmamap_oneseg_cb, &sgt->paddr,
3368 device_printf(sc->dev, "%s: bus_dmamap_load() failed: "
3373 buf->paddr = sgt->paddr;
3374 buf->vaddr = sgt->vaddr;
3375 sc->tx_sg_frames++; /* for sysctl(9) */
3380 fa = (struct dpaa2_fa *)sgt->vaddr;
3381 fa->magic = DPAA2_MAGIC;
3382 fa->buf = buf;
3384 fd->addr = buf->paddr;
3385 fd->data_length = (uint32_t)buf->m->m_pkthdr.len;
3386 fd->bpid_ivp_bmt = 0;
3387 fd->offset_fmt_sl = 0x2000u | sc->tx_data_off;
3388 fd->ctrl = 0x00800000u;
3396 return ((fd->ctrl >> DPAA2_NI_FD_ERR_SHIFT) & DPAA2_NI_FD_ERR_MASK);
3403 return (fd->data_length & DPAA2_NI_FD_LEN_MASK);
3405 return (fd->data_length);
3411 return ((enum dpaa2_fd_format)((fd->offset_fmt_sl >>
3418 return (((fd->offset_fmt_sl >> DPAA2_NI_FD_SL_SHIFT)
3425 return (fd->offset_fmt_sl & DPAA2_NI_FD_OFFSET_MASK);
3435 struct dpni_stat *stat = &dpni_stat_sysctls[oidp->oid_number];
3436 device_t pdev = device_get_parent(sc->dev);
3437 device_t dev = sc->dev;
3449 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rc_token);
3452 "id=%d, error=%d\n", __func__, rcinfo->id, error);
3455 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id, &ni_token);
3458 "id=%d, error=%d\n", __func__, dinfo->id, error);
3462 error = DPAA2_CMD_NI_GET_STATISTICS(dev, child, &cmd, stat->page, 0, cnt);
3464 result = cnt[stat->cnt];
3478 uint32_t buf_num = DPAA2_ATOMIC_READ(&sc->buf_num);
3487 uint32_t buf_free = DPAA2_ATOMIC_READ(&sc->buf_free);
3499 if (!(sc->attr.num.queues > 1)) {
3526 struct dpaa2_buf *buf = &sc->rxd_kcfg;
3531 if (__predict_true(buf->dmat == NULL)) {
3532 buf->dmat = sc->rxd_dmat;
3551 key->type = DPKG_EXTRACT_FROM_HDR;
3552 key->extract.from_hdr.prot = dist_fields[i].cls_prot;
3553 key->extract.from_hdr.type = DPKG_FULL_FIELD;
3554 key->extract.from_hdr.field = dist_fields[i].cls_field;
3558 error = bus_dmamem_alloc(buf->dmat, (void **)&buf->vaddr,
3559 BUS_DMA_ZERO | BUS_DMA_COHERENT, &buf->dmap);
3566 error = dpaa2_ni_prepare_key_cfg(&cls_cfg, (uint8_t *)buf->vaddr);
3574 error = bus_dmamap_load(buf->dmat, buf->dmap, buf->vaddr,
3575 DPAA2_CLASSIFIER_DMA_SIZE, dpaa2_dmamap_oneseg_cb, &buf->paddr,
3578 device_printf(sc->dev, "%s: failed to map a buffer for Rx "
3586 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id,
3590 "container: id=%d, error=%d\n", __func__, rcinfo->id,
3594 error = DPAA2_CMD_NI_OPEN(dev, child, &cmd, dinfo->id,
3598 "interface: id=%d, error=%d\n", __func__, dinfo->id,
3604 sc->attr.num.queues, 0, DPAA2_NI_DIST_MODE_HASH, buf->paddr);
3634 if (cfg->num_extracts > DPKG_MAX_NUM_OF_EXTRACTS)
3638 dpni_ext->num_extracts = cfg->num_extracts;
3640 for (i = 0; i < cfg->num_extracts; i++) {
3641 extr = &dpni_ext->extracts[i];
3643 switch (cfg->extracts[i].type) {
3645 extr->prot = cfg->extracts[i].extract.from_hdr.prot;
3646 extr->efh_type =
3647 cfg->extracts[i].extract.from_hdr.type & 0x0Fu;
3648 extr->size = cfg->extracts[i].extract.from_hdr.size;
3649 extr->offset = cfg->extracts[i].extract.from_hdr.offset;
3650 extr->field = cfg->extracts[i].extract.from_hdr.field;
3651 extr->hdr_index =
3652 cfg->extracts[i].extract.from_hdr.hdr_index;
3655 extr->size = cfg->extracts[i].extract.from_data.size;
3656 extr->offset =
3657 cfg->extracts[i].extract.from_data.offset;
3660 extr->size = cfg->extracts[i].extract.from_parse.size;
3661 extr->offset =
3662 cfg->extracts[i].extract.from_parse.offset;
3668 extr->num_of_byte_masks = cfg->extracts[i].num_of_byte_masks;
3669 extr->extract_type = cfg->extracts[i].type & 0x0Fu;
3672 extr->masks[j].mask = cfg->extracts[i].masks[j].mask;
3673 extr->masks[j].offset =
3674 cfg->extracts[i].masks[j].offset;