Lines Matching defs:cls_lo
10139 uint32_t cls_lo, cls_hi;
10159 cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));
10168 (cls_lo & F_SRAM_VLD) ? 'Y' : 'N',
10169 G_PORTMAP(cls_hi), G_PF(cls_lo),
10170 (cls_lo & F_VF_VALID) ? G_VF(cls_lo) : -1);
10172 if (cls_lo & F_REPLICATE) {
10207 sbuf_printf(sb, "%4u%3u%3u%3u %#3x", G_SRAM_PRIO0(cls_lo),
10208 G_SRAM_PRIO1(cls_lo), G_SRAM_PRIO2(cls_lo),
10209 G_SRAM_PRIO3(cls_lo), (cls_lo >> S_MULTILISTEN0) & 0xf);
10244 uint32_t cls_lo, cls_hi, ctl, data2, vnix, vniy;
10311 cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));
10324 port_num, cls_lo & F_T6_SRAM_VLD ? 'Y' : 'N',
10325 G_PORTMAP(cls_hi), G_T6_PF(cls_lo),
10326 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1);
10340 cls_lo & F_T6_SRAM_VLD ? 'Y' : 'N',
10341 G_PORTMAP(cls_hi), G_T6_PF(cls_lo),
10342 cls_lo & F_T6_VF_VALID ? G_T6_VF(cls_lo) : -1);
10346 if (cls_lo & F_T6_REPLICATE) {
10387 G_T6_SRAM_PRIO0(cls_lo), G_T6_SRAM_PRIO1(cls_lo),
10388 G_T6_SRAM_PRIO2(cls_lo), G_T6_SRAM_PRIO3(cls_lo),
10389 (cls_lo >> S_T6_MULTILISTEN0) & 0xf);