Lines Matching +full:div +full:- +full:clk

1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/clk/clk.h>
36 #include <dev/clk/xilinx/zynqmp_clk_pll.h>
53 zynqmp_clk_pll_init(struct clknode *clk, device_t dev) in zynqmp_clk_pll_init() argument
56 clknode_init_parent_idx(clk, 0); in zynqmp_clk_pll_init()
61 zynqmp_clk_pll_recalc(struct clknode *clk, uint64_t *freq) in zynqmp_clk_pll_recalc() argument
65 uint32_t div, mode, frac; in zynqmp_clk_pll_recalc() local
68 sc = clknode_get_softc(clk); in zynqmp_clk_pll_recalc()
69 rv = ZYNQMP_FIRMWARE_CLOCK_GETDIVIDER(sc->firmware, sc->id, &div); in zynqmp_clk_pll_recalc()
73 clknode_get_name(clk)); in zynqmp_clk_pll_recalc()
75 rv = ZYNQMP_FIRMWARE_PLL_GET_MODE(sc->firmware, sc->id, &mode); in zynqmp_clk_pll_recalc()
79 clknode_get_name(clk)); in zynqmp_clk_pll_recalc()
84 pll_freq = *freq * div; in zynqmp_clk_pll_recalc()
86 ZYNQMP_FIRMWARE_PLL_GET_FRAC_DATA(sc->firmware, sc->id, &frac); in zynqmp_clk_pll_recalc()
96 zynqmp_clk_pll_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout, in zynqmp_clk_pll_set_freq() argument
118 struct clknode *clk; in zynqmp_clk_pll_register() local
122 fw_clk_id = clkdef->id - 1; in zynqmp_clk_pll_register()
123 clkdef->id = 0; in zynqmp_clk_pll_register()
124 clk = clknode_create(clkdom, &zynqmp_clk_pll_clknode_class, clkdef); in zynqmp_clk_pll_register()
125 if (clk == NULL) in zynqmp_clk_pll_register()
127 sc = clknode_get_softc(clk); in zynqmp_clk_pll_register()
128 sc->id = fw_clk_id; in zynqmp_clk_pll_register()
129 sc->firmware = fw; in zynqmp_clk_pll_register()
130 clknode_register(clkdom, clk); in zynqmp_clk_pll_register()