1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
79 	if (sc->grf)  in rk_clk_composite_read_4()
80 		*val = SYSCON_READ_4(sc->grf, addr);  in rk_clk_composite_read_4()
91 	if (sc->grf)  in rk_clk_composite_write_4()
92 		SYSCON_WRITE_4(sc->grf, addr, val | (0xffff << 16));  in rk_clk_composite_write_4()
123 	if ((sc->flags & RK_CLK_COMPOSITE_GRF) != 0) {  in rk_clk_composite_init()
124 		sc->grf = rk_clk_composite_get_grf(clk);  in rk_clk_composite_init()
125 		if (sc->grf == NULL)  in rk_clk_composite_init()
131 	if ((sc->flags & RK_CLK_COMPOSITE_HAVE_MUX) != 0) {  in rk_clk_composite_init()
133 		READ4(clk, sc->muxdiv_offset, &val);  in rk_clk_composite_init()
136 		idx = (val & sc->mux_mask) >> sc->mux_shift;  in rk_clk_composite_init()
152 	if ((sc->flags & RK_CLK_COMPOSITE_HAVE_MUX) == 0)  in rk_clk_composite_set_mux()
157 	val |= (index << sc->mux_shift);  in rk_clk_composite_set_mux()
158 	val |= sc->mux_mask << RK_CLK_COMPOSITE_MASK_SHIFT;  in rk_clk_composite_set_mux()
159 	dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);  in rk_clk_composite_set_mux()
160 	WRITE4(clk, sc->muxdiv_offset, val);  in rk_clk_composite_set_mux()
167 rk_clk_composite_recalc(struct clknode *clk, uint64_t *freq)  in rk_clk_composite_recalc()  argument
176 	READ4(clk, sc->muxdiv_offset, &reg);  in rk_clk_composite_recalc()
177 	dprintf("Read: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, reg);  in rk_clk_composite_recalc()
181 	div = ((reg & sc->div_mask) >> sc->div_shift);  in rk_clk_composite_recalc()
182 	if (sc->flags & RK_CLK_COMPOSITE_DIV_EXP)  in rk_clk_composite_recalc()
186 	dprintf("parent_freq=%ju, div=%u\n", *freq, div);  in rk_clk_composite_recalc()
187 	*freq = *freq / div;  in rk_clk_composite_recalc()
188 	dprintf("Final freq=%ju\n", *freq);  in rk_clk_composite_recalc()
194     uint64_t freq, uint32_t *reg)  in rk_clk_composite_find_best()  argument
204 	for (div_reg = 0;  div_reg <= ((sc->div_mask >> sc->div_shift) + 1);  in rk_clk_composite_find_best()
206 		if (sc->flags == RK_CLK_COMPOSITE_DIV_EXP)  in rk_clk_composite_find_best()
211 		if ((freq - cur) < (freq - best)) {  in rk_clk_composite_find_best()
234 	dprintf("Finding best parent/div for target freq of %ju\n", *fout);  in rk_clk_composite_set_freq()
240 		dprintf("Testing with parent %s (%d) at freq %ju\n",  in rk_clk_composite_set_freq()
244 		if ((*fout - cur) < (*fout - best)) {  in rk_clk_composite_set_freq()
249 			dprintf("Best parent so far %s (%d) with best freq at "  in rk_clk_composite_set_freq()
272 		dprintf("Switching parent index from %d to %d\n", p_idx,  in rk_clk_composite_set_freq()
278 	dprintf(" div_mask: 0x%X, div_shift: %d\n", sc->div_mask,  in rk_clk_composite_set_freq()
279 	    sc->div_shift);  in rk_clk_composite_set_freq()
282 	val = best_div_reg << sc->div_shift;  in rk_clk_composite_set_freq()
283 	val |= sc->div_mask << RK_CLK_COMPOSITE_MASK_SHIFT;  in rk_clk_composite_set_freq()
284 	dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);  in rk_clk_composite_set_freq()
285 	WRITE4(clk, sc->muxdiv_offset, val);  in rk_clk_composite_set_freq()
313 	    &clkdef->clkdef);  in rk_clk_composite_register()
319 	sc->muxdiv_offset = clkdef->muxdiv_offset;  in rk_clk_composite_register()
321 	sc->mux_shift = clkdef->mux_shift;  in rk_clk_composite_register()
322 	sc->mux_width = clkdef->mux_width;  in rk_clk_composite_register()
323 	sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;  in rk_clk_composite_register()
325 	sc->div_shift = clkdef->div_shift;  in rk_clk_composite_register()
326 	sc->div_width = clkdef->div_width;  in rk_clk_composite_register()
327 	sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift;  in rk_clk_composite_register()
329 	sc->flags = clkdef->flags;  in rk_clk_composite_register()