Lines Matching +full:pci +full:- +full:host +full:- +full:cam +full:- +full:generic
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Common Interface for SCSI-3 Support driver.
33 * CISS claims to provide a common interface between a generic SCSI
34 * transport and an intelligent host adapter.
37 * Interface for SCSI-3 Support Open Specification", Version 1.04,
40 * arbitrarlily cut-down version of a larger (and probably even more
44 * We provide a shim layer between the CISS interface and CAM,
45 * offloading most of the queueing and being-a-disk chores onto CAM.
46 * Entry to the driver is via the PCI bus attachment (ciss_probe,
47 * ciss_attach, etc) and via the CAM interface (ciss_cam_action,
55 * Note that we only support the "simple" transport layer over PCI.
88 #include <cam/cam.h>
89 #include <cam/cam_ccb.h>
90 #include <cam/cam_periph.h>
91 #include <cam/cam_sim.h>
92 #include <cam/cam_xpt_sim.h>
93 #include <cam/scsi/scsi_all.h>
94 #include <cam/scsi/scsi_message.h>
101 #include <dev/pci/pcireg.h>
102 #include <dev/pci/pcivar.h>
115 /* pci interface */
177 /* CAM interface */
212 * PCI bus interface.
312 * value. (One could say some very despairing things about PCI and
405 DRIVER_MODULE(ciss, pci, ciss_pci_driver, 0, 0);
406 MODULE_PNP_INFO("U16:vendor;U16:device;", pci, ciss, ciss_vendor_data,
407 nitems(ciss_vendor_data) - 1);
408 MODULE_DEPEND(ciss, cam, 1, 1, 1);
409 MODULE_DEPEND(ciss, pci, 1, 1, 1);
424 return(-1);
436 if (i != -1) {
495 sc->ciss_dev = dev;
496 mtx_init(&sc->ciss_mtx, "cissmtx", NULL, MTX_DEF);
497 callout_init_mtx(&sc->ciss_periodic, &sc->ciss_mtx, 0);
500 * Do PCI-specific init.
541 * Enable interrupts so that the CAM scan can complete.
546 * Initialise the CAM interface.
559 sc->ciss_dev_t = make_dev(&ciss_cdevsw, device_get_unit(sc->ciss_dev),
561 "ciss%d", device_get_unit(sc->ciss_dev));
562 sc->ciss_dev_t->si_drv1 = sc;
568 sc->ciss_flags |= CISS_FLAG_RUNNING;
576 mtx_lock(&sc->ciss_mtx);
592 mtx_lock(&sc->ciss_mtx);
593 if (sc->ciss_flags & CISS_FLAG_CONTROL_OPEN) {
594 mtx_unlock(&sc->ciss_mtx);
617 mtx_lock(&sc->ciss_mtx);
621 if (sc->ciss_soft_reset)
623 mtx_unlock(&sc->ciss_mtx);
632 SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->ciss_dev),
633 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->ciss_dev)),
634 OID_AUTO, "soft_reset", CTLFLAG_RW, &sc->ciss_soft_reset, 0, "");
638 * Perform PCI-specific attachment actions.
653 i = ciss_lookup(sc->ciss_dev);
677 sc->ciss_regs_rid = CISS_TL_SIMPLE_BAR_REGS;
678 if ((sc->ciss_regs_resource =
679 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_MEMORY,
680 &sc->ciss_regs_rid, RF_ACTIVE)) == NULL) {
684 sc->ciss_regs_bhandle = rman_get_bushandle(sc->ciss_regs_resource);
685 sc->ciss_regs_btag = rman_get_bustag(sc->ciss_regs_resource);
691 sc->ciss_cfg_rid = CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_CFG_BAR) & 0xffff;
692 if (sc->ciss_cfg_rid != sc->ciss_regs_rid) {
693 if ((sc->ciss_cfg_resource =
694 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_MEMORY,
695 &sc->ciss_cfg_rid, RF_ACTIVE)) == NULL) {
699 cbase = (uintptr_t)rman_get_virtual(sc->ciss_cfg_resource);
700 csize = rman_get_end(sc->ciss_cfg_resource) -
701 rman_get_start(sc->ciss_cfg_resource) + 1;
703 cbase = (uintptr_t)rman_get_virtual(sc->ciss_regs_resource);
704 csize = rman_get_end(sc->ciss_regs_resource) -
705 rman_get_start(sc->ciss_regs_resource) + 1;
711 * sanity-check the config structure. If it's OK, point to it.
717 sc->ciss_cfg = (struct ciss_config_table *)(cbase + cofs);
718 debug(1, "config struct at %p", sc->ciss_cfg);
724 sc->ciss_max_requests = min(CISS_MAX_REQUESTS, sc->ciss_cfg->max_outstanding_commands);
730 if (strncmp(sc->ciss_cfg->signature, "CISS", 4)) {
732 sc->ciss_cfg->signature[0], sc->ciss_cfg->signature[1],
733 sc->ciss_cfg->signature[2], sc->ciss_cfg->signature[3]);
740 if (!(sc->ciss_cfg->supported_methods &
743 sc->ciss_cfg->supported_methods);
761 supported_methods = sc->ciss_cfg->supported_methods;
768 sc->ciss_perf = (struct ciss_perf_config *)(cbase + cofs +
769 sc->ciss_cfg->transport_offset);
778 sc->ciss_cfg->supported_methods);
786 sc->ciss_cfg->requested_method = method;
787 sc->ciss_cfg->command_physlimit = 0;
788 sc->ciss_cfg->interrupt_coalesce_delay = CISS_INTERRUPT_COALESCE_DELAY;
789 sc->ciss_cfg->interrupt_coalesce_count = CISS_INTERRUPT_COALESCE_COUNT;
792 sc->ciss_cfg->host_driver |= CISS_DRIVER_SCSI_PREFETCH;
800 if ((sc->ciss_cfg->active_method & method) == 0) {
805 sc->ciss_cfg->active_method);
820 sc->ciss_irq_rid[0] = 0;
833 sc->ciss_interrupt_mask = CISS_TL_PERF_INTR_OPQ | CISS_TL_PERF_INTR_MSI;
841 sc->ciss_perf = NULL;
843 sc->ciss_interrupt_mask = sqmask;
854 if ((sc->ciss_irq_resource =
855 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_IRQ, &sc->ciss_irq_rid[0],
861 if (bus_setup_intr(sc->ciss_dev, sc->ciss_irq_resource,
863 &sc->ciss_intr)) {
869 * Allocate the parent bus DMA tag appropriate for our PCI
872 * Note that "simple" adapters can only address within a 32-bit
875 if (bus_dma_tag_create(bus_get_dma_tag(sc->ciss_dev),/* PCI parent */
885 &sc->ciss_parent_dmat)) {
891 * Create DMA tag for mapping buffers into adapter-addressable
894 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
899 (CISS_MAX_SG_ELEMENTS - 1) * PAGE_SIZE, /* maxsize */
903 busdma_lock_mutex, &sc->ciss_mtx, /* lockfunc, lockarg */
904 &sc->ciss_buffer_dmat)) {
913 * Four interrupts are available, but we only use 1 right now. If MSI-X
922 i = ciss_lookup(sc->ciss_dev);
930 val = pci_msix_count(sc->ciss_dev);
932 val = pci_msi_count(sc->ciss_dev);
933 device_printf(sc->ciss_dev, "got %d MSI messages]\n", val);
938 if (pci_alloc_msix(sc->ciss_dev, &val) != 0) {
939 if (pci_alloc_msi(sc->ciss_dev, &val) != 0)
943 sc->ciss_msi = val;
949 sc->ciss_irq_rid[i] = i + 1;
961 struct ciss_perf_config *pc = sc->ciss_perf;
967 reply_size = sizeof(uint64_t) * sc->ciss_max_requests;
968 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
977 &sc->ciss_reply_dmat)) {
984 if (bus_dmamem_alloc(sc->ciss_reply_dmat, (void **)&sc->ciss_reply,
985 BUS_DMA_NOWAIT, &sc->ciss_reply_map)) {
989 bus_dmamap_load(sc->ciss_reply_dmat, sc->ciss_reply_map, sc->ciss_reply,
990 reply_size, ciss_command_map_helper, &sc->ciss_reply_phys, 0);
991 bzero(sc->ciss_reply, reply_size);
993 sc->ciss_cycle = 0x1;
994 sc->ciss_rqidx = 0;
1000 * for page-aligned i/o's, but since most i/o comes from the various pagers,
1003 pc->fetch_count[CISS_SG_FETCH_NONE] = (sizeof(struct ciss_command) + 15) / 16;
1004 pc->fetch_count[CISS_SG_FETCH_1] =
1006 pc->fetch_count[CISS_SG_FETCH_2] =
1008 pc->fetch_count[CISS_SG_FETCH_4] =
1010 pc->fetch_count[CISS_SG_FETCH_8] =
1012 pc->fetch_count[CISS_SG_FETCH_16] =
1014 pc->fetch_count[CISS_SG_FETCH_32] =
1016 pc->fetch_count[CISS_SG_FETCH_MAX] = (CISS_COMMAND_ALLOC_SIZE + 15) / 16;
1018 pc->rq_size = sc->ciss_max_requests; /* XXX less than the card supports? */
1019 pc->rq_count = 1; /* XXX Hardcode for a single queue */
1020 pc->rq_bank_hi = 0;
1021 pc->rq_bank_lo = 0;
1022 pc->rq[0].rq_addr_hi = 0x0;
1023 pc->rq[0].rq_addr_lo = sc->ciss_reply_phys;
1041 if (!(sc->ciss_cfg->active_method & CISS_TRANSPORT_METHOD_READY)) {
1043 for (i = 0; !(sc->ciss_cfg->active_method & CISS_TRANSPORT_METHOD_READY); i++) {
1119 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
1121 if (sc->ciss_controllers[i].physical.bus == 0)
1131 cc = cr->cr_cc;
1132 cc->header.address = sc->ciss_controllers[i];
1164 sc->ciss_max_requests, sc->ciss_cfg->max_outstanding_commands);
1169 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
1175 sc->ciss_max_requests, 1, /* maxsize, nsegments */
1179 &sc->ciss_command_dmat)) {
1186 if (bus_dmamem_alloc(sc->ciss_command_dmat, (void **)&sc->ciss_command,
1187 BUS_DMA_NOWAIT, &sc->ciss_command_map)) {
1191 bus_dmamap_load(sc->ciss_command_dmat, sc->ciss_command_map,sc->ciss_command,
1192 CISS_COMMAND_ALLOC_SIZE * sc->ciss_max_requests,
1193 ciss_command_map_helper, &sc->ciss_command_phys, 0);
1194 bzero(sc->ciss_command, CISS_COMMAND_ALLOC_SIZE * sc->ciss_max_requests);
1200 for (i = 1; i < sc->ciss_max_requests; i++) {
1201 cr = &sc->ciss_request[i];
1202 cr->cr_sc = sc;
1203 cr->cr_tag = i;
1204 cr->cr_cc = (struct ciss_command *)((uintptr_t)sc->ciss_command +
1206 cr->cr_ccphys = sc->ciss_command_phys + CISS_COMMAND_ALLOC_SIZE * i;
1207 bus_dmamap_create(sc->ciss_buffer_dmat, 0, &cr->cr_datamap);
1239 (void **)&sc->ciss_id,
1240 sizeof(*sc->ciss_id))) != 0)
1268 /* sanity-check reply */
1269 if (!(sc->ciss_id->controller_flags & CONTROLLER_FLAGS_BIG_MAP_SUPPORT)) {
1277 sc->ciss_flags |= CISS_FLAG_FAKE_SYNCH;
1281 sc->ciss_flags |= CISS_FLAG_BMIC_ABORT;
1289 if (sc->ciss_cfg->max_logical_supported == 0)
1290 sc->ciss_cfg->max_logical_supported = CISS_MAX_LOGICAL;
1291 if (sc->ciss_cfg->max_physical_supported == 0)
1292 sc->ciss_cfg->max_physical_supported = CISS_MAX_PHYSICAL;
1296 sc->ciss_id->configured_logical_drives,
1297 (sc->ciss_id->configured_logical_drives == 1) ? "" : "s");
1298 ciss_printf(sc, " firmware %4.4s\n", sc->ciss_id->running_firmware_revision);
1299 ciss_printf(sc, " %d SCSI channels\n", sc->ciss_id->scsi_chip_count);
1302 ciss_printf(sc, " %d FC channels\n", sc->ciss_id->fibre_chip_count);
1303 ciss_printf(sc, " %d enclosures\n", sc->ciss_id->bEnclosureCount);
1304 ciss_printf(sc, " %d expanders\n", sc->ciss_id->bExpanderCount);
1305 ciss_printf(sc, " maximum blocks: %d\n", sc->ciss_id->maximum_blocks);
1306 ciss_printf(sc, " controller clock: %d\n", sc->ciss_id->controller_clock);
1307 ciss_printf(sc, " %d MB controller memory\n", sc->ciss_id->total_controller_mem_mb);
1310 ciss_printf(sc, " signature '%.4s'\n", sc->ciss_cfg->signature);
1311 ciss_printf(sc, " valence %d\n", sc->ciss_cfg->valence);
1313 sc->ciss_cfg->supported_methods,
1316 sc->ciss_cfg->active_method, "\20\2simple\3performant\4MEMQ\n");
1318 sc->ciss_cfg->command_physlimit);
1320 sc->ciss_cfg->interrupt_coalesce_delay);
1322 sc->ciss_cfg->interrupt_coalesce_count);
1324 sc->ciss_cfg->max_outstanding_commands);
1325 ciss_printf(sc, " bus types 0x%b\n", sc->ciss_cfg->bus_types,
1327 ciss_printf(sc, " server name '%.16s'\n", sc->ciss_cfg->server_name);
1328 ciss_printf(sc, " heartbeat 0x%x\n", sc->ciss_cfg->heartbeat);
1329 ciss_printf(sc, " max logical volumes: %d\n", sc->ciss_cfg->max_logical_supported);
1330 ciss_printf(sc, " max physical disks supported: %d\n", sc->ciss_cfg->max_physical_supported);
1331 ciss_printf(sc, " max physical disks per logical volume: %d\n", sc->ciss_cfg->max_physical_per_logical);
1332 ciss_printf(sc, " JBOD Support is %s\n", (sc->ciss_id->uiYetMoreControllerFlags & YMORE_CONTROLLER_FLAGS_JBOD_SUPPORTED) ?
1334 ciss_printf(sc, " JBOD Mode is %s\n", (sc->ciss_id->PowerUPNvramFlags & PWR_UP_FLAG_JBOD_ENABLED) ?
1340 if (sc->ciss_id != NULL) {
1341 free(sc->ciss_id, CISS_MALLOC_CLASS);
1342 sc->ciss_id = NULL;
1384 cc = cr->cr_cc;
1385 cr->cr_data = cll;
1386 cr->cr_length = report_size;
1387 cr->cr_flags = CISS_REQ_DATAIN;
1389 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
1390 cc->header.address.physical.bus = 0;
1391 cc->header.address.physical.target = 0;
1392 cc->cdb.cdb_length = sizeof(*crc);
1393 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
1394 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
1395 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
1396 cc->cdb.timeout = 30; /* XXX better suggestions? */
1398 crc = (struct ciss_report_cdb *)&(cc->cdb.cdb[0]);
1400 crc->opcode = opcode;
1401 crc->length = htonl(report_size); /* big-endian field */
1402 cll->list_size = htonl(report_size - sizeof(*cll)); /* big-endian field */
1423 sc->ciss_cfg->max_logical_supported);
1457 sc->ciss_cfg->max_logical_supported);
1463 /* sanity-check reply */
1464 ndrives = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1465 if ((ndrives < 0) || (ndrives > sc->ciss_cfg->max_logical_supported)) {
1467 ndrives, sc->ciss_cfg->max_logical_supported);
1480 sc->ciss_logical =
1481 malloc(sc->ciss_max_logical_bus * sizeof(struct ciss_ldrive *),
1483 if (sc->ciss_logical == NULL) {
1488 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
1489 sc->ciss_logical[i] =
1490 malloc(sc->ciss_cfg->max_logical_supported *
1493 if (sc->ciss_logical[i] == NULL) {
1498 for (j = 0; j < sc->ciss_cfg->max_logical_supported; j++)
1499 sc->ciss_logical[i][j].cl_status = CISS_LD_NONEXISTENT;
1502 for (i = 0; i < sc->ciss_cfg->max_logical_supported; i++) {
1507 bus = CISS_LUN_TO_BUS(cll->lun[i].logical.lun);
1508 target = CISS_LUN_TO_TARGET(cll->lun[i].logical.lun);
1509 ld = &sc->ciss_logical[bus][target];
1511 ld->cl_address = cll->lun[i];
1512 ld->cl_controller = &sc->ciss_controllers[bus];
1518 if (ld->cl_lstatus->media_exchanged)
1542 sc->ciss_cfg->max_physical_supported);
1548 nphys = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1555 /* Per-controller highest target number seen */
1556 sc->ciss_max_physical_target = 0;
1564 * numbering space for CAM. Logical buses occupy the first 32 CAM bus
1568 * ciss_controllers[] - indexed by logical bus
1569 * ciss_cam_sim[] - indexed by both logical and physical, with physical
1571 * ciss_logical[][] - indexed by logical bus
1572 * ciss_physical[][] - indexed by physical bus
1577 * the cookie in the CAM device object, we have to keep these lookup
1585 * behind the primary PCI controller. We need to know about this
1587 * proxy controllers attached to a single PCI controller, so
1591 sc->ciss_max_logical_bus = 1;
1593 if (cll->lun[i].physical.extra_address == 0) {
1594 bus = cll->lun[i].physical.bus;
1595 sc->ciss_max_logical_bus = max(sc->ciss_max_logical_bus, bus) + 1;
1597 bus = CISS_EXTRA_BUS2(cll->lun[i].physical.extra_address);
1598 sc->ciss_max_physical_bus = max(sc->ciss_max_physical_bus, bus);
1602 sc->ciss_controllers =
1603 malloc(sc->ciss_max_logical_bus * sizeof (union ciss_device_address),
1606 if (sc->ciss_controllers == NULL) {
1614 if (cll->lun[i].physical.extra_address == 0) {
1615 sc->ciss_controllers[cll->lun[i].physical.bus] = cll->lun[i];
1619 sc->ciss_physical =
1620 malloc(sc->ciss_max_physical_bus * sizeof(struct ciss_pdrive *),
1622 if (sc->ciss_physical == NULL) {
1628 for (i = 0; i < sc->ciss_max_physical_bus; i++) {
1629 sc->ciss_physical[i] =
1632 if (sc->ciss_physical[i] == NULL) {
1641 ciss_printf(sc, "max physical target id: %d\n", sc->ciss_max_physical_target);
1657 nphys = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1659 if (cll->lun[i].physical.extra_address == 0)
1674 ea = cll->lun[i].physical.extra_address;
1679 (cll->lun[i].physical.mode == CISS_HDR_ADDRESS_MODE_MASK_PERIPHERAL))
1687 bus = CISS_EXTRA_BUS2(ea) - 1;
1689 sc->ciss_physical[bus][target].cp_address = cll->lun[i];
1690 sc->ciss_physical[bus][target].cp_online = 1;
1692 if ((target > sc->ciss_max_physical_target) &&
1693 (cll->lun[i].physical.mode != CISS_HDR_ADDRESS_MODE_MASK_PERIPHERAL))
1694 sc->ciss_max_physical_target = target;
1711 bzero(&ld->cl_geometry, sizeof(ld->cl_geometry));
1716 cc = cr->cr_cc;
1717 cr->cr_data = &ld->cl_geometry;
1718 cr->cr_length = sizeof(ld->cl_geometry);
1719 cr->cr_flags = CISS_REQ_DATAIN;
1721 cc->header.address = ld->cl_address;
1722 cc->cdb.cdb_length = 6;
1723 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
1724 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
1725 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
1726 cc->cdb.timeout = 30;
1728 inq = (struct scsi_inquiry *)&(cc->cdb.cdb[0]);
1729 inq->opcode = INQUIRY;
1730 inq->byte2 = SI_EVPD;
1731 inq->page_code = CISS_VPD_LOGICAL_DRIVE_GEOMETRY;
1732 scsi_ulto2b(sizeof(ld->cl_geometry), inq->length);
1777 (void **)&ld->cl_ldrive,
1778 sizeof(*ld->cl_ldrive))) != 0)
1780 cc = cr->cr_cc;
1781 cc->header.address = *ld->cl_controller; /* target controller */
1782 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
1783 cbc->log_drive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
1829 CISS_LUN_TO_BUS(ld->cl_address.logical.lun),
1830 CISS_LUN_TO_TARGET(ld->cl_address.logical.lun),
1831 ciss_name_ldrive_org(ld->cl_ldrive->fault_tolerance),
1832 ((ld->cl_ldrive->blocks_available / (1024 * 1024)) *
1833 ld->cl_ldrive->block_size));
1839 /* make the drive not-exist */
1840 ld->cl_status = CISS_LD_NONEXISTENT;
1841 if (ld->cl_ldrive != NULL) {
1842 free(ld->cl_ldrive, CISS_MALLOC_CLASS);
1843 ld->cl_ldrive = NULL;
1845 if (ld->cl_lstatus != NULL) {
1846 free(ld->cl_lstatus, CISS_MALLOC_CLASS);
1847 ld->cl_lstatus = NULL;
1873 (void **)&ld->cl_lstatus,
1874 sizeof(*ld->cl_lstatus))) != 0)
1876 cc = cr->cr_cc;
1877 cc->header.address = *ld->cl_controller; /* target controller */
1878 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
1879 cbc->log_drive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
1912 ld->cl_status = ciss_decode_ldrive_status(ld->cl_lstatus->status);
1956 ldrive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
1966 cc = cr->cr_cc;
1967 cc->header.address = *ld->cl_controller; /* target controller */
1968 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
1969 cbc->log_drive = ldrive;
1988 ciss_printf(cr->cr_sc, "error accepting media into failed logical drive (%s)\n",
2011 sc->ciss_flags |= CISS_FLAG_ABORTING;
2014 callout_stop(&sc->ciss_periodic);
2021 /* disconnect from CAM */
2022 if (sc->ciss_cam_sim) {
2023 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
2024 if (sc->ciss_cam_sim[i]) {
2025 xpt_bus_deregister(cam_sim_path(sc->ciss_cam_sim[i]));
2026 cam_sim_free(sc->ciss_cam_sim[i], 0);
2029 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
2031 if (sc->ciss_cam_sim[i]) {
2032 xpt_bus_deregister(cam_sim_path(sc->ciss_cam_sim[i]));
2033 cam_sim_free(sc->ciss_cam_sim[i], 0);
2036 free(sc->ciss_cam_sim, CISS_MALLOC_CLASS);
2038 if (sc->ciss_cam_devq)
2039 cam_simq_free(sc->ciss_cam_devq);
2042 mtx_unlock(&sc->ciss_mtx);
2043 if (sc->ciss_dev_t != NULL)
2044 destroy_dev(sc->ciss_dev_t);
2047 callout_drain(&sc->ciss_periodic);
2048 mtx_destroy(&sc->ciss_mtx);
2051 if (sc->ciss_id != NULL)
2052 free(sc->ciss_id, CISS_MALLOC_CLASS);
2055 if (sc->ciss_regs_resource != NULL)
2056 bus_release_resource(sc->ciss_dev, SYS_RES_MEMORY,
2057 sc->ciss_regs_rid, sc->ciss_regs_resource);
2058 if (sc->ciss_cfg_resource != NULL)
2059 bus_release_resource(sc->ciss_dev, SYS_RES_MEMORY,
2060 sc->ciss_cfg_rid, sc->ciss_cfg_resource);
2061 if (sc->ciss_intr != NULL)
2062 bus_teardown_intr(sc->ciss_dev, sc->ciss_irq_resource, sc->ciss_intr);
2063 if (sc->ciss_irq_resource != NULL)
2064 bus_release_resource(sc->ciss_dev, SYS_RES_IRQ,
2065 sc->ciss_irq_rid[0], sc->ciss_irq_resource);
2066 if (sc->ciss_msi)
2067 pci_release_msi(sc->ciss_dev);
2070 bus_dmamap_destroy(sc->ciss_buffer_dmat, cr->cr_datamap);
2071 if (sc->ciss_buffer_dmat)
2072 bus_dma_tag_destroy(sc->ciss_buffer_dmat);
2075 if (sc->ciss_command != NULL) {
2076 bus_dmamap_unload(sc->ciss_command_dmat, sc->ciss_command_map);
2077 bus_dmamem_free(sc->ciss_command_dmat, sc->ciss_command, sc->ciss_command_map);
2079 if (sc->ciss_command_dmat)
2080 bus_dma_tag_destroy(sc->ciss_command_dmat);
2082 if (sc->ciss_reply) {
2083 bus_dmamap_unload(sc->ciss_reply_dmat, sc->ciss_reply_map);
2084 bus_dmamem_free(sc->ciss_reply_dmat, sc->ciss_reply, sc->ciss_reply_map);
2086 if (sc->ciss_reply_dmat)
2087 bus_dma_tag_destroy(sc->ciss_reply_dmat);
2090 if (sc->ciss_parent_dmat)
2091 bus_dma_tag_destroy(sc->ciss_parent_dmat);
2092 if (sc->ciss_logical) {
2093 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
2094 for (j = 0; j < sc->ciss_cfg->max_logical_supported; j++) {
2095 if (sc->ciss_logical[i][j].cl_ldrive)
2096 free(sc->ciss_logical[i][j].cl_ldrive, CISS_MALLOC_CLASS);
2097 if (sc->ciss_logical[i][j].cl_lstatus)
2098 free(sc->ciss_logical[i][j].cl_lstatus, CISS_MALLOC_CLASS);
2100 free(sc->ciss_logical[i], CISS_MALLOC_CLASS);
2102 free(sc->ciss_logical, CISS_MALLOC_CLASS);
2105 if (sc->ciss_physical) {
2106 for (i = 0; i < sc->ciss_max_physical_bus; i++)
2107 free(sc->ciss_physical[i], CISS_MALLOC_CLASS);
2108 free(sc->ciss_physical, CISS_MALLOC_CLASS);
2111 if (sc->ciss_controllers)
2112 free(sc->ciss_controllers, CISS_MALLOC_CLASS);
2133 debug(2, "post command %d tag %d ", cr->cr_tag, cr->cr_cc->header.host_tag);
2182 if (index >= sc->ciss_max_requests) {
2186 cr = &(sc->ciss_request[index]);
2187 cc = cr->cr_cc;
2188 cc->header.host_tag = tag; /* not updated by adapter */
2208 tag = sc->ciss_reply[sc->ciss_rqidx];
2209 if ((tag & CISS_CYCLE_MASK) != sc->ciss_cycle)
2214 if (index < sc->ciss_max_requests) {
2215 cr = &(sc->ciss_request[index]);
2216 cc = cr->cr_cc;
2217 cc->header.host_tag = tag; /* not updated by adapter */
2222 if (++sc->ciss_rqidx == sc->ciss_max_requests) {
2223 sc->ciss_rqidx = 0;
2224 sc->ciss_cycle ^= 1;
2245 mtx_lock(&sc->ciss_mtx);
2247 mtx_unlock(&sc->ciss_mtx);
2272 mtx_lock(&sc->ciss_mtx);
2274 mtx_unlock(&sc->ciss_mtx);
2282 * - by invoking a callback function (cr_complete is non-null)
2283 * - by waking up a sleeper (cr_flags has CISS_REQ_SLEEP set)
2284 * - by clearing the CISS_REQ_POLL flag in interrupt/timeout context
2302 if ((cr->cr_flags & CISS_REQ_BUSY) == 0)
2303 ciss_printf(sc, "WARNING: completing non-busy request\n");
2304 cr->cr_flags &= ~CISS_REQ_BUSY;
2309 if (cr->cr_complete != NULL) {
2310 cr->cr_complete(cr);
2317 if (cr->cr_flags & CISS_REQ_SLEEP) {
2318 cr->cr_flags &= ~CISS_REQ_SLEEP;
2326 if (cr->cr_flags & CISS_REQ_POLL) {
2327 cr->cr_flags &= ~CISS_REQ_POLL;
2352 cc = cr->cr_cc;
2353 ce = (struct ciss_error_info *)&(cc->sg[0]);
2359 if ((cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) &&
2360 ((ce->command_status == CISS_CMD_STATUS_DATA_OVERRUN) ||
2361 (ce->command_status == CISS_CMD_STATUS_DATA_UNDERRUN)) &&
2362 ((cc->cdb.cdb[0] == CISS_OPCODE_REPORT_LOGICAL_LUNS) ||
2363 (cc->cdb.cdb[0] == CISS_OPCODE_REPORT_PHYSICAL_LUNS) ||
2364 (cc->cdb.cdb[0] == RECEIVE_DIAGNOSTIC) ||
2365 (cc->cdb.cdb[0] == INQUIRY))) {
2366 cc->header.host_tag &= ~CISS_HDR_HOST_TAG_ERROR;
2374 if (!(cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR)) {
2382 *command_status = ce->command_status;
2384 if (ce->command_status == CISS_CMD_STATUS_DATA_UNDERRUN) {
2386 } else if (ce->command_status == CISS_CMD_STATUS_TARGET_STATUS) {
2387 *scsi_status = ce->scsi_status;
2389 *scsi_status = -1;
2392 if ((bootverbose || ciss_verbose > 3 || (ciss_verbose > 2 && ce->scsi_status != 0)) &&
2393 (ce->command_status != CISS_CMD_STATUS_DATA_UNDERRUN)) {
2394 ciss_printf(cr->cr_sc, "command status 0x%x (%s) scsi status 0x%x (opcode 0x%02x)\n",
2395 ce->command_status, ciss_name_command_status(ce->command_status),
2396 ce->scsi_status,
2397 cc->cdb.cdb[0]);
2399 if (ce->command_status == CISS_CMD_STATUS_INVALID_COMMAND) {
2400 ciss_printf(cr->cr_sc, "invalid command, offense size %d at %d, value 0x%x, function %s\n",
2401 ce->additional_error_info.invalid_command.offense_size,
2402 ce->additional_error_info.invalid_command.offense_offset,
2403 ce->additional_error_info.invalid_command.offense_value,
2422 if (cr->cr_sc->ciss_flags & CISS_FLAG_RUNNING) {
2444 sc = cr->cr_sc;
2445 cr->cr_flags |= CISS_REQ_POLL;
2450 if (sc->ciss_perf)
2455 if (!(cr->cr_flags & CISS_REQ_POLL))
2458 } while (timeout-- >= 0);
2475 cr->cr_flags |= CISS_REQ_SLEEP;
2479 while ((cr->cr_flags & CISS_REQ_SLEEP) && (error != EWOULDBLOCK)) {
2480 error = msleep_sbt(cr, &cr->cr_sc->ciss_mtx, PRIBIO, "cissREQ",
2502 if ((error = ciss_get_request(ar->cr_sc, &cr)) != 0)
2506 cc = cr->cr_cc;
2507 cc->header.address.mode.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL; /* addressing? */
2508 cc->header.address.physical.target = 0;
2509 cc->header.address.physical.bus = 0;
2510 cc->cdb.cdb_length = sizeof(*cmc);
2511 cc->cdb.type = CISS_CDB_TYPE_MESSAGE;
2512 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
2513 cc->cdb.direction = CISS_CDB_DIRECTION_NONE;
2514 cc->cdb.timeout = 30;
2516 cmc = (struct ciss_message_cdb *)&(cc->cdb.cdb[0]);
2517 cmc->opcode = CISS_OPCODE_MESSAGE_ABORT;
2518 cmc->type = CISS_MESSAGE_ABORT_TASK;
2519 cmc->abort_tag = ar->cr_tag; /* endianness?? */
2551 cr->cr_data = NULL;
2552 cr->cr_flags = 0;
2553 cr->cr_complete = NULL;
2554 cr->cr_private = NULL;
2555 cr->cr_sg_tag = CISS_SG_MAX; /* Backstop to prevent accidents */
2574 cc = cr->cr_cc;
2575 cc->header.sg_in_list = 0; /* kinda inefficient this way */
2576 cc->header.sg_total = 0;
2577 cc->header.host_tag = cr->cr_tag << 2;
2578 cc->header.host_tag_zeroes = 0;
2579 bzero(&(cc->sg[0]), CISS_COMMAND_ALLOC_SIZE - sizeof(struct ciss_command));
2580 cmdphys = cr->cr_ccphys;
2581 cc->error_info.error_info_address = cmdphys + sizeof(struct ciss_command);
2582 cc->error_info.error_info_length = CISS_COMMAND_ALLOC_SIZE - sizeof(struct ciss_command);
2643 cr->cr_data = buf;
2644 cr->cr_length = bufsize;
2646 cr->cr_flags = CISS_REQ_DATAIN;
2648 cc = cr->cr_cc;
2649 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
2650 cc->header.address.physical.bus = 0;
2651 cc->header.address.physical.target = 0;
2652 cc->cdb.cdb_length = sizeof(*cbc);
2653 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
2654 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
2655 cc->cdb.direction = dataout ? CISS_CDB_DIRECTION_WRITE : CISS_CDB_DIRECTION_READ;
2656 cc->cdb.timeout = 0;
2658 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
2660 cbc->opcode = dataout ? CISS_ARRAY_CONTROLLER_WRITE : CISS_ARRAY_CONTROLLER_READ;
2661 cbc->bmic_opcode = opcode;
2662 cbc->size = htons((u_int16_t)bufsize);
2695 msleep(sc, &sc->ciss_mtx, PPAUSE, "cissREQ", hz);
2696 cc = cr->cr_cc;
2699 * Allocate an in-kernel databuffer if required, copy in user data.
2701 mtx_unlock(&sc->ciss_mtx);
2702 cr->cr_length = ioc->buf_size;
2703 if (ioc->buf_size > 0) {
2704 if ((cr->cr_data = malloc(ioc->buf_size, CISS_MALLOC_CLASS, M_NOWAIT)) == NULL) {
2708 if ((error = copyin(ioc->buf, cr->cr_data, ioc->buf_size))) {
2709 debug(0, "copyin: bad data buffer %p/%d", ioc->buf, ioc->buf_size);
2717 bcopy(&ioc->LUN_info, &cc->header.address, sizeof(cc->header.address));
2718 bcopy(&ioc->Request, &cc->cdb, sizeof(cc->cdb));
2721 mtx_lock(&sc->ciss_mtx);
2727 debug(0, "request failed - %d", error);
2734 ce = (struct ciss_error_info *)&(cc->sg[0]);
2735 if ((cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) == 0)
2741 bcopy(ce, &ioc->error_info, sizeof(*ce));
2742 mtx_unlock(&sc->ciss_mtx);
2743 if ((ioc->buf_size > 0) &&
2744 (error = copyout(cr->cr_data, ioc->buf, ioc->buf_size))) {
2745 debug(0, "copyout: bad data buffer %p/%d", ioc->buf, ioc->buf_size);
2753 mtx_lock(&sc->ciss_mtx);
2756 if ((cr != NULL) && (cr->cr_data != NULL))
2757 free(cr->cr_data, CISS_MALLOC_CLASS);
2764 * Map a request into bus-visible space, initialise the scatter/gather
2775 sc = cr->cr_sc;
2778 if (cr->cr_flags & CISS_REQ_MAPPED)
2781 cr->cr_flags |= CISS_REQ_MAPPED;
2783 bus_dmamap_sync(sc->ciss_command_dmat, sc->ciss_command_map,
2786 if (cr->cr_data != NULL) {
2787 if (cr->cr_flags & CISS_REQ_CCB)
2788 error = bus_dmamap_load_ccb(sc->ciss_buffer_dmat,
2789 cr->cr_datamap, cr->cr_data,
2792 error = bus_dmamap_load(sc->ciss_buffer_dmat, cr->cr_datamap,
2793 cr->cr_data, cr->cr_length,
2801 cr->cr_sg_tag = CISS_SG_NONE;
2802 cr->cr_flags |= CISS_REQ_BUSY;
2803 if (sc->ciss_perf)
2806 CISS_TL_SIMPLE_POST_CMD(sc, cr->cr_ccphys);
2823 sc = cr->cr_sc;
2824 cc = cr->cr_cc;
2827 cc->sg[i].address = segs[i].ds_addr;
2828 cc->sg[i].length = segs[i].ds_len;
2829 cc->sg[i].extension = 0;
2832 cc->header.sg_in_list = nseg;
2833 cc->header.sg_total = nseg;
2835 if (cr->cr_flags & CISS_REQ_DATAIN)
2836 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_PREREAD);
2837 if (cr->cr_flags & CISS_REQ_DATAOUT)
2838 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_PREWRITE);
2841 cr->cr_sg_tag = CISS_SG_NONE;
2843 cr->cr_sg_tag = CISS_SG_1;
2845 cr->cr_sg_tag = CISS_SG_2;
2847 cr->cr_sg_tag = CISS_SG_4;
2849 cr->cr_sg_tag = CISS_SG_8;
2851 cr->cr_sg_tag = CISS_SG_16;
2853 cr->cr_sg_tag = CISS_SG_32;
2855 cr->cr_sg_tag = CISS_SG_MAX;
2860 cr->cr_flags |= CISS_REQ_BUSY;
2861 if (sc->ciss_perf)
2864 CISS_TL_SIMPLE_POST_CMD(sc, cr->cr_ccphys);
2868 * Unmap a request from bus-visible space.
2877 sc = cr->cr_sc;
2880 if ((cr->cr_flags & CISS_REQ_MAPPED) == 0)
2883 bus_dmamap_sync(sc->ciss_command_dmat, sc->ciss_command_map,
2886 if (cr->cr_data == NULL)
2889 if (cr->cr_flags & CISS_REQ_DATAIN)
2890 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_POSTREAD);
2891 if (cr->cr_flags & CISS_REQ_DATAOUT)
2892 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_POSTWRITE);
2894 bus_dmamap_unload(sc->ciss_buffer_dmat, cr->cr_datamap);
2896 cr->cr_flags &= ~CISS_REQ_MAPPED;
2900 * Attach the driver to CAM.
2915 if ((sc->ciss_cam_devq = cam_simq_alloc(sc->ciss_max_requests - 2)) == NULL) {
2916 ciss_printf(sc, "can't allocate CAM SIM queue\n");
2929 maxbus = max(sc->ciss_max_logical_bus, sc->ciss_max_physical_bus +
2931 sc->ciss_cam_sim = malloc(maxbus * sizeof(struct cam_sim*),
2933 if (sc->ciss_cam_sim == NULL) {
2938 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
2939 if ((sc->ciss_cam_sim[i] = cam_sim_alloc(ciss_cam_action, ciss_cam_poll,
2941 device_get_unit(sc->ciss_dev),
2942 &sc->ciss_mtx,
2944 sc->ciss_max_requests - 2,
2945 sc->ciss_cam_devq)) == NULL) {
2946 ciss_printf(sc, "can't allocate CAM SIM for controller %d\n", i);
2953 mtx_lock(&sc->ciss_mtx);
2954 if (i == 0 || sc->ciss_controllers[i].physical.bus != 0) {
2955 if (xpt_bus_register(sc->ciss_cam_sim[i], sc->ciss_dev, i) != 0) {
2957 mtx_unlock(&sc->ciss_mtx);
2961 mtx_unlock(&sc->ciss_mtx);
2964 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
2966 if ((sc->ciss_cam_sim[i] = cam_sim_alloc(ciss_cam_action, ciss_cam_poll,
2968 device_get_unit(sc->ciss_dev),
2969 &sc->ciss_mtx, 1,
2970 sc->ciss_max_requests - 2,
2971 sc->ciss_cam_devq)) == NULL) {
2972 ciss_printf(sc, "can't allocate CAM SIM for controller %d\n", i);
2976 mtx_lock(&sc->ciss_mtx);
2977 if (xpt_bus_register(sc->ciss_cam_sim[i], sc->ciss_dev, i) != 0) {
2979 mtx_unlock(&sc->ciss_mtx);
2982 mtx_unlock(&sc->ciss_mtx);
3003 if (xpt_create_path(&ccb->ccb_h.path, NULL,
3004 cam_sim_path(sc->ciss_cam_sim[bus]),
3015 * Handle requests coming from CAM
3027 csio = (struct ccb_scsiio *)&ccb->csio;
3028 target = csio->ccb_h.target_id;
3031 switch (ccb->ccb_h.func_code) {
3041 struct ccb_calc_geometry *ccg = &ccb->ccg;
3044 debug(1, "XPT_CALC_GEOMETRY %d:%d:%d", cam_sim_bus(sim), ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
3048 ld = &sc->ciss_logical[bus][target];
3054 if (physical || ld->cl_geometry.fault_tolerance == 0xFF) {
3057 ccg->heads = 255;
3058 ccg->secs_per_track = 32;
3059 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
3060 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
3062 ccg->heads = ld->cl_geometry.heads;
3063 ccg->secs_per_track = ld->cl_geometry.sectors;
3064 ccg->cylinders = ntohs(ld->cl_geometry.cylinders);
3066 ccb->ccb_h.status = CAM_REQ_CMP;
3073 struct ccb_pathinq *cpi = &ccb->cpi;
3076 debug(1, "XPT_PATH_INQ %d:%d:%d", cam_sim_bus(sim), ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
3078 cpi->version_num = 1;
3079 cpi->hba_inquiry = PI_TAG_ABLE; /* XXX is this correct? */
3080 cpi->target_sprt = 0;
3081 cpi->hba_misc = 0;
3082 cpi->max_target = MAX(sc->ciss_max_physical_target, sc->ciss_cfg->max_logical_supported);
3083 cpi->max_lun = 0; /* 'logical drive' channel only */
3085 cpi->initiator_id = ciss_initiator_id;
3087 cpi->initiator_id = sc->ciss_cfg->max_logical_supported;
3088 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
3089 strlcpy(cpi->hba_vid, "CISS", HBA_IDLEN);
3090 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
3091 cpi->unit_number = cam_sim_unit(sim);
3092 cpi->bus_id = cam_sim_bus(sim);
3093 cpi->base_transfer_speed = ciss_base_transfer_speed;
3094 cpi->transport = XPORT_SPI;
3095 cpi->transport_version = 2;
3096 cpi->protocol = PROTO_SCSI;
3097 cpi->protocol_version = SCSI_REV_2;
3098 if (sc->ciss_cfg->max_sg_length == 0) {
3110 sg_length = sc->ciss_cfg->max_sg_length - 1;
3111 sg_length = (1 << (fls(sg_length) - 1)) + 1;
3113 cpi->maxio = (min(CISS_MAX_SG_ELEMENTS, sg_length) - 1) * PAGE_SIZE;
3114 ccb->ccb_h.status = CAM_REQ_CMP;
3120 struct ccb_trans_settings *cts = &ccb->cts;
3121 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
3122 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
3125 ctl->ccb_h.target_id);
3127 cts->protocol = PROTO_SCSI;
3128 cts->protocol_version = SCSI_REV_2;
3129 cts->transport = XPORT_SPI;
3130 cts->transport_version = 2;
3132 spi->valid = CTS_SPI_VALID_DISC;
3133 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
3135 scsi->valid = CTS_SCSI_VALID_TQ;
3136 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
3138 cts->ccb_h.status = CAM_REQ_CMP;
3143 debug(1, "unspported func_code = 0x%x", ccb->ccb_h.func_code);
3144 ccb->ccb_h.status = CAM_REQ_INVALID;
3152 * Handle a CAM SCSI I/O request.
3165 target = csio->ccb_h.target_id;
3167 debug(2, "XPT_SCSI_IO %d:%d:%d", bus, target, csio->ccb_h.target_lun);
3170 if ((csio->ccb_h.flags & CAM_CDB_POINTER) && (csio->ccb_h.flags & CAM_CDB_PHYS)) {
3172 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3176 if ((csio->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3192 sc->ciss_flags |= CISS_FLAG_BUSY;
3193 csio->ccb_h.status |= CAM_REQUEUE_REQ;
3200 cc = cr->cr_cc;
3201 cr->cr_data = csio;
3202 cr->cr_length = csio->dxfer_len;
3203 cr->cr_complete = ciss_cam_complete;
3204 cr->cr_private = csio;
3210 cc->header.address =
3211 sc->ciss_physical[CISS_CAM_TO_PBUS(bus)][target].cp_address;
3213 cc->header.address =
3214 sc->ciss_logical[bus][target].cl_address;
3215 cc->cdb.cdb_length = csio->cdb_len;
3216 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3217 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE; /* XXX ordered tags? */
3218 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
3219 cr->cr_flags = CISS_REQ_DATAOUT | CISS_REQ_CCB;
3220 cc->cdb.direction = CISS_CDB_DIRECTION_WRITE;
3221 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
3222 cr->cr_flags = CISS_REQ_DATAIN | CISS_REQ_CCB;
3223 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3225 cr->cr_data = NULL;
3226 cr->cr_flags = 0;
3227 cc->cdb.direction = CISS_CDB_DIRECTION_NONE;
3229 cc->cdb.timeout = (csio->ccb_h.timeout / 1000) + 1;
3230 if (csio->ccb_h.flags & CAM_CDB_POINTER) {
3231 bcopy(csio->cdb_io.cdb_ptr, &cc->cdb.cdb[0], csio->cdb_len);
3233 bcopy(csio->cdb_io.cdb_bytes, &cc->cdb.cdb[0], csio->cdb_len);
3245 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
3249 csio->ccb_h.status |= CAM_REQUEUE_REQ;
3267 target = csio->ccb_h.target_id;
3268 bus = cam_sim_bus(xpt_path_sim(csio->ccb_h.path));
3269 opcode = (csio->ccb_h.flags & CAM_CDB_POINTER) ?
3270 *(u_int8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes[0];
3273 if (sc->ciss_physical[CISS_CAM_TO_PBUS(bus)][target].cp_online != 1) {
3274 csio->ccb_h.status |= CAM_SEL_TIMEOUT;
3286 if (sc->ciss_logical[bus][target].cl_status != CISS_LD_ONLINE) {
3287 csio->ccb_h.status |= CAM_SEL_TIMEOUT;
3293 if (sc->ciss_flags & CISS_FLAG_FAKE_SYNCH) {
3298 if (((csio->ccb_h.flags & CAM_CDB_POINTER) ?
3299 *(u_int8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes[0]) == SYNCHRONIZE_CACHE) {
3301 csio->ccb_h.status |= CAM_REQ_CMP;
3313 if (opcode == REPORT_LUNS && csio->dxfer_len > 0) {
3314 csio->data_ptr[3] = 8;
3315 csio->ccb_h.status |= CAM_REQ_CMP;
3324 * Check for possibly-completed commands.
3335 if (sc->ciss_perf)
3343 * Handle completion of a command - pass results back through the CCB
3357 sc = cr->cr_sc;
3358 cc = cr->cr_cc;
3359 ce = (struct ciss_error_info *)&(cc->sg[0]);
3360 csio = (struct ccb_scsiio *)cr->cr_private;
3368 csio->resid = ce->residual_count;
3371 csio->scsi_status = scsi_status;
3373 csio->ccb_h.status |= CAM_REQ_CMP;
3376 csio->scsi_status = scsi_status;
3377 bzero(&csio->sense_data, SSD_FULL_SIZE);
3378 bcopy(&ce->sense_info[0], &csio->sense_data, ce->sense_length);
3379 if (csio->sense_len > ce->sense_length)
3380 csio->sense_resid = csio->sense_len - ce->sense_length;
3382 csio->sense_resid = 0;
3383 csio->resid = ce->residual_count;
3384 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID;
3387 csio->ccb_h.status |= CAM_DATA_RUN_ERR;
3390 csio->ccb_h.status |= CAM_REQ_CMP_ERR;
3394 /* handle post-command fixup */
3398 if (sc->ciss_flags & CISS_FLAG_BUSY) {
3399 sc->ciss_flags &= ~CISS_FLAG_BUSY;
3400 if (csio->ccb_h.status & CAM_RELEASE_SIMQ)
3401 xpt_release_simq(xpt_path_sim(csio->ccb_h.path), 0);
3403 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
3419 cdb = (csio->ccb_h.flags & CAM_CDB_POINTER) ?
3420 (uint8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes;
3423 (csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN &&
3424 csio->dxfer_len >= SHORT_INQUIRY_LENGTH) {
3425 inq = (struct scsi_inquiry_data *)csio->data_ptr;
3426 target = csio->ccb_h.target_id;
3427 bus = cam_sim_bus(xpt_path_sim(csio->ccb_h.path));
3431 * Let the disks be probed and dealt with via CAM. Else, mask off
3435 if( !(sc->ciss_id->PowerUPNvramFlags & PWR_UP_FLAG_JBOD_ENABLED)){
3438 inq->device = (inq->device & 0xe0) | T_NODEVICE;
3441 cl = &sc->ciss_logical[bus][target];
3443 padstr(inq->vendor, "HP",
3445 padstr(inq->product,
3446 ciss_name_ldrive_org(cl->cl_ldrive->fault_tolerance),
3448 padstr(inq->revision,
3449 ciss_name_ldrive_status(cl->cl_lstatus->status),
3470 status = xpt_create_path(&path, NULL, cam_sim_path(sc->ciss_cam_sim[bus]),
3479 sprintf(sc->ciss_logical[bus][target].cl_name, "%s%d",
3480 periph->periph_name, periph->unit_number);
3484 sc->ciss_logical[bus][target].cl_name[0] = 0;
3506 if (sc->ciss_cfg->heartbeat == sc->ciss_heartbeat) {
3507 sc->ciss_heart_attack++;
3509 sc->ciss_heartbeat, sc->ciss_heart_attack);
3510 if (sc->ciss_heart_attack == 3) {
3516 sc->ciss_heartbeat = sc->ciss_cfg->heartbeat;
3517 sc->ciss_heart_attack = 0;
3518 debug(3, "new heartbeat 0x%x", sc->ciss_heartbeat);
3525 cc = cr->cr_cc;
3526 cr->cr_complete = ciss_nop_complete;
3527 cc->cdb.cdb_length = 1;
3528 cc->cdb.type = CISS_CDB_TYPE_MESSAGE;
3529 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3530 cc->cdb.direction = CISS_CDB_DIRECTION_WRITE;
3531 cc->cdb.timeout = 0;
3532 cc->cdb.cdb[0] = CISS_OPCODE_MESSAGE_NOP;
3543 if (!(sc->ciss_flags & CISS_FLAG_NOTIFY_OK)) {
3551 callout_reset(&sc->ciss_periodic, CISS_HEARTBEAT_RATE * hz, ciss_periodic, sc);
3560 sc = cr->cr_sc;
3587 pci_disable_busmaster(sc->ciss_dev);
3588 sc->ciss_flags &= ~CISS_FLAG_RUNNING;
3591 for (i = 1; i < sc->ciss_max_requests; i++) {
3592 cr = &sc->ciss_request[i];
3593 if ((cr->cr_flags & CISS_REQ_BUSY) == 0)
3596 cc = cr->cr_cc;
3597 ce = (struct ciss_error_info *)&(cc->sg[0]);
3598 ce->command_status = CISS_CMD_STATUS_HARDWARE_ERROR;
3609 if (cr->cr_complete != NULL) {
3610 cr->cr_complete(cr);
3617 if (cr->cr_flags & CISS_REQ_SLEEP) {
3618 cr->cr_flags &= ~CISS_REQ_SLEEP;
3642 cr = sc->ciss_periodic_notify;
3650 sc->ciss_periodic_notify = cr;
3651 cr->cr_complete = ciss_notify_complete;
3652 debug(1, "acquired request %d", cr->cr_tag);
3660 if (cr->cr_data == NULL) {
3661 if ((cr->cr_data = malloc(CISS_NOTIFY_DATA_SIZE, CISS_MALLOC_CLASS, M_NOWAIT)) == NULL) {
3666 cr->cr_length = CISS_NOTIFY_DATA_SIZE;
3669 /* re-setup the request's command (since we never release it) XXX overkill*/
3673 cc = cr->cr_cc;
3674 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
3675 cc->header.address.physical.bus = 0;
3676 cc->header.address.physical.target = 0;
3678 cc->cdb.cdb_length = sizeof(*cnc);
3679 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3680 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3681 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3682 cc->cdb.timeout = 0; /* no timeout, we hope */
3684 cnc = (struct ciss_notify_cdb *)&(cc->cdb.cdb[0]);
3685 bzero(cr->cr_data, CISS_NOTIFY_DATA_SIZE);
3686 cnc->opcode = CISS_OPCODE_READ;
3687 cnc->command = CISS_COMMAND_NOTIFY_ON_EVENT;
3688 cnc->timeout = 0; /* no timeout, we hope */
3689 cnc->synchronous = 0;
3690 cnc->ordered = 0;
3691 cnc->seek_to_oldest = 0;
3692 if ((sc->ciss_flags & CISS_FLAG_RUNNING) == 0)
3693 cnc->new_only = 1;
3695 cnc->new_only = 0;
3696 cnc->length = htonl(CISS_NOTIFY_DATA_SIZE);
3704 if (cr->cr_data != NULL)
3705 free(cr->cr_data, CISS_MALLOC_CLASS);
3708 sc->ciss_periodic_notify = NULL;
3710 sc->ciss_flags &= ~CISS_FLAG_NOTIFY_OK;
3713 sc->ciss_flags |= CISS_FLAG_NOTIFY_OK;
3726 cn = (struct ciss_notify *)cr->cr_data;
3727 sc = cr->cr_sc;
3745 sc->ciss_flags &= ~CISS_FLAG_NOTIFY_OK;
3752 if (cn->message[0] != 0)
3753 ciss_printf(sc, "*** %.80s\n", cn->message);
3756 cn->class, cn->subclass, cn->detail);
3762 if ((cn->class == CISS_NOTIFY_NOTIFIER) &&
3763 (cn->subclass == CISS_NOTIFY_NOTIFIER_STATUS) &&
3764 (cn->detail == 1)) {
3766 sc->ciss_flags &= ~CISS_FLAG_NOTIFY_OK;
3768 sc->ciss_periodic_notify = NULL;
3769 wakeup(&sc->ciss_periodic_notify);
3773 sc->ciss_periodic_notify = NULL;
3774 wakeup(&sc->ciss_periodic_notify);
3775 wakeup(&sc->ciss_notify);
3780 if (!(sc->ciss_flags & CISS_FLAG_ABORTING)) {
3809 if (!(sc->ciss_flags & CISS_FLAG_NOTIFY_OK))
3817 if ((cr->cr_data = malloc(CISS_NOTIFY_DATA_SIZE, CISS_MALLOC_CLASS, M_NOWAIT)) == NULL) {
3822 cr->cr_length = CISS_NOTIFY_DATA_SIZE;
3825 cc = cr->cr_cc;
3826 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
3827 cc->header.address.physical.bus = 0;
3828 cc->header.address.physical.target = 0;
3829 cc->cdb.cdb_length = sizeof(*cnc);
3830 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3831 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3832 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3833 cc->cdb.timeout = 0; /* no timeout, we hope */
3835 cnc = (struct ciss_notify_cdb *)&(cc->cdb.cdb[0]);
3837 cnc->opcode = CISS_OPCODE_WRITE;
3838 cnc->command = CISS_COMMAND_ABORT_NOTIFY;
3839 cnc->length = htonl(CISS_NOTIFY_DATA_SIZE);
3875 if (sc->ciss_periodic_notify != NULL)
3876 ciss_release_request(sc->ciss_periodic_notify);
3896 while (sc->ciss_periodic_notify != NULL) {
3897 error = msleep(&sc->ciss_periodic_notify, &sc->ciss_mtx, PRIBIO, "cissNEA", hz * 5);
3907 if (cr->cr_data != NULL)
3908 free(cr->cr_data, CISS_MALLOC_CLASS);
3912 sc->ciss_flags &= ~CISS_FLAG_NOTIFY_OK;
3931 if (!(sc->ciss_flags & CISS_FLAG_NOTIFY_OK))
3987 sc->ciss_cfg->max_logical_supported);
3991 ndrives = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
3997 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
3998 for (j = 0; j < sc->ciss_cfg->max_logical_supported; j++) {
3999 ld = &sc->ciss_logical[i][j];
4001 if (ld->cl_update == 0)
4004 if (ld->cl_status != CISS_LD_ONLINE) {
4006 ld->cl_update = 0;
4007 if (ld->cl_ldrive)
4008 free(ld->cl_ldrive, CISS_MALLOC_CLASS);
4009 if (ld->cl_lstatus)
4010 free(ld->cl_lstatus, CISS_MALLOC_CLASS);
4012 ld->cl_ldrive = NULL;
4013 ld->cl_lstatus = NULL;
4024 bus = CISS_LUN_TO_BUS(cll->lun[i].logical.lun);
4025 target = CISS_LUN_TO_TARGET(cll->lun[i].logical.lun);
4026 ld = &sc->ciss_logical[bus][target];
4028 if (ld->cl_update == 0)
4031 ld->cl_update = 0;
4032 ld->cl_address = cll->lun[i];
4033 ld->cl_controller = &sc->ciss_controllers[bus];
4056 bus = cn->device.physical.bus;
4057 target = cn->data.logical_status.logical_drive;
4058 ld = &sc->ciss_logical[bus][target];
4060 switch (cn->subclass) {
4062 switch (cn->detail) {
4065 ciss_printf(sc, "logical drive %d (%s) changed status %s->%s, spare status 0x%b\n",
4066 cn->data.logical_status.logical_drive, ld->cl_name,
4067 ciss_name_ldrive_status(cn->data.logical_status.previous_state),
4068 ciss_name_ldrive_status(cn->data.logical_status.new_state),
4069 cn->data.logical_status.spare_state,
4075 ostatus = ciss_decode_ldrive_status(cn->data.logical_status.previous_state);
4076 ld->cl_status = ciss_decode_ldrive_status(cn->data.logical_status.new_state);
4077 if (ld->cl_lstatus != NULL)
4078 ld->cl_lstatus->status = cn->data.logical_status.new_state;
4081 * Have CAM rescan the drive if its status has changed.
4083 if (ostatus != ld->cl_status) {
4084 ld->cl_update = 1;
4093 cn->data.logical_status.logical_drive, ld->cl_name);
4096 ld->cl_update = 1;
4097 ld->cl_status = ciss_decode_ldrive_status(cn->data.logical_status.new_state);
4104 cn->data.rebuild_aborted.logical_drive,
4105 ld->cl_name,
4106 (cn->detail == 2) ? "read" : "write");
4112 if (cn->detail == 0) {
4114 cn->data.io_error.logical_drive,
4115 ld->cl_name,
4116 cn->data.io_error.failure_bus,
4117 cn->data.io_error.failure_drive);
4123 if (cn->detail == 0)
4125 cn->data.consistency_completed.logical_drive,
4126 ld->cl_name);
4148 switch (cn->subclass) {
4151 bus = CISS_BIG_MAP_BUS(sc, cn->data.drive.big_physical_drive_number);
4153 CISS_BIG_MAP_TARGET(sc, cn->data.drive.big_physical_drive_number);
4155 if (cn->detail == 0) {
4161 sc->ciss_physical[bus][target].cp_online = 0;
4167 sc->ciss_cfg->max_physical_supported);
4177 ciss_printf(sc, "Unknown hotplug event %d\n", cn->subclass);
4197 mtx_lock(&sc->ciss_mtx);
4200 if (STAILQ_EMPTY(&sc->ciss_notify) != 0 &&
4201 (sc->ciss_flags & CISS_FLAG_THREAD_SHUT) == 0) {
4202 msleep(&sc->ciss_notify, &sc->ciss_mtx, PUSER, "idle", 0);
4205 if (sc->ciss_flags & CISS_FLAG_THREAD_SHUT)
4224 cn = (struct ciss_notify *)cr->cr_data;
4226 switch (cn->class) {
4240 sc->ciss_notify_thread = NULL;
4241 wakeup(&sc->ciss_notify_thread);
4243 mtx_unlock(&sc->ciss_mtx);
4255 &sc->ciss_notify_thread, 0, 0, "ciss_notify%d",
4256 device_get_unit(sc->ciss_dev)))
4267 if (sc->ciss_notify_thread == NULL)
4270 sc->ciss_flags |= CISS_FLAG_THREAD_SHUT;
4271 wakeup(&sc->ciss_notify);
4272 msleep(&sc->ciss_notify_thread, &sc->ciss_mtx, PUSER, "thtrm", 0);
4286 sc = cr->cr_sc;
4287 cc = cr->cr_cc;
4291 cr->cr_data, cr->cr_length, cr->cr_tag, cr->cr_flags,
4293 ciss_printf(sc, " sg list/total %d/%d host tag 0x%x\n",
4294 cc->header.sg_in_list, cc->header.sg_total, cc->header.host_tag);
4295 switch(cc->header.address.mode.mode) {
4299 cc->header.address.physical.bus, cc->header.address.physical.target);
4302 ciss_printf(sc, " logical unit %d\n", cc->header.address.logical.lun);
4306 (cc->cdb.direction == CISS_CDB_DIRECTION_NONE) ? "no-I/O" :
4307 (cc->cdb.direction == CISS_CDB_DIRECTION_READ) ? "READ" :
4308 (cc->cdb.direction == CISS_CDB_DIRECTION_WRITE) ? "WRITE" : "??",
4309 cc->cdb.cdb_length,
4310 (cc->cdb.type == CISS_CDB_TYPE_COMMAND) ? "command" :
4311 (cc->cdb.type == CISS_CDB_TYPE_MESSAGE) ? "message" : "??",
4312 (cc->cdb.attribute == CISS_CDB_ATTRIBUTE_UNTAGGED) ? "untagged" :
4313 (cc->cdb.attribute == CISS_CDB_ATTRIBUTE_SIMPLE) ? "simple" :
4314 (cc->cdb.attribute == CISS_CDB_ATTRIBUTE_HEAD_OF_QUEUE) ? "head-of-queue" :
4315 (cc->cdb.attribute == CISS_CDB_ATTRIBUTE_ORDERED) ? "ordered" :
4316 (cc->cdb.attribute == CISS_CDB_ATTRIBUTE_AUTO_CONTINGENT) ? "auto-contingent" : "??");
4317 ciss_printf(sc, " %*D\n", cc->cdb.cdb_length, &cc->cdb.cdb[0], " ");
4319 if (cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) {
4323 for (i = 0; i < cc->header.sg_in_list; i++) {
4326 printf("0x%08x/%d ", (u_int32_t)cc->sg[i].address, cc->sg[i].length);
4327 if ((((i + 1) % 4) == 0) || (i == (cc->header.sg_in_list - 1)))
4342 if (ld->cl_lstatus == NULL) {
4348 switch(ld->cl_lstatus->status) {
4359 bus = CISS_BIG_MAP_BUS(sc, ld->cl_lstatus->drive_rebuilding);
4360 target = CISS_BIG_MAP_BUS(sc, ld->cl_lstatus->drive_rebuilding);
4362 bus, target, ld->cl_lstatus->blocks_to_recover);
4366 ld->cl_lstatus->blocks_to_recover);
4387 bus = CISS_BIG_MAP_BUS(sc, ld->cl_lstatus->drive_failure_map[i]);
4388 target = CISS_BIG_MAP_TARGET(sc, ld->cl_lstatus->drive_failure_map[i]);
4389 if (bus == -1)
4392 ld->cl_lstatus->drive_failure_map[i]);
4411 sc->ciss_qstat[i].q_length,
4412 sc->ciss_qstat[i].q_max);
4414 ciss_printf(sc, "max_requests %d\n", sc->ciss_max_requests);
4415 ciss_printf(sc, "flags %b\n", sc->ciss_flags,
4418 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
4419 for (j = 0; j < sc->ciss_cfg->max_logical_supported; j++) {
4421 ciss_print_ldrive(sc, &sc->ciss_logical[i][j]);
4427 for (i = 1; i < sc->ciss_max_requests; i++)
4428 ciss_print_request(sc->ciss_request + i);
4582 sc = (struct ciss_softc *)dev->si_drv1;
4586 mtx_lock(&sc->ciss_mtx);
4587 sc->ciss_flags |= CISS_FLAG_CONTROL_OPEN;
4588 mtx_unlock(&sc->ciss_mtx);
4602 sc = (struct ciss_softc *)dev->si_drv1;
4604 mtx_lock(&sc->ciss_mtx);
4605 sc->ciss_flags &= ~CISS_FLAG_CONTROL_OPEN;
4606 mtx_unlock(&sc->ciss_mtx);
4611 * Handle adapter-specific control operations.
4629 sc = (struct ciss_softc *)dev->si_drv1;
4631 mtx_lock(&sc->ciss_mtx);
4638 switch (cr->cs_item) {
4641 bcopy(&sc->ciss_qstat[cr->cs_item], &cr->cs_qstat,
4656 pis->bus = pci_get_bus(sc->ciss_dev);
4657 pis->dev_fn = pci_get_slot(sc->ciss_dev);
4658 pis->board_id = (pci_get_subvendor(sc->ciss_dev) << 16) |
4659 pci_get_subdevice(sc->ciss_dev);
4668 cis->delay = sc->ciss_cfg->interrupt_coalesce_delay;
4669 cis->count = sc->ciss_cfg->interrupt_coalesce_count;
4678 if ((cis->delay == 0) && (cis->count == 0)) {
4687 sc->ciss_cfg->interrupt_coalesce_delay = cis->delay;
4688 sc->ciss_cfg->interrupt_coalesce_count = cis->count;
4698 bcopy(sc->ciss_cfg->server_name, (NodeName_type *)addr,
4703 bcopy((NodeName_type *)addr, sc->ciss_cfg->server_name,
4710 *(Heartbeat_type *)addr = sc->ciss_cfg->heartbeat;
4714 *(BusTypes_type *)addr = sc->ciss_cfg->bus_types;
4718 bcopy(sc->ciss_id->running_firmware_revision, (FirmwareVer_type *)addr,
4729 * to find any disks that have changed, kick CAM off them,
4738 ioc_swab.LUN_info = ioc32->LUN_info;
4739 ioc_swab.Request = ioc32->Request;
4740 ioc_swab.error_info = ioc32->error_info;
4741 ioc_swab.buf_size = ioc32->buf_size;
4742 ioc_swab.buf = (u_int8_t *)(uintptr_t)ioc32->buf;
4770 mtx_unlock(&sc->ciss_mtx);