Lines Matching full:mac
537 struct bwn_mac *mac;
549 mac = NULL;
615 mac = malloc(sizeof(*mac), M_DEVBUF, M_WAITOK | M_ZERO);
616 mac->mac_sc = sc;
617 mac->mac_status = BWN_MAC_STATUS_UNINIT;
619 mac->mac_flags |= BWN_MAC_FLAG_BADFRAME_PREEMP;
621 TASK_INIT(&mac->mac_hwreset, 0, bwn_hwreset, mac);
622 NET_TASK_INIT(&mac->mac_intrtask, 0, bwn_intrtask, mac);
623 TASK_INIT(&mac->mac_txpower, 0, bwn_txpwr, mac);
625 error = bwn_attach_core(mac);
628 error = bwn_led_attach(mac);
636 sc->sc_board_info.board_srom_rev, mac->mac_phy.analog,
637 mac->mac_phy.type, mac->mac_phy.rev, mac->mac_phy.rf_manuf,
638 mac->mac_phy.rf_ver, mac->mac_phy.rf_rev);
639 if (mac->mac_flags & BWN_MAC_FLAG_DMA)
640 device_printf(sc->sc_dev, "DMA (%d bits)\n", mac->mac_dmatype);
649 mac->mac_rid_irq = 0;
650 mac->mac_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
651 &mac->mac_rid_irq, RF_ACTIVE | RF_SHAREABLE);
653 if (mac->mac_res_irq == NULL) {
659 error = bus_setup_intr(dev, mac->mac_res_irq,
660 INTR_TYPE_NET | INTR_MPSAFE, bwn_intr, NULL, mac,
661 &mac->mac_intrhand);
668 TAILQ_INSERT_TAIL(&sc->sc_maclist, mac, mac_list);
678 if (mac != NULL && mac->mac_res_irq != NULL) {
679 bus_release_resource(dev, SYS_RES_IRQ, mac->mac_rid_irq,
680 mac->mac_res_irq);
683 free(mac, M_DEVBUF);
778 /* Determine the NVRAM variable containing our MAC address */
794 device_printf(sc->sc_dev, "missing MAC address variable for "
799 /* Read the MAC address from NVRAM */
838 bwn_phy_detach(struct bwn_mac *mac)
841 if (mac->mac_phy.detach != NULL)
842 mac->mac_phy.detach(mac);
849 struct bwn_mac *mac = sc->sc_curmac;
858 bwn_dma_free(mac);
863 bwn_phy_detach(mac);
864 ieee80211_draintask(ic, &mac->mac_hwreset);
865 ieee80211_draintask(ic, &mac->mac_txpower);
868 taskqueue_drain(sc->sc_tq, &mac->mac_intrtask);
871 if (mac->mac_intrhand != NULL) {
872 bus_teardown_intr(dev, mac->mac_res_irq, mac->mac_intrhand);
873 mac->mac_intrhand = NULL;
879 bus_release_resource(dev, SYS_RES_IRQ, mac->mac_rid_irq,
880 mac->mac_res_irq);
882 bwn_release_firmware(mac);
979 struct bwn_mac *mac = sc->sc_curmac;
987 if ((sc->sc_flags & BWN_FLAG_RUNNING) == 0 || mac == NULL ||
988 mac->mac_status < BWN_MAC_STATUS_STARTED)
1029 struct bwn_mac *mac = sc->sc_curmac;
1031 int pktlen = roundup(m->m_pkthdr.len + BWN_HDRSIZE(mac), 4);
1035 if (mac->mac_flags & BWN_MAC_FLAG_DMA) {
1036 dr = bwn_dma_select(mac, M_WME_GETAC(m));
1043 tq = bwn_pio_select(mac, M_WME_GETAC(m));
1057 struct bwn_mac *mac = sc->sc_curmac;
1062 if (m->m_pkthdr.len < IEEE80211_MIN_LEN || mac == NULL) {
1067 error = (mac->mac_flags & BWN_MAC_FLAG_DMA) ?
1068 bwn_dma_tx_start(mac, ni, &m) : bwn_pio_tx_start(mac, ni, &m);
1077 bwn_pio_tx_start(struct bwn_mac *mac, struct ieee80211_node *ni,
1082 struct bwn_softc *sc = mac->mac_sc;
1094 tq = bwn_pio_select(mac, M_WME_GETAC(m));
1100 error = bwn_set_txhdr(mac, ni, m, &txhdr, BWN_PIO_COOKIE(tq, tp));
1107 tq->tq_used += roundup(m->m_pkthdr.len + BWN_HDRSIZE(mac), 4);
1128 ctl32 = bwn_pio_write_multi_4(mac, tq,
1129 (BWN_PIO_READ_4(mac, tq, BWN_PIO8_TXCTL) |
1131 (const uint8_t *)&txhdr, BWN_HDRSIZE(mac));
1133 ctl32 = bwn_pio_write_multi_4(mac, tq, ctl32,
1135 bwn_pio_write_4(mac, tq, BWN_PIO_TXCTL,
1138 ctl16 = bwn_pio_write_multi_2(mac, tq,
1139 (bwn_pio_read_2(mac, tq, BWN_PIO_TXCTL) |
1141 (const uint8_t *)&txhdr, BWN_HDRSIZE(mac));
1142 ctl16 = bwn_pio_write_mbuf_2(mac, tq, ctl16, m);
1143 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL,
1151 bwn_pio_select(struct bwn_mac *mac, uint8_t prio)
1154 if ((mac->mac_flags & BWN_MAC_FLAG_WME) == 0)
1155 return (&mac->mac_method.pio.wme[WME_AC_BE]);
1159 return (&mac->mac_method.pio.wme[WME_AC_BE]);
1161 return (&mac->mac_method.pio.wme[WME_AC_BK]);
1163 return (&mac->mac_method.pio.wme[WME_AC_VI]);
1165 return (&mac->mac_method.pio.wme[WME_AC_VO]);
1172 bwn_dma_tx_start(struct bwn_mac *mac, struct ieee80211_node *ni,
1176 &(txhdr_cache[(slot / BWN_TX_SLOTS_PER_FRAME) * BWN_HDRSIZE(mac)])
1177 struct bwn_dma *dma = &mac->mac_method.dma;
1178 struct bwn_dma_ring *dr = bwn_dma_select(mac, M_WME_GETAC(*mp));
1181 struct bwn_softc *sc = mac->mac_sc;
1203 BWN_GET_TXHDRCACHE(slot), BWN_HDRSIZE(mac), bwn_dma_ring_addr,
1212 dr->setdesc(dr, desc, mt->mt_paddr, BWN_HDRSIZE(mac), 1, 0, 0);
1282 bwn_attach_core(struct bwn_mac *mac)
1284 struct bwn_softc *sc = mac->mac_sc;
1291 if ((error = bwn_core_forceclk(mac, true)))
1323 error = bwn_reset_core(mac, have_bg);
1331 mac->mac_dmatype = BHND_DMA_ADDR_64BIT;
1337 BWN_WRITE_4(mac, base + BWN_DMA32_TXCTL,
1339 tmp = BWN_READ_4(mac, base + BWN_DMA32_TXCTL);
1341 mac->mac_dmatype = BHND_DMA_ADDR_32BIT;
1343 mac->mac_dmatype = BHND_DMA_ADDR_30BIT;
1350 error = bwn_phy_getinfo(mac, have_bg);
1365 if (mac->mac_phy.type == BWN_PHYTYPE_A)
1367 else if (mac->mac_phy.type == BWN_PHYTYPE_G ||
1368 mac->mac_phy.type == BWN_PHYTYPE_N ||
1369 mac->mac_phy.type == BWN_PHYTYPE_LP)
1373 mac->mac_phy.type));
1379 if (mac->mac_phy.type != BWN_PHYTYPE_LP &&
1380 mac->mac_phy.type != BWN_PHYTYPE_N) {
1388 mac->mac_phy.phy_n = NULL;
1390 if (mac->mac_phy.type == BWN_PHYTYPE_G) {
1391 mac->mac_phy.attach = bwn_phy_g_attach;
1392 mac->mac_phy.detach = bwn_phy_g_detach;
1393 mac->mac_phy.prepare_hw = bwn_phy_g_prepare_hw;
1394 mac->mac_phy.init_pre = bwn_phy_g_init_pre;
1395 mac->mac_phy.init = bwn_phy_g_init;
1396 mac->mac_phy.exit = bwn_phy_g_exit;
1397 mac->mac_phy.phy_read = bwn_phy_g_read;
1398 mac->mac_phy.phy_write = bwn_phy_g_write;
1399 mac->mac_phy.rf_read = bwn_phy_g_rf_read;
1400 mac->mac_phy.rf_write = bwn_phy_g_rf_write;
1401 mac->mac_phy.use_hwpctl = bwn_phy_g_hwpctl;
1402 mac->mac_phy.rf_onoff = bwn_phy_g_rf_onoff;
1403 mac->mac_phy.switch_analog = bwn_phy_switch_analog;
1404 mac->mac_phy.switch_channel = bwn_phy_g_switch_channel;
1405 mac->mac_phy.get_default_chan = bwn_phy_g_get_default_chan;
1406 mac->mac_phy.set_antenna = bwn_phy_g_set_antenna;
1407 mac->mac_phy.set_im = bwn_phy_g_im;
1408 mac->mac_phy.recalc_txpwr = bwn_phy_g_recalc_txpwr;
1409 mac->mac_phy.set_txpwr = bwn_phy_g_set_txpwr;
1410 mac->mac_phy.task_15s = bwn_phy_g_task_15s;
1411 mac->mac_phy.task_60s = bwn_phy_g_task_60s;
1412 } else if (mac->mac_phy.type == BWN_PHYTYPE_LP) {
1413 mac->mac_phy.init_pre = bwn_phy_lp_init_pre;
1414 mac->mac_phy.init = bwn_phy_lp_init;
1415 mac->mac_phy.phy_read = bwn_phy_lp_read;
1416 mac->mac_phy.phy_write = bwn_phy_lp_write;
1417 mac->mac_phy.phy_maskset = bwn_phy_lp_maskset;
1418 mac->mac_phy.rf_read = bwn_phy_lp_rf_read;
1419 mac->mac_phy.rf_write = bwn_phy_lp_rf_write;
1420 mac->mac_phy.rf_onoff = bwn_phy_lp_rf_onoff;
1421 mac->mac_phy.switch_analog = bwn_phy_lp_switch_analog;
1422 mac->mac_phy.switch_channel = bwn_phy_lp_switch_channel;
1423 mac->mac_phy.get_default_chan = bwn_phy_lp_get_default_chan;
1424 mac->mac_phy.set_antenna = bwn_phy_lp_set_antenna;
1425 mac->mac_phy.task_60s = bwn_phy_lp_task_60s;
1426 } else if (mac->mac_phy.type == BWN_PHYTYPE_N) {
1427 mac->mac_phy.attach = bwn_phy_n_attach;
1428 mac->mac_phy.detach = bwn_phy_n_detach;
1429 mac->mac_phy.prepare_hw = bwn_phy_n_prepare_hw;
1430 mac->mac_phy.init_pre = bwn_phy_n_init_pre;
1431 mac->mac_phy.init = bwn_phy_n_init;
1432 mac->mac_phy.exit = bwn_phy_n_exit;
1433 mac->mac_phy.phy_read = bwn_phy_n_read;
1434 mac->mac_phy.phy_write = bwn_phy_n_write;
1435 mac->mac_phy.rf_read = bwn_phy_n_rf_read;
1436 mac->mac_phy.rf_write = bwn_phy_n_rf_write;
1437 mac->mac_phy.use_hwpctl = bwn_phy_n_hwpctl;
1438 mac->mac_phy.rf_onoff = bwn_phy_n_rf_onoff;
1439 mac->mac_phy.switch_analog = bwn_phy_n_switch_analog;
1440 mac->mac_phy.switch_channel = bwn_phy_n_switch_channel;
1441 mac->mac_phy.get_default_chan = bwn_phy_n_get_default_chan;
1442 mac->mac_phy.set_antenna = bwn_phy_n_set_antenna;
1443 mac->mac_phy.set_im = bwn_phy_n_im;
1444 mac->mac_phy.recalc_txpwr = bwn_phy_n_recalc_txpwr;
1445 mac->mac_phy.set_txpwr = bwn_phy_n_set_txpwr;
1446 mac->mac_phy.task_15s = bwn_phy_n_task_15s;
1447 mac->mac_phy.task_60s = bwn_phy_n_task_60s;
1450 mac->mac_phy.type);
1455 mac->mac_phy.gmode = have_bg;
1456 if (mac->mac_phy.attach != NULL) {
1457 error = mac->mac_phy.attach(mac);
1464 error = bwn_reset_core(mac, have_bg);
1468 error = bwn_chiptest(mac);
1471 error = bwn_setup_channels(mac, have_bg, have_a);
1478 sc->sc_curmac = mac;
1480 error = bwn_dma_attach(mac);
1486 mac->mac_phy.switch_analog(mac, 0);
1490 bwn_release_firmware(mac);
1498 bwn_reset_core(struct bwn_mac *mac, int g_mode)
1505 sc = mac->mac_sc;
1515 if (mac->mac_phy.type == BWN_PHYTYPE_N)
1548 if (mac->mac_phy.switch_analog != NULL)
1549 mac->mac_phy.switch_analog(mac, 1);
1551 ctl = BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_GMODE;
1554 BWN_WRITE_4(mac, BWN_MACCTL, ctl | BWN_MACCTL_IHR_ON);
1560 bwn_phy_getinfo(struct bwn_mac *mac, int gmode)
1562 struct bwn_phy *phy = &mac->mac_phy;
1563 struct bwn_softc *sc = mac->mac_sc;
1567 tmp = BWN_READ_2(mac, BWN_PHYVER);
1582 BWN_WRITE_2(mac, BWN_RFCTL, BWN_RFCTL_ID);
1583 tmp = BWN_READ_2(mac, BWN_RFDATALO);
1584 BWN_WRITE_2(mac, BWN_RFCTL, BWN_RFCTL_ID);
1585 tmp |= (uint32_t)BWN_READ_2(mac, BWN_RFDATAHI) << 16;
1623 bwn_chiptest(struct bwn_mac *mac)
1627 struct bwn_softc *sc = mac->mac_sc;
1632 backup = bwn_shm_read_4(mac, BWN_SHARED, 0);
1634 bwn_shm_write_4(mac, BWN_SHARED, 0, TESTVAL0);
1635 if (bwn_shm_read_4(mac, BWN_SHARED, 0) != TESTVAL0)
1637 bwn_shm_write_4(mac, BWN_SHARED, 0, TESTVAL1);
1638 if (bwn_shm_read_4(mac, BWN_SHARED, 0) != TESTVAL1)
1641 bwn_shm_write_4(mac, BWN_SHARED, 0, backup);
1645 BWN_WRITE_2(mac, BWN_TSF_CFP_START, 0xaaaa);
1646 BWN_WRITE_4(mac, BWN_TSF_CFP_START, 0xccccbbbb);
1647 if (BWN_READ_2(mac, BWN_TSF_CFP_START_LOW) != 0xbbbb)
1649 if (BWN_READ_2(mac, BWN_TSF_CFP_START_HIGH) != 0xcccc)
1652 BWN_WRITE_4(mac, BWN_TSF_CFP_START, 0);
1654 v = BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_GMODE;
1667 bwn_setup_channels(struct bwn_mac *mac, int have_bg, int have_a)
1669 struct bwn_softc *sc = mac->mac_sc;
1696 mac->mac_phy.supports_2ghz = have_bg;
1697 mac->mac_phy.supports_5ghz = have_a;
1703 bwn_shm_read_4(struct bwn_mac *mac, uint16_t way, uint16_t offset)
1707 BWN_ASSERT_LOCKED(mac->mac_sc);
1713 bwn_shm_ctlword(mac, way, offset >> 2);
1714 ret = BWN_READ_2(mac, BWN_SHM_DATA_UNALIGNED);
1716 bwn_shm_ctlword(mac, way, (offset >> 2) + 1);
1717 ret |= BWN_READ_2(mac, BWN_SHM_DATA);
1722 bwn_shm_ctlword(mac, way, offset);
1723 ret = BWN_READ_4(mac, BWN_SHM_DATA);
1729 bwn_shm_read_2(struct bwn_mac *mac, uint16_t way, uint16_t offset)
1733 BWN_ASSERT_LOCKED(mac->mac_sc);
1739 bwn_shm_ctlword(mac, way, offset >> 2);
1740 ret = BWN_READ_2(mac, BWN_SHM_DATA_UNALIGNED);
1745 bwn_shm_ctlword(mac, way, offset);
1746 ret = BWN_READ_2(mac, BWN_SHM_DATA);
1753 bwn_shm_ctlword(struct bwn_mac *mac, uint16_t way,
1761 BWN_WRITE_4(mac, BWN_SHM_CONTROL, control);
1765 bwn_shm_write_4(struct bwn_mac *mac, uint16_t way, uint16_t offset,
1768 BWN_ASSERT_LOCKED(mac->mac_sc);
1774 bwn_shm_ctlword(mac, way, offset >> 2);
1775 BWN_WRITE_2(mac, BWN_SHM_DATA_UNALIGNED,
1777 bwn_shm_ctlword(mac, way, (offset >> 2) + 1);
1778 BWN_WRITE_2(mac, BWN_SHM_DATA, value & 0xffff);
1783 bwn_shm_ctlword(mac, way, offset);
1784 BWN_WRITE_4(mac, BWN_SHM_DATA, value);
1788 bwn_shm_write_2(struct bwn_mac *mac, uint16_t way, uint16_t offset,
1791 BWN_ASSERT_LOCKED(mac->mac_sc);
1797 bwn_shm_ctlword(mac, way, offset >> 2);
1798 BWN_WRITE_2(mac, BWN_SHM_DATA_UNALIGNED, value);
1803 bwn_shm_ctlword(mac, way, offset);
1804 BWN_WRITE_2(mac, BWN_SHM_DATA, value);
1827 struct bwn_mac *mac = sc->sc_curmac;
1831 mac->mac_status < BWN_MAC_STATUS_STARTED) {
1860 struct bwn_mac *mac;
1864 mac = (struct bwn_mac *)sc->sc_curmac;
1865 bwn_set_slot_time(mac, IEEE80211_GET_SLOTTIME(ic));
1881 struct bwn_mac *mac = sc->sc_curmac;
1884 mac = sc->sc_curmac;
1885 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
1890 bwn_set_opmode(mac);
1902 struct bwn_mac *mac = sc->sc_curmac;
1910 mac = sc->sc_curmac;
1911 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
1912 bwn_mac_suspend(mac);
1915 bwn_wme_loadparams(mac, wmep, bwn_wme_shm_offsets[i]);
1917 bwn_mac_enable(mac);
1927 struct bwn_mac *mac;
1930 mac = sc->sc_curmac;
1931 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
1933 bwn_set_opmode(mac);
1935 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_SKIP_CFP_UPDATE);
1944 struct bwn_mac *mac;
1947 mac = sc->sc_curmac;
1948 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
1950 bwn_set_opmode(mac);
1951 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_SKIP_CFP_UPDATE);
1960 struct bwn_mac *mac = sc->sc_curmac;
1961 struct bwn_phy *phy = &mac->mac_phy;
1969 bwn_mac_suspend(mac);
1970 bwn_set_txretry(mac, BWN_RETRY_SHORT, BWN_RETRY_LONG);
1973 bwn_switch_channel(mac, chan);
1979 bwn_phy_txpower_check(mac, BWN_TXPWR_IGNORE_TIME |
1983 bwn_set_txantenna(mac, BWN_ANT_DEFAULT);
1985 phy->set_antenna(mac, BWN_ANT_DEFAULT);
1989 bwn_rf_turnon(mac);
1990 if (!(mac->mac_flags & BWN_MAC_FLAG_RADIO_ON))
1994 bwn_rf_turnoff(mac);
1997 bwn_mac_enable(mac);
2007 const uint8_t mac[IEEE80211_ADDR_LEN])
2039 ieee80211_media_status, mac);
2056 struct bwn_mac *mac;
2070 mac = sc->sc_curmac;
2071 if (mac->mac_status == BWN_MAC_STATUS_UNINIT) {
2072 error = bwn_core_init(mac);
2076 if (mac->mac_status == BWN_MAC_STATUS_INITED)
2077 bwn_core_start(mac);
2079 bwn_set_opmode(mac);
2080 bwn_set_pretbtt(mac);
2081 bwn_spu_setdelay(mac, 0);
2082 bwn_set_macaddr(mac);
2094 struct bwn_mac *mac = sc->sc_curmac;
2100 if (mac->mac_status >= BWN_MAC_STATUS_INITED) {
2102 bwn_set_opmode(mac);
2103 bwn_set_macaddr(mac);
2106 if (mac->mac_status >= BWN_MAC_STATUS_STARTED)
2107 bwn_core_stop(mac);
2112 bwn_core_exit(mac);
2174 bwn_core_forceclk(struct bwn_mac *mac, bool force)
2180 sc = mac->mac_sc;
2202 bwn_core_init(struct bwn_mac *mac)
2204 struct bwn_softc *sc = mac->mac_sc;
2208 KASSERT(mac->mac_status == BWN_MAC_STATUS_UNINIT,
2211 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: called\n", __func__);
2213 if ((error = bwn_core_forceclk(mac, true)))
2217 if ((error = bwn_reset_core(mac, mac->mac_phy.gmode)))
2221 mac->mac_flags &= ~BWN_MAC_FLAG_DFQVALID;
2222 mac->mac_flags |= BWN_MAC_FLAG_RADIO_ON;
2223 mac->mac_phy.hwpctl = (bwn_hwpctl) ? 1 : 0;
2224 BWN_GETTIME(mac->mac_phy.nexttime);
2225 mac->mac_phy.txerrors = BWN_TXERROR_MAX;
2226 bzero(&mac->mac_stats, sizeof(mac->mac_stats));
2227 mac->mac_stats.link_noise = -95;
2228 mac->mac_reason_intr = 0;
2229 bzero(mac->mac_reason, sizeof(mac->mac_reason));
2230 mac->mac_intr_mask = BWN_INTR_MASKTEMPLATE;
2233 mac->mac_intr_mask &= ~BWN_INTR_PHY_TXERR;
2235 mac->mac_suspended = 1;
2236 mac->mac_task_state = 0;
2237 memset(&mac->mac_noise, 0, sizeof(mac->mac_noise));
2239 mac->mac_phy.init_pre(mac);
2241 bwn_bt_disable(mac);
2242 if (mac->mac_phy.prepare_hw) {
2243 error = mac->mac_phy.prepare_hw(mac);
2247 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: chip_init\n", __func__);
2248 error = bwn_chip_init(mac);
2251 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_COREREV,
2253 hf = bwn_hf_read(mac);
2254 if (mac->mac_phy.type == BWN_PHYTYPE_G) {
2258 if (mac->mac_phy.rev == 1)
2261 if (mac->mac_phy.rf_ver == 0x2050) {
2262 if (mac->mac_phy.rf_rev < 6)
2264 if (mac->mac_phy.rf_rev == 6)
2272 bwn_hf_write(mac, hf);
2274 /* Tell the firmware about the MAC capabilities */
2277 cap = BWN_READ_4(mac, BWN_MAC_HW_CAP);
2281 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_MACHW_L,
2283 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_MACHW_H,
2287 bwn_set_txretry(mac, BWN_RETRY_SHORT, BWN_RETRY_LONG);
2288 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_SHORT_RETRY_FALLBACK, 3);
2289 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_LONG_RETRY_FALLBACK, 2);
2290 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_MAXTIME, 1);
2292 bwn_rate_init(mac);
2293 bwn_set_phytxctl(mac);
2295 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_CONT_MIN,
2296 (mac->mac_phy.type == BWN_PHYTYPE_B) ? 0x1f : 0xf);
2297 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_CONT_MAX, 0x3ff);
2300 bwn_pio_init(mac);
2302 bwn_dma_init(mac);
2303 bwn_wme_init(mac);
2304 bwn_spu_setdelay(mac, 1);
2305 bwn_bt_enable(mac);
2307 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: powerup\n", __func__);
2309 bwn_core_forceclk(mac, true);
2311 bwn_core_forceclk(mac, false);
2313 bwn_set_macaddr(mac);
2314 bwn_crypt_init(mac);
2318 mac->mac_status = BWN_MAC_STATUS_INITED;
2320 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: done\n", __func__);
2325 KASSERT(mac->mac_status == BWN_MAC_STATUS_UNINIT,
2327 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: fail\n", __func__);
2332 bwn_core_start(struct bwn_mac *mac)
2334 struct bwn_softc *sc = mac->mac_sc;
2337 KASSERT(mac->mac_status == BWN_MAC_STATUS_INITED,
2344 tmp = BWN_READ_4(mac, BWN_XMITSTAT_0);
2347 tmp = BWN_READ_4(mac, BWN_XMITSTAT_1);
2350 bwn_mac_enable(mac);
2351 BWN_WRITE_4(mac, BWN_INTR_MASK, mac->mac_intr_mask);
2352 callout_reset(&sc->sc_task_ch, hz * 15, bwn_tasks, mac);
2354 mac->mac_status = BWN_MAC_STATUS_STARTED;
2358 bwn_core_exit(struct bwn_mac *mac)
2360 struct bwn_softc *sc = mac->mac_sc;
2363 BWN_ASSERT_LOCKED(mac->mac_sc);
2365 KASSERT(mac->mac_status <= BWN_MAC_STATUS_INITED,
2368 if (mac->mac_status != BWN_MAC_STATUS_INITED)
2370 mac->mac_status = BWN_MAC_STATUS_UNINIT;
2372 macctl = BWN_READ_4(mac, BWN_MACCTL);
2375 BWN_WRITE_4(mac, BWN_MACCTL, macctl);
2377 bwn_dma_stop(mac);
2378 bwn_pio_stop(mac);
2379 bwn_chip_exit(mac);
2380 mac->mac_phy.switch_analog(mac, 0);
2385 bwn_bt_disable(struct bwn_mac *mac)
2387 struct bwn_softc *sc = mac->mac_sc;
2394 bwn_chip_init(struct bwn_mac *mac)
2396 struct bwn_softc *sc = mac->mac_sc;
2397 struct bwn_phy *phy = &mac->mac_phy;
2405 BWN_WRITE_4(mac, BWN_MACCTL, macctl);
2407 error = bwn_fw_fillinfo(mac);
2410 error = bwn_fw_loaducode(mac);
2414 error = bwn_gpio_init(mac);
2418 error = bwn_fw_loadinitvals(mac);
2422 phy->switch_analog(mac, 1);
2423 error = bwn_phy_init(mac);
2428 phy->set_im(mac, BWN_IMMODE_NONE);
2430 phy->set_antenna(mac, BWN_ANT_DEFAULT);
2431 bwn_set_txantenna(mac, BWN_ANT_DEFAULT);
2434 BWN_WRITE_2(mac, 0x005e, BWN_READ_2(mac, 0x005e) | 0x0004);
2435 BWN_WRITE_4(mac, 0x0100, 0x01000000);
2437 BWN_WRITE_4(mac, 0x010c, 0x01000000);
2439 BWN_WRITE_4(mac, BWN_MACCTL,
2440 BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_STA);
2441 BWN_WRITE_4(mac, BWN_MACCTL,
2442 BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_STA);
2443 bwn_shm_write_2(mac, BWN_SHARED, 0x0074, 0x0000);
2445 bwn_set_opmode(mac);
2447 BWN_WRITE_2(mac, 0x060e, 0x0000);
2448 BWN_WRITE_2(mac, 0x0610, 0x8000);
2449 BWN_WRITE_2(mac, 0x0604, 0x0000);
2450 BWN_WRITE_2(mac, 0x0606, 0x0200);
2452 BWN_WRITE_4(mac, 0x0188, 0x80000000);
2453 BWN_WRITE_4(mac, 0x018c, 0x02000000);
2455 BWN_WRITE_4(mac, BWN_INTR_REASON, 0x00004000);
2456 BWN_WRITE_4(mac, BWN_DMA0_INTR_MASK, 0x0001dc00);
2457 BWN_WRITE_4(mac, BWN_DMA1_INTR_MASK, 0x0000dc00);
2458 BWN_WRITE_4(mac, BWN_DMA2_INTR_MASK, 0x0000dc00);
2459 BWN_WRITE_4(mac, BWN_DMA3_INTR_MASK, 0x0001dc00);
2460 BWN_WRITE_4(mac, BWN_DMA4_INTR_MASK, 0x0000dc00);
2461 BWN_WRITE_4(mac, BWN_DMA5_INTR_MASK, 0x0000dc00);
2463 bwn_mac_phy_clock_set(mac, true);
2465 /* Provide the HT clock transition latency to the MAC core */
2479 BWN_WRITE_2(mac, BWN_POWERUP_DELAY, delay);
2485 bwn_hf_read(struct bwn_mac *mac)
2489 ret = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFHI);
2491 ret |= bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFMI);
2493 ret |= bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFLO);
2498 bwn_hf_write(struct bwn_mac *mac, uint64_t value)
2501 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_HFLO,
2503 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_HFMI,
2505 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_HFHI,
2510 bwn_set_txretry(struct bwn_mac *mac, int s, int l)
2513 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_SHORT_RETRY, MIN(s, 0xf));
2514 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_LONG_RETRY, MIN(l, 0xf));
2518 bwn_rate_init(struct bwn_mac *mac)
2521 switch (mac->mac_phy.type) {
2526 bwn_rate_write(mac, BWN_OFDM_RATE_6MB, 1);
2527 bwn_rate_write(mac, BWN_OFDM_RATE_12MB, 1);
2528 bwn_rate_write(mac, BWN_OFDM_RATE_18MB, 1);
2529 bwn_rate_write(mac, BWN_OFDM_RATE_24MB, 1);
2530 bwn_rate_write(mac, BWN_OFDM_RATE_36MB, 1);
2531 bwn_rate_write(mac, BWN_OFDM_RATE_48MB, 1);
2532 bwn_rate_write(mac, BWN_OFDM_RATE_54MB, 1);
2533 if (mac->mac_phy.type == BWN_PHYTYPE_A)
2537 bwn_rate_write(mac, BWN_CCK_RATE_1MB, 0);
2538 bwn_rate_write(mac, BWN_CCK_RATE_2MB, 0);
2539 bwn_rate_write(mac, BWN_CCK_RATE_5MB, 0);
2540 bwn_rate_write(mac, BWN_CCK_RATE_11MB, 0);
2548 bwn_rate_write(struct bwn_mac *mac, uint16_t rate, int ofdm)
2559 bwn_shm_write_2(mac, BWN_SHARED, offset + 0x20,
2560 bwn_shm_read_2(mac, BWN_SHARED, offset));
2608 bwn_set_phytxctl(struct bwn_mac *mac)
2614 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_BEACON_PHYCTL, ctl);
2615 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_ACKCTS_PHYCTL, ctl);
2616 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_PHYCTL, ctl);
2620 bwn_pio_init(struct bwn_mac *mac)
2622 struct bwn_pio *pio = &mac->mac_method.pio;
2624 BWN_WRITE_4(mac, BWN_MACCTL, BWN_READ_4(mac, BWN_MACCTL)
2626 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_RX_PADOFFSET, 0);
2628 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_BK], 0);
2629 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_BE], 1);
2630 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_VI], 2);
2631 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_VO], 3);
2632 bwn_pio_set_txqueue(mac, &pio->mcast, 4);
2633 bwn_pio_setupqueue_rx(mac, &pio->rx, 0);
2637 bwn_pio_set_txqueue(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
2641 struct bwn_softc *sc = mac->mac_sc;
2644 tq->tq_base = bwn_pio_idx2base(mac, index) + BWN_PIO_TXQOFFSET(mac);
2651 tq->tq_size = bwn_pio_read_2(mac, tq, BWN_PIO_TXQBUFSIZE);
2665 bwn_pio_idx2base(struct bwn_mac *mac, int index)
2667 struct bwn_softc *sc = mac->mac_sc;
2698 bwn_pio_setupqueue_rx(struct bwn_mac *mac, struct bwn_pio_rxqueue *prq,
2701 struct bwn_softc *sc = mac->mac_sc;
2703 prq->prq_mac = mac;
2705 prq->prq_base = bwn_pio_idx2base(mac, index) + BWN_PIO_RXQOFFSET(mac);
2706 bwn_dma_rxdirectfifo(mac, index, 1);
2725 bwn_pio_read_2(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
2729 return (BWN_READ_2(mac, tq->tq_base + offset));
2733 bwn_dma_rxdirectfifo(struct bwn_mac *mac, int idx, uint8_t enable)
2738 base = bwn_dma_base(mac->mac_dmatype, idx);
2739 if (mac->mac_dmatype == BHND_DMA_ADDR_64BIT) {
2740 ctl = BWN_READ_4(mac, base + BWN_DMA64_RXCTL);
2744 BWN_WRITE_4(mac, base + BWN_DMA64_RXCTL, ctl);
2746 ctl = BWN_READ_4(mac, base + BWN_DMA32_RXCTL);
2750 BWN_WRITE_4(mac, base + BWN_DMA32_RXCTL, ctl);
2800 bwn_dma_init(struct bwn_mac *mac)
2802 struct bwn_dma *dma = &mac->mac_method.dma;
2815 bwn_dma_ringsetup(struct bwn_mac *mac, int controller_index,
2818 struct bwn_dma *dma = &mac->mac_method.dma;
2822 struct bwn_softc *sc = mac->mac_sc;
2837 dr->dr_type = mac->mac_dmatype;
2838 dr->dr_mac = mac;
2863 switch (mac->mac_fw.fw_hdr_format) {
2912 BWN_HDRSIZE(mac),
3215 struct bwn_mac *mac = dr->dr_mac;
3216 struct bwn_dma *dma = &mac->mac_method.dma;
3217 struct bwn_softc *sc = mac->mac_sc;
3260 struct bwn_mac *mac;
3266 mac = dr->dr_mac;
3267 dma = &mac->mac_method.dma;
3362 struct bwn_mac *mac = dr->dr_mac;
3363 struct bwn_dma *dma = &mac->mac_method.dma;
3364 struct bwn_softc *sc = mac->mac_sc;
3392 bwn_dma_tx_reset(struct bwn_mac *mac, uint16_t base,
3395 struct bwn_softc *sc = mac->mac_sc;
3403 value = BWN_READ_4(mac, base + offset);
3421 BWN_WRITE_4(mac, base + offset, 0);
3425 value = BWN_READ_4(mac, base + offset);
3451 bwn_dma_rx_reset(struct bwn_mac *mac, uint16_t base,
3454 struct bwn_softc *sc = mac->mac_sc;
3461 BWN_WRITE_4(mac, base + offset, 0);
3465 value = BWN_READ_4(mac, base + offset);
3530 bwn_wme_init(struct bwn_mac *mac)
3533 bwn_wme_load(mac);
3536 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_EDCF);
3537 BWN_WRITE_2(mac, BWN_IFSCTL, BWN_READ_2(mac, BWN_IFSCTL) |
3542 bwn_spu_setdelay(struct bwn_mac *mac, int idle)
3544 struct bwn_softc *sc = mac->mac_sc;
3548 delay = (mac->mac_phy.type == BWN_PHYTYPE_A) ? 3700 : 1050;
3551 if ((mac->mac_phy.rf_ver == 0x2050) && (mac->mac_phy.rf_rev == 8))
3554 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_SPU_WAKEUP, delay);
3558 bwn_bt_enable(struct bwn_mac *mac)
3560 struct bwn_softc *sc = mac->mac_sc;
3567 if (mac->mac_phy.type != BWN_PHYTYPE_B && !mac->mac_phy.gmode)
3570 hf = bwn_hf_read(mac);
3575 bwn_hf_write(mac, hf);
3579 bwn_set_macaddr(struct bwn_mac *mac)
3582 bwn_mac_write_bssid(mac);
3583 bwn_mac_setfilter(mac, BWN_MACFILTER_SELF,
3584 mac->mac_sc->sc_ic.ic_macaddr);
3588 bwn_clear_keys(struct bwn_mac *mac)
3592 for (i = 0; i < mac->mac_max_nr_keys; i++) {
3593 KASSERT(i >= 0 && i < mac->mac_max_nr_keys,
3596 bwn_key_dowrite(mac, i, BWN_SEC_ALGO_NONE,
3598 if ((i <= 3) && !BWN_SEC_NEWAPI(mac)) {
3599 bwn_key_dowrite(mac, i + 4, BWN_SEC_ALGO_NONE,
3602 mac->mac_key[i].keyconf = NULL;
3607 bwn_crypt_init(struct bwn_mac *mac)
3609 struct bwn_softc *sc = mac->mac_sc;
3611 mac->mac_max_nr_keys = (bhnd_get_hwrev(sc->sc_dev) >= 5) ? 58 : 20;
3612 KASSERT(mac->mac_max_nr_keys <= N(mac->mac_key),
3614 mac->mac_ktp = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_KEY_TABLEP);
3615 mac->mac_ktp *= 2;
3617 BWN_WRITE_2(mac, BWN_RCMTA_COUNT, mac->mac_max_nr_keys - 8);
3618 bwn_clear_keys(mac);
3622 bwn_chip_exit(struct bwn_mac *mac)
3624 bwn_phy_exit(mac);
3628 bwn_fw_fillinfo(struct bwn_mac *mac)
3632 error = bwn_fw_gets(mac, BWN_FWTYPE_DEFAULT);
3635 error = bwn_fw_gets(mac, BWN_FWTYPE_OPENSOURCE);
3643 * the MAC core control over the pins.
3645 * @param mac bwn MAC state.
3650 bwn_gpio_control(struct bwn_mac *mac, uint32_t pins)
3656 sc = mac->mac_sc;
3683 bwn_gpio_init(struct bwn_mac *mac)
3688 sc = mac->mac_sc;
3692 BWN_WRITE_4(mac, BWN_MACCTL,
3693 BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_GPOUT_MASK);
3694 BWN_WRITE_2(mac, BWN_GPIO_MASK,
3695 BWN_READ_2(mac, BWN_GPIO_MASK) | pins);
3698 /* MAC core is responsible for toggling PAREF via gpio9 */
3699 BWN_WRITE_2(mac, BWN_GPIO_MASK,
3700 BWN_READ_2(mac, BWN_GPIO_MASK) | BHND_GPIO_BOARD_PACTRL);
3705 return (bwn_gpio_control(mac, pins));
3709 bwn_fw_loadinitvals(struct bwn_mac *mac)
3715 struct bwn_fw *fw = &mac->mac_fw;
3719 error = bwn_fwinitvals_write(mac, GETFWOFFSET(fw->initvals, hdr_len),
3725 error = bwn_fwinitvals_write(mac,
3735 bwn_phy_init(struct bwn_mac *mac)
3737 struct bwn_softc *sc = mac->mac_sc;
3740 mac->mac_phy.chan = mac->mac_phy.get_default_chan(mac);
3741 mac->mac_phy.rf_onoff(mac, 1);
3742 error = mac->mac_phy.init(mac);
3747 error = bwn_switch_channel(mac,
3748 mac->mac_phy.get_default_chan(mac));
3756 if (mac->mac_phy.exit)
3757 mac->mac_phy.exit(mac);
3759 mac->mac_phy.rf_onoff(mac, 0);
3765 bwn_set_txantenna(struct bwn_mac *mac, int antenna)
3773 tmp = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_ACKCTS_PHYCTL);
3775 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_ACKCTS_PHYCTL, tmp);
3777 tmp = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_PHYCTL);
3779 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_PHYCTL, tmp);
3783 bwn_set_opmode(struct bwn_mac *mac)
3785 struct bwn_softc *sc = mac->mac_sc;
3790 ctl = BWN_READ_4(mac, BWN_MACCTL);
3806 BWN_WRITE_4(mac, BWN_MACCTL, ctl);
3816 BWN_WRITE_2(mac, 0x612, cfp_pretbtt);
3829 bwn_dummy_transmission(struct bwn_mac *mac, int ofdm, int paon)
3831 struct bwn_phy *phy = &mac->mac_phy;
3832 struct bwn_softc *sc = mac->mac_sc;
3847 BWN_ASSERT_LOCKED(mac->mac_sc);
3850 bwn_ram_write(mac, i * 4, buffer[i]);
3852 BWN_WRITE_2(mac, 0x0568, 0x0000);
3853 BWN_WRITE_2(mac, 0x07c0,
3857 BWN_WRITE_2(mac, 0x050c, value);
3861 BWN_WRITE_2(mac, 0x0514, 0x1a02);
3862 BWN_WRITE_2(mac, 0x0508, 0x0000);
3863 BWN_WRITE_2(mac, 0x050a, 0x0000);
3864 BWN_WRITE_2(mac, 0x054c, 0x0000);
3865 BWN_WRITE_2(mac, 0x056a, 0x0014);
3866 BWN_WRITE_2(mac, 0x0568, 0x0826);
3867 BWN_WRITE_2(mac, 0x0500, 0x0000);
3874 BWN_WRITE_2(mac, 0x0502, 0x00d0);
3877 BWN_WRITE_2(mac, 0x0502, 0x0050);
3880 BWN_WRITE_2(mac, 0x0502, 0x0030);
3885 BWN_READ_2(mac, 0x0502);
3888 BWN_RF_WRITE(mac, 0x0051, 0x0017);
3890 value = BWN_READ_2(mac, 0x050e);
3896 value = BWN_READ_2(mac, 0x050e);
3902 value = BWN_READ_2(mac, 0x0690);
3908 BWN_RF_WRITE(mac, 0x0051, 0x0037);
3912 bwn_ram_write(struct bwn_mac *mac, uint16_t offset, uint32_t val)
3918 macctl = BWN_READ_4(mac, BWN_MACCTL);
3922 BWN_WRITE_4(mac, BWN_RAM_CONTROL, offset);
3923 BWN_BARRIER(mac, BWN_RAM_CONTROL, 4, BUS_SPACE_BARRIER_WRITE);
3924 BWN_WRITE_4(mac, BWN_RAM_DATA, val);
3928 bwn_mac_suspend(struct bwn_mac *mac)
3930 struct bwn_softc *sc = mac->mac_sc;
3934 KASSERT(mac->mac_suspended >= 0,
3937 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: suspended=%d\n",
3938 __func__, mac->mac_suspended);
3940 if (mac->mac_suspended == 0) {
3941 bwn_psctl(mac, BWN_PS_AWAKE);
3942 BWN_WRITE_4(mac, BWN_MACCTL,
3943 BWN_READ_4(mac, BWN_MACCTL)
3945 BWN_READ_4(mac, BWN_MACCTL);
3947 tmp = BWN_READ_4(mac, BWN_INTR_REASON);
3953 tmp = BWN_READ_4(mac, BWN_INTR_REASON);
3958 device_printf(sc->sc_dev, "MAC suspend failed\n");
3961 mac->mac_suspended++;
3965 bwn_mac_enable(struct bwn_mac *mac)
3967 struct bwn_softc *sc = mac->mac_sc;
3970 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: suspended=%d\n",
3971 __func__, mac->mac_suspended);
3973 state = bwn_shm_read_2(mac, BWN_SHARED,
3982 mac->mac_suspended--;
3983 KASSERT(mac->mac_suspended >= 0,
3985 if (mac->mac_suspended == 0) {
3986 BWN_WRITE_4(mac, BWN_MACCTL,
3987 BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_ON);
3988 BWN_WRITE_4(mac, BWN_INTR_REASON, BWN_INTR_MAC_SUSPENDED);
3989 BWN_READ_4(mac, BWN_MACCTL);
3990 BWN_READ_4(mac, BWN_INTR_REASON);
3991 bwn_psctl(mac, 0);
3996 bwn_psctl(struct bwn_mac *mac, uint32_t flags)
3998 struct bwn_softc *sc = mac->mac_sc;
4009 BWN_WRITE_4(mac, BWN_MACCTL,
4010 (BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_AWAKE) &
4012 BWN_READ_4(mac, BWN_MACCTL);
4015 ucstat = bwn_shm_read_2(mac, BWN_SHARED,
4022 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: ucstat=%d\n", __func__,
4027 bwn_fw_gets(struct bwn_mac *mac, enum bwn_fwtype type)
4029 struct bwn_softc *sc = mac->mac_sc;
4030 struct bwn_fw *fw = &mac->mac_fw;
4040 if (mac->mac_phy.type == BWN_PHYTYPE_AC)
4044 if (mac->mac_phy.type == BWN_PHYTYPE_AC)
4048 if (mac->mac_phy.type == BWN_PHYTYPE_LCN40)
4052 if (mac->mac_phy.type == BWN_PHYTYPE_N)
4056 if (mac->mac_phy.type == BWN_PHYTYPE_HT)
4060 if (mac->mac_phy.type == BWN_PHYTYPE_HT)
4065 if (mac->mac_phy.type == BWN_PHYTYPE_N)
4067 else if (mac->mac_phy.type == BWN_PHYTYPE_LCN)
4071 if (mac->mac_phy.type == BWN_PHYTYPE_LCN)
4075 if (mac->mac_phy.type == BWN_PHYTYPE_N)
4082 if (mac->mac_phy.type == BWN_PHYTYPE_N)
4084 else if (mac->mac_phy.type == BWN_PHYTYPE_LP)
4110 bwn_release_firmware(mac);
4115 error = bwn_fw_get(mac, type, filename, &fw->ucode);
4117 bwn_release_firmware(mac);
4124 error = bwn_fw_get(mac, type, "pcm5", &fw->pcm);
4128 bwn_release_firmware(mac);
4133 bwn_release_firmware(mac);
4142 switch (mac->mac_phy.type) {
4188 error = bwn_fw_get(mac, type, filename, &fw->initvals);
4190 bwn_release_firmware(mac);
4195 switch (mac->mac_phy.type) {
4243 mac->mac_phy.type);
4246 error = bwn_fw_get(mac, type, filename, &fw->initvals_band);
4248 bwn_release_firmware(mac);
4254 rev, mac->mac_phy.type);
4255 bwn_release_firmware(mac);
4260 bwn_fw_get(struct bwn_mac *mac, enum bwn_fwtype type,
4264 struct bwn_softc *sc = mac->mac_sc;
4280 (mac->mac_phy.type == BWN_PHYTYPE_LP) ? "lp_" : "", name);
4317 bwn_release_firmware(struct bwn_mac *mac)
4320 bwn_do_release_fw(&mac->mac_fw.ucode);
4321 bwn_do_release_fw(&mac->mac_fw.pcm);
4322 bwn_do_release_fw(&mac->mac_fw.initvals);
4323 bwn_do_release_fw(&mac->mac_fw.initvals_band);
4337 bwn_fw_loaducode(struct bwn_mac *mac)
4343 struct bwn_softc *sc = mac->mac_sc;
4350 ctl = BWN_READ_4(mac, BWN_MACCTL);
4354 BWN_WRITE_4(mac, BWN_MACCTL, ctl);
4356 bwn_shm_write_2(mac, BWN_SCRATCH, i, 0);
4358 bwn_shm_write_2(mac, BWN_SHARED, i, 0);
4360 data = GETFWOFFSET(mac->mac_fw.ucode, sizeof(struct bwn_fwhdr));
4361 bwn_shm_ctlword(mac, BWN_UCODE | BWN_SHARED_AUTOINC, 0x0000);
4362 for (i = 0; i < GETFWSIZE(mac->mac_fw.ucode, sizeof(struct bwn_fwhdr));
4364 BWN_WRITE_4(mac, BWN_SHM_DATA, be32toh(data[i]));
4368 if (mac->mac_fw.pcm.fw) {
4369 data = GETFWOFFSET(mac->mac_fw.pcm, sizeof(struct bwn_fwhdr));
4370 bwn_shm_ctlword(mac, BWN_HW, 0x01ea);
4371 BWN_WRITE_4(mac, BWN_SHM_DATA, 0x00004000);
4372 bwn_shm_ctlword(mac, BWN_HW, 0x01eb);
4373 for (i = 0; i < GETFWSIZE(mac->mac_fw.pcm,
4375 BWN_WRITE_4(mac, BWN_SHM_DATA, be32toh(data[i]));
4380 BWN_WRITE_4(mac, BWN_INTR_REASON, BWN_INTR_ALL);
4381 BWN_WRITE_4(mac, BWN_MACCTL,
4382 (BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_MCODE_JMP0) |
4386 if (BWN_READ_4(mac, BWN_INTR_REASON) == BWN_INTR_MAC_SUSPENDED)
4395 BWN_READ_4(mac, BWN_INTR_REASON);
4397 mac->mac_fw.rev = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_UCODE_REV);
4398 if (mac->mac_fw.rev <= 0x128) {
4408 if (mac->mac_fw.rev >= 598)
4409 mac->mac_fw.fw_hdr_format = BWN_FW_HDR_598;
4410 else if (mac->mac_fw.rev >= 410)
4411 mac->mac_fw.fw_hdr_format = BWN_FW_HDR_410;
4413 mac->mac_fw.fw_hdr_format = BWN_FW_HDR_351;
4424 if (mac->mac_fw.fw_hdr_format == BWN_FW_HDR_598) {
4432 mac->mac_fw.patch = bwn_shm_read_2(mac, BWN_SHARED,
4434 date = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_UCODE_DATE);
4435 mac->mac_fw.opensource = (date == 0xffff);
4437 mac->mac_flags |= BWN_MAC_FLAG_WME;
4438 mac->mac_flags |= BWN_MAC_FLAG_HWCRYPTO;
4440 time = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_UCODE_TIME);
4441 if (mac->mac_fw.opensource == 0) {
4444 mac->mac_fw.rev, mac->mac_fw.patch, date, time);
4445 if (mac->mac_fw.no_pcmfile)
4449 mac->mac_fw.patch = time;
4450 fwcaps = bwn_fwcaps_read(mac);
4451 if (!(fwcaps & BWN_FWCAPS_HWCRYPTO) || mac->mac_fw.no_pcmfile) {
4454 mac->mac_flags &= ~BWN_MAC_FLAG_HWCRYPTO;
4458 mac->mac_flags &= ~BWN_MAC_FLAG_WME;
4462 if (BWN_ISOLDFMT(mac))
4468 BWN_WRITE_4(mac, BWN_MACCTL,
4469 (BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_MCODE_RUN) |
4479 bwn_fwcaps_read(struct bwn_mac *mac)
4482 KASSERT(mac->mac_fw.opensource == 1,
4484 return (bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_FWCAPS));
4488 bwn_fwinitvals_write(struct bwn_mac *mac, const struct bwn_fwinitvals *ivals,
4497 struct bwn_softc *sc = mac->mac_sc;
4519 BWN_WRITE_4(mac, offset, be32toh(iv->data.d32));
4525 BWN_WRITE_2(mac, offset, be16toh(iv->data.d16));
4541 bwn_switch_channel(struct bwn_mac *mac, int chan)
4543 struct bwn_phy *phy = &(mac->mac_phy);
4544 struct bwn_softc *sc = mac->mac_sc;
4550 chan = phy->get_default_chan(mac);
4555 savedcookie = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_CHAN);
4556 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_CHAN, channelcookie);
4557 error = phy->switch_channel(mac, chan);
4561 mac->mac_phy.chan = chan;
4566 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_CHAN, savedcookie);
4591 bwn_wme_load(struct bwn_mac *mac)
4593 struct bwn_softc *sc = mac->mac_sc;
4599 bwn_mac_suspend(mac);
4601 bwn_wme_loadparams(mac, &(sc->sc_wmeParams[i]),
4603 bwn_mac_enable(mac);
4607 bwn_wme_loadparams(struct bwn_mac *mac,
4610 struct bwn_softc *sc = mac->mac_sc;
4615 slot = BWN_READ_2(mac, BWN_RNG) &
4637 tmp = bwn_shm_read_2(mac, BWN_SHARED,
4640 bwn_shm_write_2(mac, BWN_SHARED, shm_offset + (i * 2),
4643 bwn_shm_write_2(mac, BWN_SHARED, shm_offset + (i * 2),
4650 bwn_mac_write_bssid(struct bwn_mac *mac)
4652 struct bwn_softc *sc = mac->mac_sc;
4657 bwn_mac_setfilter(mac, BWN_MACFILTER_BSSID, sc->sc_bssid);
4667 bwn_ram_write(mac, 0x20 + i, tmp);
4672 bwn_mac_setfilter(struct bwn_mac *mac, uint16_t offset,
4678 if (!mac)
4682 BWN_WRITE_2(mac, BWN_MACFILTER_CONTROL, offset);
4686 BWN_WRITE_2(mac, BWN_MACFILTER_DATA, data);
4689 BWN_WRITE_2(mac, BWN_MACFILTER_DATA, data);
4692 BWN_WRITE_2(mac, BWN_MACFILTER_DATA, data);
4696 bwn_key_dowrite(struct bwn_mac *mac, uint8_t index, uint8_t algorithm,
4702 if (BWN_SEC_NEWAPI(mac))
4705 KASSERT(index < mac->mac_max_nr_keys,
4711 bwn_key_macwrite(mac, index, NULL);
4714 bwn_key_write(mac, index, algorithm, buf);
4716 bwn_key_macwrite(mac, index, mac_addr);
4718 mac->mac_key[index].algorithm = algorithm;
4722 bwn_key_macwrite(struct bwn_mac *mac, uint8_t index, const uint8_t *addr)
4724 struct bwn_softc *sc = mac->mac_sc;
4728 if (BWN_SEC_NEWAPI(mac))
4745 bwn_shm_write_4(mac, BWN_RCMTA, (index * 2) + 0, addrtmp[0]);
4746 bwn_shm_write_2(mac, BWN_RCMTA, (index * 2) + 1, addrtmp[1]);
4749 bwn_shm_write_4(mac, BWN_SHARED,
4751 bwn_shm_write_2(mac, BWN_SHARED,
4758 bwn_key_write(struct bwn_mac *mac, uint8_t index, uint8_t algorithm,
4765 kidx = BWN_SEC_KEY2FW(mac, index);
4766 bwn_shm_write_2(mac, BWN_SHARED,
4769 offset = mac->mac_ktp + (index * BWN_SEC_KEYSIZE);
4773 bwn_shm_write_2(mac, BWN_SHARED, offset + i, value);
4778 bwn_phy_exit(struct bwn_mac *mac)
4781 mac->mac_phy.rf_onoff(mac, 0);
4782 if (mac->mac_phy.exit != NULL)
4783 mac->mac_phy.exit(mac);
4787 bwn_dma_free(struct bwn_mac *mac)
4791 if ((mac->mac_flags & BWN_MAC_FLAG_DMA) == 0)
4793 dma = &mac->mac_method.dma;
4804 bwn_core_stop(struct bwn_mac *mac)
4806 struct bwn_softc *sc = mac->mac_sc;
4810 if (mac->mac_status < BWN_MAC_STATUS_STARTED)
4817 BWN_WRITE_4(mac, BWN_INTR_MASK, 0);
4818 BWN_READ_4(mac, BWN_INTR_MASK);
4819 bwn_mac_suspend(mac);
4821 mac->mac_status = BWN_MAC_STATUS_INITED;
4829 struct bwn_mac *mac;
4835 TAILQ_FOREACH(mac, &sc->sc_maclist, mac_list) {
4837 mac->mac_phy.supports_2ghz) {
4838 up_dev = mac;
4841 mac->mac_phy.supports_5ghz) {
4842 up_dev = mac;
4897 bwn_rf_turnon(struct bwn_mac *mac)
4900 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: called\n", __func__);
4902 bwn_mac_suspend(mac);
4903 mac->mac_phy.rf_onoff(mac, 1);
4904 mac->mac_phy.rf_on = 1;
4905 bwn_mac_enable(mac);
4909 bwn_rf_turnoff(struct bwn_mac *mac)
4912 DPRINTF(mac->mac_sc, BWN_DEBUG_RESET, "%s: called\n", __func__);
4914 bwn_mac_suspend(mac);
4915 mac->mac_phy.rf_onoff(mac, 0);
4916 mac->mac_phy.rf_on = 0;
4917 bwn_mac_enable(mac);
4924 bwn_phy_reset(struct bwn_mac *mac)
4930 sc = mac->mac_sc;
4957 struct bwn_mac *mac = sc->sc_curmac;
4970 bwn_led_newstate(mac, nstate);
4985 bwn_set_macaddr(mac);
4995 bwn_set_opmode(mac);
4996 bwn_set_pretbtt(mac);
4997 bwn_spu_setdelay(mac, 0);
4998 bwn_set_macaddr(mac);
5007 bwn_set_pretbtt(struct bwn_mac *mac)
5009 struct bwn_softc *sc = mac->mac_sc;
5016 pretbtt = (mac->mac_phy.type == BWN_PHYTYPE_A) ? 120 : 250;
5017 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PRETBTT, pretbtt);
5018 BWN_WRITE_2(mac, BWN_TSF_CFP_PRETBTT, pretbtt);
5024 struct bwn_mac *mac = arg;
5025 struct bwn_softc *sc = mac->mac_sc;
5028 if (mac->mac_status < BWN_MAC_STATUS_STARTED ||
5034 reason = BWN_READ_4(mac, BWN_INTR_REASON);
5037 reason &= mac->mac_intr_mask;
5042 mac->mac_reason[0] = BWN_READ_4(mac, BWN_DMA0_REASON) & 0x0001dc00;
5043 mac->mac_reason[1] = BWN_READ_4(mac, BWN_DMA1_REASON) & 0x0000dc00;
5044 mac->mac_reason[2] = BWN_READ_4(mac, BWN_DMA2_REASON) & 0x0000dc00;
5045 mac->mac_reason[3] = BWN_READ_4(mac, BWN_DMA3_REASON) & 0x0001dc00;
5046 mac->mac_reason[4] = BWN_READ_4(mac, BWN_DMA4_REASON) & 0x0000dc00;
5047 BWN_WRITE_4(mac, BWN_INTR_REASON, reason);
5048 BWN_WRITE_4(mac, BWN_DMA0_REASON, mac->mac_reason[0]);
5049 BWN_WRITE_4(mac, BWN_DMA1_REASON, mac->mac_reason[1]);
5050 BWN_WRITE_4(mac, BWN_DMA2_REASON, mac->mac_reason[2]);
5051 BWN_WRITE_4(mac, BWN_DMA3_REASON, mac->mac_reason[3]);
5052 BWN_WRITE_4(mac, BWN_DMA4_REASON, mac->mac_reason[4]);
5055 BWN_WRITE_4(mac, BWN_INTR_MASK, 0);
5057 mac->mac_reason_intr = reason;
5059 BWN_BARRIER(mac, 0, 0, BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
5061 taskqueue_enqueue(sc->sc_tq, &mac->mac_intrtask);
5068 struct bwn_mac *mac = arg;
5069 struct bwn_softc *sc = mac->mac_sc;
5074 if (mac->mac_status < BWN_MAC_STATUS_STARTED ||
5080 for (i = 0; i < N(mac->mac_reason); i++)
5081 merged |= mac->mac_reason[i];
5083 if (mac->mac_reason_intr & BWN_INTR_MAC_TXERR)
5084 device_printf(sc->sc_dev, "MAC trans error\n");
5086 if (mac->mac_reason_intr & BWN_INTR_PHY_TXERR) {
5088 mac->mac_phy.txerrors--;
5089 if (mac->mac_phy.txerrors == 0) {
5090 mac->mac_phy.txerrors = BWN_TXERROR_MAX;
5091 bwn_restart(mac, "PHY TX errors");
5099 mac->mac_reason[0], mac->mac_reason[1],
5100 mac->mac_reason[2], mac->mac_reason[3],
5101 mac->mac_reason[4], mac->mac_reason[5]);
5102 bwn_restart(mac, "DMA error");
5109 mac->mac_reason[0], mac->mac_reason[1],
5110 mac->mac_reason[2], mac->mac_reason[3],
5111 mac->mac_reason[4], mac->mac_reason[5]);
5115 if (mac->mac_reason_intr & BWN_INTR_UCODE_DEBUG)
5116 bwn_intr_ucode_debug(mac);
5117 if (mac->mac_reason_intr & BWN_INTR_TBTT_INDI)
5118 bwn_intr_tbtt_indication(mac);
5119 if (mac->mac_reason_intr & BWN_INTR_ATIM_END)
5120 bwn_intr_atim_end(mac);
5121 if (mac->mac_reason_intr & BWN_INTR_BEACON)
5122 bwn_intr_beacon(mac);
5123 if (mac->mac_reason_intr & BWN_INTR_PMQ)
5124 bwn_intr_pmq(mac);
5125 if (mac->mac_reason_intr & BWN_INTR_NOISESAMPLE_OK)
5126 bwn_intr_noise(mac);
5128 if (mac->mac_flags & BWN_MAC_FLAG_DMA) {
5129 if (mac->mac_reason[0] & BWN_DMAINTR_RX_DONE) {
5130 bwn_dma_rx(mac->mac_method.dma.rx);
5134 rx = bwn_pio_rx(&mac->mac_method.pio.rx);
5136 KASSERT(!(mac->mac_reason[1] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
5137 KASSERT(!(mac->mac_reason[2] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
5138 KASSERT(!(mac->mac_reason[3] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
5139 KASSERT(!(mac->mac_reason[4] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
5140 KASSERT(!(mac->mac_reason[5] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
5142 if (mac->mac_reason_intr & BWN_INTR_TX_OK) {
5143 bwn_intr_txeof(mac);
5147 BWN_WRITE_4(mac, BWN_INTR_MASK, mac->mac_intr_mask);
5166 bwn_led_event(mac, evt);
5172 BWN_BARRIER(mac, 0, 0, BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
5178 bwn_restart(struct bwn_mac *mac, const char *msg)
5180 struct bwn_softc *sc = mac->mac_sc;
5183 if (mac->mac_status < BWN_MAC_STATUS_INITED)
5187 ieee80211_runtask(ic, &mac->mac_hwreset);
5191 bwn_intr_ucode_debug(struct bwn_mac *mac)
5193 struct bwn_softc *sc = mac->mac_sc;
5196 if (mac->mac_fw.opensource == 0)
5199 reason = bwn_shm_read_2(mac, BWN_SCRATCH, BWN_DEBUGINTR_REASON_REG);
5202 bwn_handle_fwpanic(mac);
5218 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_DEBUGINTR_REASON_REG,
5223 bwn_intr_tbtt_indication(struct bwn_mac *mac)
5225 struct bwn_softc *sc = mac->mac_sc;
5229 bwn_psctl(mac, 0);
5231 mac->mac_flags |= BWN_MAC_FLAG_DFQVALID;
5235 bwn_intr_atim_end(struct bwn_mac *mac)
5238 if (mac->mac_flags & BWN_MAC_FLAG_DFQVALID) {
5239 BWN_WRITE_4(mac, BWN_MACCMD,
5240 BWN_READ_4(mac, BWN_MACCMD) | BWN_MACCMD_DFQ_VALID);
5241 mac->mac_flags &= ~BWN_MAC_FLAG_DFQVALID;
5246 bwn_intr_beacon(struct bwn_mac *mac)
5248 struct bwn_softc *sc = mac->mac_sc;
5256 mac->mac_intr_mask &= ~BWN_INTR_BEACON;
5258 cmd = BWN_READ_4(mac, BWN_MACCMD);
5263 BWN_WRITE_4(mac, BWN_INTR_REASON, BWN_INTR_BEACON);
5264 mac->mac_intr_mask |= BWN_INTR_BEACON;
5270 bwn_load_beacon0(mac);
5271 bwn_load_beacon1(mac);
5272 cmd = BWN_READ_4(mac, BWN_MACCMD);
5274 BWN_WRITE_4(mac, BWN_MACCMD, cmd);
5277 bwn_load_beacon0(mac);
5278 cmd = BWN_READ_4(mac, BWN_MACCMD);
5280 BWN_WRITE_4(mac, BWN_MACCMD, cmd);
5282 bwn_load_beacon1(mac);
5283 cmd = BWN_READ_4(mac, BWN_MACCMD);
5285 BWN_WRITE_4(mac, BWN_MACCMD, cmd);
5291 bwn_intr_pmq(struct bwn_mac *mac)
5296 tmp = BWN_READ_4(mac, BWN_PS_STATUS);
5300 BWN_WRITE_2(mac, BWN_PS_STATUS, 0x0002);
5304 bwn_intr_noise(struct bwn_mac *mac)
5306 struct bwn_phy_g *pg = &mac->mac_phy.phy_g;
5312 if (mac->mac_phy.type != BWN_PHYTYPE_G)
5315 KASSERT(mac->mac_noise.noi_running, ("%s: fail", __func__));
5316 *((uint32_t *)noise) = htole32(bwn_jssi_read(mac));
5321 KASSERT(mac->mac_noise.noi_nsamples < 8,
5323 i = mac->mac_noise.noi_nsamples;
5328 mac->mac_noise.noi_samples[i][0] = pg->pg_nrssi_lt[noise[0]];
5329 mac->mac_noise.noi_samples[i][1] = pg->pg_nrssi_lt[noise[1]];
5330 mac->mac_noise.noi_samples[i][2] = pg->pg_nrssi_lt[noise[2]];
5331 mac->mac_noise.noi_samples[i][3] = pg->pg_nrssi_lt[noise[3]];
5332 mac->mac_noise.noi_nsamples++;
5333 if (mac->mac_noise.noi_nsamples == 8) {
5337 average += mac->mac_noise.noi_samples[i][j];
5340 tmp = (bwn_shm_read_2(mac, BWN_SHARED, 0x40c) / 128) & 0x1f;
5347 mac->mac_stats.link_noise = average;
5348 mac->mac_noise.noi_running = 0;
5352 bwn_noise_gensample(mac);
5358 struct bwn_mac *mac = prq->prq_mac;
5359 struct bwn_softc *sc = mac->mac_sc;
5364 if (mac->mac_status < BWN_MAC_STATUS_STARTED)
5398 bwn_intr_txeof(struct bwn_mac *mac)
5404 BWN_ASSERT_LOCKED(mac->mac_sc);
5407 stat0 = BWN_READ_4(mac, BWN_XMITSTAT_0);
5410 stat1 = BWN_READ_4(mac, BWN_XMITSTAT_1);
5412 DPRINTF(mac->mac_sc, BWN_DEBUG_XMIT,
5430 DPRINTF(mac->mac_sc, BWN_DEBUG_XMIT,
5445 bwn_handle_txeof(mac, &stat);
5452 struct bwn_mac *mac = arg;
5453 struct bwn_softc *sc = mac->mac_sc;
5459 prev_status = mac->mac_status;
5461 bwn_core_stop(mac);
5463 bwn_core_exit(mac);
5466 error = bwn_core_init(mac);
5471 bwn_core_start(mac);
5481 bwn_handle_fwpanic(struct bwn_mac *mac)
5483 struct bwn_softc *sc = mac->mac_sc;
5486 reason = bwn_shm_read_2(mac, BWN_SCRATCH, BWN_FWPANIC_REASON_REG);
5490 bwn_restart(mac, "ucode panic");
5494 bwn_load_beacon0(struct bwn_mac *mac)
5501 bwn_load_beacon1(struct bwn_mac *mac)
5508 bwn_jssi_read(struct bwn_mac *mac)
5512 val = bwn_shm_read_2(mac, BWN_SHARED, 0x08a);
5514 val |= bwn_shm_read_2(mac, BWN_SHARED, 0x088);
5520 bwn_noise_gensample(struct bwn_mac *mac)
5524 bwn_shm_write_2(mac, BWN_SHARED, 0x088, (jssi & 0x0000ffff));
5525 bwn_shm_write_2(mac, BWN_SHARED, 0x08a, (jssi & 0xffff0000) >> 16);
5526 BWN_WRITE_4(mac, BWN_MACCMD,
5527 BWN_READ_4(mac, BWN_MACCMD) | BWN_MACCMD_BGNOISE);
5553 struct bwn_mac *mac = dr->dr_mac;
5554 struct bwn_softc *sc = mac->mac_sc;
5555 struct bwn_dma *dma = &mac->mac_method.dma;
5607 switch (mac->mac_fw.fw_hdr_format) {
5618 if (!(mac->mac_sc->sc_filters & BWN_MACCTL_PASS_BADFCS)) {
5631 bwn_handle_txeof(struct bwn_mac *mac, const struct bwn_txstatus *status)
5633 struct bwn_softc *sc = mac->mac_sc;
5634 struct bwn_stats *stats = &mac->mac_stats;
5636 BWN_ASSERT_LOCKED(mac->mac_sc);
5649 if (mac->mac_flags & BWN_MAC_FLAG_DMA) {
5650 bwn_dma_handle_txeof(mac, status);
5652 bwn_pio_handle_txeof(mac, status);
5655 bwn_phy_txpower_check(mac, 0);
5661 struct bwn_mac *mac = prq->prq_mac;
5662 struct bwn_softc *sc = mac->mac_sc;
5720 switch (mac->mac_fw.fw_hdr_format) {
5731 if (!(mac->mac_sc->sc_filters & BWN_MACCTL_PASS_BADFCS)) {
5790 struct bwn_mac *mac = dr->dr_mac;
5791 struct bwn_dma *dma = &mac->mac_method.dma;
5914 bwn_rx_rssi_calc(struct bwn_mac *mac, uint8_t in_rssi,
5917 struct bwn_phy *phy = &mac->mac_phy;
5933 if (mac->mac_sc->sc_board_info.board_flags
5966 bwn_rxeof(struct bwn_mac *mac, struct mbuf *m, const void *_rxhdr)
5970 struct bwn_softc *sc = mac->mac_sc;
5989 switch (mac->mac_fw.fw_hdr_format) {
6028 BWN_ISOLDFMT(mac),
6033 rate = bwn_plcp_get_ofdmrate(mac, plcp,
6036 rate = bwn_plcp_get_cckrate(mac, plcp);
6038 if (!(mac->mac_sc->sc_filters & BWN_MACCTL_PASS_BADPLCP))
6049 rssi = bwn_rx_rssi_calc(mac, rxhdr->phy.abg.rssi,
6061 DPRINTF(mac->mac_sc, BWN_DEBUG_RECV,
6077 noise = mac->mac_stats.link_noise;
6082 bwn_rx_radiotap(mac, m, rxhdr, plcp, rate, rssi, noise);
6128 bwn_dma_handle_txeof(struct bwn_mac *mac,
6131 struct bwn_dma *dma = &mac->mac_method.dma;
6135 struct bwn_softc *sc = mac->mac_sc;
6140 dr = bwn_dma_parse_cookie(mac, status, status->cookie, &slot);
6183 bwn_pio_handle_txeof(struct bwn_mac *mac,
6188 struct bwn_softc *sc = mac->mac_sc;
6192 tq = bwn_pio_parse_cookie(mac, status->cookie, &tp);
6196 tq->tq_used -= roundup(tp->tp_m->m_pkthdr.len + BWN_HDRSIZE(mac), 4);
6215 bwn_phy_txpower_check(struct bwn_mac *mac, uint32_t flags)
6217 struct bwn_softc *sc = mac->mac_sc;
6218 struct bwn_phy *phy = &mac->mac_phy;
6234 result = phy->recalc_txpwr(mac,
6242 ieee80211_runtask(ic, &mac->mac_txpower);
6312 bwn_set_txhdr_phyctl1(struct bwn_mac *mac, uint8_t bitrate)
6314 struct bwn_phy *phy = &mac->mac_phy;
6383 bwn_set_txhdr(struct bwn_mac *mac, struct ieee80211_node *ni,
6386 const struct bwn_phy *phy = &mac->mac_phy;
6387 struct bwn_softc *sc = mac->mac_sc;
6455 switch (mac->mac_fw.fw_hdr_format) {
6488 switch (bwn_antenna_sanitize(mac, 0)) {
6535 switch (mac->mac_fw.fw_hdr_format) {
6559 switch (mac->mac_fw.fw_hdr_format) {
6577 switch (mac->mac_fw.fw_hdr_format) {
6605 txhdr->phyctl_1rts = htole16(bwn_set_txhdr_phyctl1(mac, rts_rate));
6606 txhdr->phyctl_1rtsfb = htole16(bwn_set_txhdr_phyctl1(mac, rts_rate_fb));
6611 txhdr->phyctl_1 = htole16(bwn_set_txhdr_phyctl1(mac, rate));
6612 txhdr->phyctl_1fb = htole16(bwn_set_txhdr_phyctl1(mac, rate_fb));
6615 switch (mac->mac_fw.fw_hdr_format) {
6679 bwn_antenna_sanitize(struct bwn_mac *mac, uint8_t n)
6681 struct bwn_softc *sc = mac->mac_sc;
6686 if (mac->mac_phy.gmode)
6737 bwn_pio_write_multi_4(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
6740 struct bwn_softc *sc = mac->mac_sc;
6746 bwn_pio_write_4(mac, tq, BWN_PIO8_TXCTL, ctl);
6766 bwn_pio_write_4(mac, tq, BWN_PIO8_TXCTL, ctl);
6767 bwn_pio_write_4(mac, tq, BWN_PIO8_TXDATA, value);
6774 bwn_pio_write_4(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
6778 BWN_WRITE_4(mac, tq->tq_base + offset, value);
6782 bwn_pio_write_multi_2(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
6785 struct bwn_softc *sc = mac->mac_sc;
6789 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
6795 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
6796 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXDATA, data[len - 1]);
6803 bwn_pio_write_mbuf_2(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
6812 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
6821 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXDATA, data);
6828 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
6829 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXDATA, data);
6836 bwn_set_slot_time(struct bwn_mac *mac, uint16_t time)
6840 if (mac->mac_phy.type != BWN_PHYTYPE_G)
6843 BWN_WRITE_2(mac, 0x684, 510 + time);
6846 bwn_shm_write_2(mac, BWN_SHARED, 0x0010, time);
6851 bwn_dma_select(struct bwn_mac *mac, uint8_t prio)
6854 if ((mac->mac_flags & BWN_MAC_FLAG_WME) == 0)
6855 return (mac->mac_method.dma.wme[WME_AC_BE]);
6859 return (mac->mac_method.dma.wme[WME_AC_VO]);
6861 return (mac->mac_method.dma.wme[WME_AC_VI]);
6863 return (mac->mac_method.dma.wme[WME_AC_BE]);
6865 return (mac->mac_method.dma.wme[WME_AC_BK]);
6891 bwn_pio_parse_cookie(struct bwn_mac *mac, uint16_t cookie,
6894 struct bwn_pio *pio = &mac->mac_method.pio;
6930 struct bwn_mac *mac = arg;
6933 if (mac == NULL)
6936 sc = mac->mac_sc;
6939 if (mac->mac_status >= BWN_MAC_STATUS_STARTED &&
6940 mac->mac_phy.set_txpwr != NULL)
6941 mac->mac_phy.set_txpwr(mac);
6946 bwn_task_15s(struct bwn_mac *mac)
6950 if (mac->mac_fw.opensource) {
6951 reg = bwn_shm_read_2(mac, BWN_SCRATCH, BWN_WATCHDOG_REG);
6953 bwn_restart(mac, "fw watchdog");
6956 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_WATCHDOG_REG, 1);
6958 if (mac->mac_phy.task_15s)
6959 mac->mac_phy.task_15s(mac);
6961 mac->mac_phy.txerrors = BWN_TXERROR_MAX;
6965 bwn_task_30s(struct bwn_mac *mac)
6968 if (mac->mac_phy.type != BWN_PHYTYPE_G || mac->mac_noise.noi_running)
6970 mac->mac_noise.noi_running = 1;
6971 mac->mac_noise.noi_nsamples = 0;
6973 bwn_noise_gensample(mac);
6977 bwn_task_60s(struct bwn_mac *mac)
6980 if (mac->mac_phy.task_60s)
6981 mac->mac_phy.task_60s(mac);
6982 bwn_phy_txpower_check(mac, BWN_TXPWR_IGNORE_TIME);
6988 struct bwn_mac *mac = arg;
6989 struct bwn_softc *sc = mac->mac_sc;
6992 if (mac->mac_status != BWN_MAC_STATUS_STARTED)
6995 if (mac->mac_task_state % 4 == 0)
6996 bwn_task_60s(mac);
6997 if (mac->mac_task_state % 2 == 0)
6998 bwn_task_30s(mac);
6999 bwn_task_15s(mac);
7001 mac->mac_task_state++;
7002 callout_reset(&sc->sc_task_ch, hz * 15, bwn_tasks, mac);
7006 bwn_plcp_get_ofdmrate(struct bwn_mac *mac, struct bwn_plcp6 *plcp, uint8_t a)
7008 struct bwn_softc *sc = mac->mac_sc;
7036 bwn_plcp_get_cckrate(struct bwn_mac *mac, struct bwn_plcp6 *plcp)
7038 struct bwn_softc *sc = mac->mac_sc;
7055 bwn_rx_radiotap(struct bwn_mac *mac, struct mbuf *m,
7059 struct bwn_softc *sc = mac->mac_sc;
7072 bwn_tsf_read(mac, &tsf);
7076 switch (mac->mac_fw.fw_hdr_format) {
7097 bwn_tsf_read(struct bwn_mac *mac, uint64_t *tsf)
7101 KASSERT(bhnd_get_hwrev(mac->mac_sc->sc_dev) >= 3,
7104 low = BWN_READ_4(mac, BWN_REV3PLUS_TSF_LOW);
7105 high = BWN_READ_4(mac, BWN_REV3PLUS_TSF_HIGH);
7112 bwn_dma_attach(struct bwn_mac *mac)
7123 dma = &mac->mac_method.dma;
7124 sc = mac->mac_sc;
7134 switch (mac->mac_dmatype) {
7160 mac->mac_dmatype);
7191 mac->mac_flags |= BWN_MAC_FLAG_DMA;
7256 dma->wme[WME_AC_BK] = bwn_dma_ringsetup(mac, 0, 1);
7260 dma->wme[WME_AC_BE] = bwn_dma_ringsetup(mac, 1, 1);
7264 dma->wme[WME_AC_VI] = bwn_dma_ringsetup(mac, 2, 1);
7268 dma->wme[WME_AC_VO] = bwn_dma_ringsetup(mac, 3, 1);
7272 dma->mcast = bwn_dma_ringsetup(mac, 4, 1);
7275 dma->rx = bwn_dma_ringsetup(mac, 0, 0);
7293 bwn_dma_parse_cookie(struct bwn_mac *mac, const struct bwn_txstatus *status,
7296 struct bwn_dma *dma = &mac->mac_method.dma;
7298 struct bwn_softc *sc = mac->mac_sc;
7300 BWN_ASSERT_LOCKED(mac->mac_sc);
7342 bwn_dma_stop(struct bwn_mac *mac)
7346 if ((mac->mac_flags & BWN_MAC_FLAG_DMA) == 0)
7348 dma = &mac->mac_method.dma;
7369 bwn_pio_stop(struct bwn_mac *mac)
7373 if (mac->mac_flags & BWN_MAC_FLAG_DMA)
7375 pio = &mac->mac_method.pio;
7385 bwn_led_attach(struct bwn_mac *mac)
7387 struct bwn_softc *sc = mac->mac_sc;
7472 bwn_led_newstate(struct bwn_mac *mac, enum ieee80211_state nstate)
7474 struct bwn_softc *sc = mac->mac_sc;
7487 val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
7529 BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
7533 bwn_led_event(struct bwn_mac *mac, int event)
7535 struct bwn_softc *sc = mac->mac_sc;
7564 bwn_led_blink_start(mac, bwn_led_duration[rate].on_dur,
7569 bwn_led_blink_start(struct bwn_mac *mac, int on_dur, int off_dur)
7571 struct bwn_softc *sc = mac->mac_sc;
7575 val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
7577 BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
7587 callout_reset(&sc->sc_led_blink_ch, on_dur, bwn_led_blink_next, mac);
7593 struct bwn_mac *mac = arg;
7594 struct bwn_softc *sc = mac->mac_sc;
7597 val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
7599 BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
7602 bwn_led_blink_end, mac);
7608 struct bwn_mac *mac = arg;
7609 struct bwn_softc *sc = mac->mac_sc;
7644 struct bwn_mac *mac = sc->sc_curmac;
7647 KASSERT(mac->mac_status >= BWN_MAC_STATUS_STARTED,
7648 ("%s: invalid MAC status %d", __func__, mac->mac_status));
7650 if (mac->mac_phy.rev >= 3 || mac->mac_phy.type == BWN_PHYTYPE_LP
7651 || mac->mac_phy.type == BWN_PHYTYPE_N) {
7652 if (!(BWN_READ_4(mac, BWN_RF_HWENABLED_HI)
7656 if (BWN_READ_2(mac, BWN_RF_HWENABLED_LO)
7661 if (mac->mac_flags & BWN_MAC_FLAG_RADIO_ON)
7669 mac->mac_flags |= BWN_MAC_FLAG_RADIO_ON;
7671 mac->mac_flags &= ~BWN_MAC_FLAG_RADIO_ON;
7676 if (cur != mac->mac_phy.rf_on) {
7678 bwn_rf_turnon(mac);
7680 bwn_rf_turnoff(mac);
7691 struct bwn_mac *mac;
7694 /* XXX assume that count of MAC is only 1. */
7696 if ((mac = sc->sc_curmac) == NULL)
7698 stats = &mac->mac_stats;