Lines Matching +full:4 +full:kb +full:- +full:page
1 /*-
34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
130 /* Engine CKV - Supported host_algorithms. */
132 /* Engine CKV - The Host EC curve name and ECC public key information. */
134 /* Engine CKV - The ECDSA signature. */
136 /* Engine CKV - The firmware EC curve name and ECC public key information. */
138 /* Engine CKV - Supported firmware algorithms. */
186 * Global TLV range: `0 - (63k-1)`
188 * Local TLV range: `63k - (64k-1)`
210 * be optionally completed on. If the value is -1, then no
220 * 0x0 - 0xFFF8 - Used for function ids
221 * 0xFFF8 - 0xFFFE - Reserved for internal processors
222 * 0xFFFF - HWRM
280 /* Reserved for user-space HWRM interface */
771 * # NOTE - definitions already in hwrm_req_type, in hwrm_types.yaml
1077 /* Experimental - DEPRECATED */
1090 * Engine CKV - Get the current allocation status of keys provisioned in
1094 /* Engine CKV - Add a new CKEK used to encrypt keys. */
1096 /* Engine CKV - Delete a previously added CKEK. */
1098 /* Engine CKV - Add a new key to the key vault. */
1100 /* Engine CKV - Delete a key from the key vault. */
1102 /* Engine CKV - Delete all keys from the key vault. */
1104 /* Engine CKV - Get random data. */
1106 /* Engine CKV - Generate and encrypt a new AES key. */
1108 /* Engine CKV - Configure a label index with a label value. */
1110 /* Engine CKV - Query a label */
1112 /* Engine - Query the available queue groups configuration. */
1114 /* Engine - Query the queue groups assigned to a function. */
1116 /* Engine - Query the available queue group meter profile configuration. */
1118 /* Engine - Query the configuration of a queue group meter profile. */
1120 /* Engine - Allocate a queue group meter profile. */
1122 /* Engine - Free a queue group meter profile. */
1124 /* Engine - Query the meters assigned to a queue group. */
1126 /* Engine - Bind a queue group meter profile to a queue group. */
1128 /* Engine - Unbind a queue group meter profile from a queue group. */
1130 /* Engine - Bind a queue group to a function. */
1132 /* Engine - Query the scheduling group configuration. */
1134 /* Engine - Query the queue groups assigned to a scheduling group. */
1136 /* Engine - Query the configuration of a scheduling group's meter profiles. */
1138 /* Engine - Configure a scheduling group's meter profiles. */
1140 /* Engine - Bind a queue group to a scheduling group. */
1142 /* Engine - Unbind a queue group from its scheduling group. */
1144 /* Engine - Query the Engine configuration. */
1146 /* Engine - Configure the statistics accumulator for an Engine. */
1148 /* Engine - Clear the statistics accumulator for an Engine. */
1150 /* Engine - Query the statistics accumulator for an Engine. */
1153 * Engine - Query statistics counters for continuous errors from all CDDIP
1157 /* Engine - Allocate an Engine RQ. */
1159 /* Engine - Free an Engine RQ. */
1161 /* Engine - Allocate an Engine CQ. */
1163 /* Engine - Free an Engine CQ. */
1165 /* Engine - Allocate an NQ. */
1167 /* Engine - Free an NQ. */
1169 /* Engine - Set the on-die RQE credit update location. */
1171 /* Engine - Query the engine function configuration. */
1197 /* PTP - Queries configuration of timesync IO pins. */
1199 /* PTP - Configuration of timesync IO pins. */
1201 /* PTP - Configuration for disciplining PHC. */
1203 /* PTP - Queries for PHC timestamps. */
1205 /* PTP - Extended PTP configuration. */
1207 /* PTP - Query extended PTP configuration. */
1295 * CA-signed certificate chain to the device.
1622 * sub-option of a supported HWRM command is unsupported.
1774 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
1796 * This value will be used by tools for User-space HWRM Interface.
1805 /* non-zero means beta version */
1832 * * 0x0-0xFFF8 - The function ID
1833 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
1834 * * 0xFFFD - Reserved for user-space HWRM interface
1835 * * 0xFFFF - HWRM
2204 * re-try HWRM_VER_GET with some timeout period. The timeout period
2208 * For Example, PCIe hot-plug:
2396 /* This value selects the format for the mid-path command for the CFA. */
2420 * value of zero is invalid. Maximum value is 4.
2441 /* This value selects the format for the mid-path command for the CFA. */
2460 * Indicates write-through control. Indicates write-through when set,
2470 * value of zero is invalid. Maximum value is 4.
2493 /* This value selects the format for the mid-path command for the CFA. */
2496 * This is read-clear command. 32B can be read from a table and
2541 uint16_t unused1[4];
2547 /* This value selects the format for the mid-path command for the CFA. */
2557 * Indicates write-through control. Indicates write-through when set,
2564 * Indicates write-through control. Indicates write-through when set,
2574 * value of zero is invalid. Maximum value is 4.
2598 /* This value selects the format for the mid-path command for the CFA. */
2604 * Indicates write-through control. Indicates write-through when set,
2611 * Indicates write-through control. Indicates write-through when set,
2621 * value of zero is invalid. Maximum value is 4.
2643 /* This value selects the format for the mid-path command for the CFA. */
2679 /* This value selects the format for the mid-path command for the CFA. */
2691 * value of zero is invalid. Maximum value is 4.
2709 * This value selects the operation for the mid-path command for the
2726 #define CE_BDS_ADD_DATA_MSG_KID_SFT 4
2739 * converts the 4b encoded version number to 16b of actual version
2741 * this "KTLS crypto add" mid-path command.
2762 * AES-GCM cipher suites. These are exchanged as part of the handshake
2765 * TLS1.2, 4B of Salt is concatenated with 8B of explicit_nonce to
2767 * is zero padded to 12B and then xor'ed with the 4B of salt to generate
2768 * the 12B of IV. This value is initialized by this mid-path command.
2770 uint8_t salt[4];
2771 uint8_t unused1[4];
2776 * the Mid-path BD download/update of a kTLS connection. For every TCP
2784 * the Mid-path BD download/update of a kTLS connection. For every
2794 * mid-path BD download/update of a kTLS connection. TCE HW increments
2801 * exchanged during the hand-shake protocol by the client-server and
2802 * provided to HW through this mid-path BD.
2812 /* ce_bds_delete_data_msg (size:32b/4B) */
2817 * This value selects the operation for the mid-path command for the
2838 #define CE_BDS_DELETE_DATA_MSG_KID_SFT 4
2858 * This value selects the operation for the mid-path command for the
2874 #define CE_BDS_RESYNC_RESP_ACK_MSG_KID_SFT 4
2908 * This value selects the operation for the mid-path command for the
2924 #define CE_BDS_RESYNC_RESP_NACK_MSG_KID_SFT 4
2988 * mid-path BD updates, but is set to correct value when a presync BD is
2998 * be re-transmitted. This field is initialized to 0 during Mid-path BD
3000 * Pre-sync BD is detected. This field is never updated unless another
3001 * Pre-sync BD signaling a new retransmission is scheduled.
3009 * that need to be re-transmitted. This field is initialized to 0 during
3010 * Mid-path BD add command and initialized to value provided by the
3011 * driver when Pre-sync BD is detected. This field is never updated
3012 * unless another Pre-sync BD signaling a new retransmission is
3031 * Initial Vector (IV). The field is initialized to 0 during Mid-path BD
3032 * download. Is initialized to correct value when a pre-sync BD is
3034 * processed as it parses the TCP packet. Subsequent pre-sync BDs
3046 * This value selects the operation for the mid-path command for the
3063 #define CE_BDS_QUIC_ADD_DATA_MSG_KID_SFT 4
3104 * Least-significant 64 bits (of 96) of additional IV that is
3110 * Most-significant 32 bits (of 96) of additional IV that is
3114 uint8_t quic_iv_hi[4];
3119 * mid-path BD.
3162 * the mid-path destinations.
3166 * Indicates that this BD is used to issue a cryptographic pre-
3257 /* indicates 512 <= packet length < 1KB */
3259 /* indicates 1KB <= packet length < 2KB */
3261 /* indicates packet length >= 2KB */
3371 /* indicates 512 <= packet length < 1KB */
3373 /* indicates 1KB <= packet length < 2KB */
3375 /* indicates packet length >= 2KB */
3469 * - 2'b00: ts_none - no timestamp
3470 * - 2'b01: ts_ptp_1step - 1-step PTP
3471 * - 2'b10: ts_2cmpl - 2-step PTP timestamp or PA timestamp
3472 * - 2'b11: ts_rsvd - reserved, same behavior as ts_none
3474 * This additional completion may carry a 2-step PTP timestamp or a PA
3489 * is ICMP for example (non-TCP/UDP), even if the tcp_udp_chksum is
3525 * The flag is ignored if the LSO packet is a normal (non-tunneled)
3566 * If set to '1', the controller replaces the Outer-tunnel IP checksum
3577 * If set to zero when LSO is '1', then the IPID of the Outer-tunnel
3579 * when LSO is '1', then the IPID of the Outer-tunnel IP header will
3581 * flag is ignored if the LSO packet is a normal (non-tunneled) TCP
3601 * packet as 16-bit words.
3608 * If lflags.bd_ts_en is 1, this is the lower 7 bits of the 24-bit
3610 * the 20-bit KID.
3613 * The KID value of all-ones is reserved for non-KTLS packets, which
3630 * If lflags.bd_ts_en is 1, this is the upper 17 bits of the 24-bit
3632 * of this field contain the upper 13 bits of the 20-bit KID.
3635 * The KID value of all-ones is reserved for non-KTLS packets, which
3656 * This value is action meta-data that defines CFA edit operations
3698 * - meta[17:16] - TPID select value (0 = 0x8100).
3699 * - meta[15:12] - PRI/DE value.
3700 * - meta[11:0] - VID value.
3705 * - Wh+/SR - this option is not supported.
3706 * - Thor - cfa_meta[15:0] is used for metadata output if en_bd_meta
3708 * - SR2 - {4'd0, cfa_meta[27:0]} is used for metadata output if
3737 * Only the packet_end bit may be set in non-first BDs.
3788 * this field carries a value of 20, then bd_cnt must equal 4.
3838 * was actually transmitted at the TX MAC for 2-step time sync. This
3846 * updates an outer UDP checksum if it is non-zero.
3885 * was actually transmitted at the TX MAC for 1-step time sync. This
3890 * If set to '1', the controller replaces the Outer-tunnel IP checksum
3900 * If set to zero when LSO is '1', then the IPID of the Outer-tunnel IP
3902 * when LSO is '1', then the IPID of the Outer-tunnel IP header will be
3904 * flag is ignored if the LSO packet is a normal (non-tunneled) TCP
3922 * If lflags.bd_ts_en is 1, this is the lower 7 bits of the 24-bit
3924 * the 20-bit KID.
3927 * The KID value of all-ones is reserved for non-KTLS packets, which
3937 * If lflags.bd_ts_en is 1, this is the upper 17 bits of the 24-bit
3939 * of this field contain the upper 13 bits of the 20-bit KID.
3942 * The KID value of all-ones is reserved for non-KTLS packets, which
3963 * This value is action meta-data that defines CFA edit operations
4004 * - meta[17:16] - TPID select value (0 = 0x8100).
4005 * - meta[15:12] - PRI/DE value.
4006 * - meta[11:0] - VID value.
4011 * - Wh+/SR - this option is not supported.
4012 * - Thor - cfa_meta[15:0] is used for metadata output if en_bd_meta
4014 * - SR2 - {4'd0, cfa_meta[27:0]} is used for metadata output if
4043 /* Unless otherwise stated, sub-fields of this field are always valid. */
4050 * the mid-path destinations.
4061 * consumed in the ring by this mid-path command BD, including the
4079 * Tx mid-path command.
4089 /* Unless otherwise stated, sub-fields of this field are always valid. */
4095 * Indicates that this BD is used to issue a cryptographic pre-
4107 * consumed in the ring by this pre-sync command BD, including the
4134 * The KID value of all-ones is reserved for non-KTLS packets, which
4163 /* Unless otherwise stated, sub-fields of this field are always valid. */
4176 * Note: This mode is similar to regular (non-timed transmit)
4211 * This field represents the rate of the flow (QP) in terms of KB/s.
4225 * This field represents the nano-second time to transmit the
4255 * cache-line aligned to produce packets that are easy to
4262 * nearest cache-line with zero value padding.
4265 * If receive buffers start/end on cache-line boundaries, this
4369 * nearest cache-line with zero value padding.
4372 * If receive buffers start/end on cache-line boundaries, this
4409 * This field represents the Mid-Path client that generated the
4436 * Indicates an SVIF-Table scope error. This error can occur on any
4482 * This is read-clear command. 32B can be read from a table and a 16b
4512 * This field represents the Mid-Path client that generated the
4541 #define CFA_CMPLS_CMP_DATA_MSG_HASH_MSB_SFT 4
4547 #define CFA_CMPLS_CMP_DATA_MSG_TABLE_TYPE_SFT 4
4549 #define CFA_CMPLS_CMP_DATA_MSG_TABLE_TYPE_ACTION (UINT32_C(0x0) << 4)
4551 #define CFA_CMPLS_CMP_DATA_MSG_TABLE_TYPE_EM (UINT32_C(0x1) << 4)
4567 /* CFA Mid-Path 32B DMA Message */
4575 /* CFA Mid-Path 64B DMA Message */
4583 /* CFA Mid-Path 96B DMA Message */
4591 /* CFA Mid-Path 128B DMA Message */
4617 * This value indicates the CE sub-type operation that is being
4626 /* Re-Sync Completion (Unsolicited) */
4630 * This field represents the Mid-Path client that generated the
4661 #define CE_CMPLS_CMP_DATA_MSG_UNUSED1_SFT 4
4706 * NO-OP completion:
4707 * Completion of NO-OP. Length = 16B
4884 * CSO or short CSO inline BD, then the 16-bit opaque field from the
5004 * inline BD, then the 16-bit opaque field from the short CSO BD will
5140 * For 2-step PTP timestamps, bits[3:0] of this field represent the
5141 * sub-nanosecond portion of the packet timestamp, returned from PM
5142 * for 2-step PTP timestamps. For PA timestamps, this field also
5143 * represents the sub-nanosecond portion of the packet timestamp;
5145 * PA timestamps is limited to approximately +/- 4 ns. Therefore
5152 * timestamp, returned from PM for 2-step PTP timestamps or from
5159 * short CSO or short CSO inline BD, then the 16-bit opaque field
5236 * SO-TXTIME packet violated the max_ttx_overtime constraint i.e.,
5249 * timestamp, returned from PM for 2-step PTP timestamp or from
5401 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
5404 * Note that 4-tuples values listed below are applicable
5405 * for layer 4 protocols supported and enabled for RSS in the hardware,
5408 * corresponding to 4-tuples are only valid for TCP traffic.
5414 * IP and TCP or UDP headers. Note: For non-tunneled packets,
5421 * IP address of inner IP header. Note: For non-tunneled packets,
5430 * Note: For non-tunneled packets, this value is not applicable.
5436 * Note: For non-tunneled packets, this value is not applicable.
5488 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
5490 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
5493 * - metadata[11:0] contains the vlan VID value.
5494 * - metadata[12] contains the vlan DE value.
5495 * - metadata[15:13] contains the vlan PRI value.
5496 * - metadata[31:16] contains the vlan TPID value.
5498 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
5503 * - VXLAN = VNI[23:0] -> VXLAN Network ID
5504 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier.
5505 * - NVGRE = TNI[23:0] -> Tenant Network ID
5506 * - GRE = KEY[31:0] -> key field with bit mask. zero if K = 0
5507 * - IPV4 = 0 (not populated)
5508 * - IPV6 = Flow Label[19:0]
5509 * - PPPoE = sessionID[15:0]
5510 * - MPLs = Outer label[19:0]
5511 * - UPAR = Selected[31:0] with bit mask
5513 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
5518 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
5523 * - metadata[8:0] contains the outer_l3_offset.
5524 * - metadata[17:9] contains the inner_l2_offset.
5525 * - metadata[26:18] contains the inner_l3_offset.
5526 * - metadata[31:27] contains the inner_l4_size.
5528 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
5531 * This field indicates the IP type for the inner-most IP header.
5602 * All BDs needed for the packet were not on-chip when
5645 * field is non-zero.
5694 * field is non-zero.
5922 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
5925 * Note that 4-tuples values listed below are applicable
5926 * for layer 4 protocols supported and enabled for RSS in the hardware,
5929 * corresponding to 4-tuples are only valid for TCP traffic.
5935 * IP and TCP or UDP headers. Note: For non-tunneled packets,
5942 * IP address of inner IP header. Note: For non-tunneled packets,
5951 * Note: For non-tunneled packets, this value is not applicable.
5957 * Note: For non-tunneled packets, this value is not applicable.
6008 * When this bit is '0', the cs_ok field has the following definition:-
6010 * in the delivered packet, counted from the outer-most header group to
6011 * the inner-most header group, stopping at the first error. -
6013 * in the delivered packet, counted from the outer-most header group to
6014 * the inner-most header group, stopping at the first error. When this
6015 * bit is '1', the cs_ok field has the following definition: -
6017 * chip and passed in the delivered packet. - ip_cs_all_ok[3] =This bit
6019 * valid. - l4_cs_all_ok[4] = This bit will be '1' if all the parsed
6025 #define RX_PKT_V2_CMPL_HI_FLAGS2_META_FORMAT_SFT 4
6027 #define RX_PKT_V2_CMPL_HI_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
6030 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
6032 * and action record pointer. - metadata2[25:0] contains the
6033 * action record pointer. - metadata2[31:26] contains the table
6036 #define RX_PKT_V2_CMPL_HI_FLAGS2_META_FORMAT_ACT_REC_PTR (UINT32_C(0x1) << 4)
6040 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
6043 * - VXLAN = VNI[23:0] -> VXLAN Network ID
6044 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
6045 * - NVGRE = TNI[23:0] -> Tenant Network ID
6046 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
6047 * - IPv4 = 0 (not populated)
6048 * - IPv6 = Flow Label[19:0]
6049 * - PPPoE = sessionID[15:0]
6050 * - MPLs = Outer label[19:0]
6051 * - UPAR = Selected[31:0] with bit mask
6053 #define RX_PKT_V2_CMPL_HI_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
6057 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
6061 #define RX_PKT_V2_CMPL_HI_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
6065 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
6068 * - metadata2[8:0] contains the outer_l3_offset.
6069 * - metadata2[17:9] contains the inner_l2_offset.
6070 * - metadata2[26:18] contains the inner_l3_offset.
6071 * - metadata2[31:27] contains the inner_l4_size.
6073 #define RX_PKT_V2_CMPL_HI_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
6076 * This field indicates the IP type for the inner-most IP header.
6105 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
6106 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
6108 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
6109 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
6110 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
6139 * (if fixed-size buffers are used), or that the packet could
6141 * for the VNIC (if variable-size buffers are used)
6145 * Not On Chip: All BDs needed for the packet were not on-chip
6164 * portion of the packet when this field is non-zero.
6167 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_SFT 4
6172 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 4)
6177 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L3_BAD_VERSION (UINT32_C(0x1) << 4)
6182 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L3_BAD_HDR_LEN (UINT32_C(0x2) << 4)
6188 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_IP_TOTAL_ERROR (UINT32_C(0x3) << 4)
6194 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_UDP_TOTAL_ERROR (UINT32_C(0x4) << 4)
6200 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L3_BAD_TTL (UINT32_C(0x5) << 4)
6205 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_IP_CS_ERROR (UINT32_C(0x6) << 4)
6210 #define RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L4_CS_ERROR (UINT32_C(0x7) << 4)
6219 * of the packet when this field is non-zero.
6269 * field is non-zero.
6475 * The 4b sub-nanosecond portion of the timestamp is in
6511 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
6514 * Note that 4-tuples values listed below are applicable
6515 * for layer 4 protocols supported and enabled for RSS in the
6518 * tuple_extract_op corresponding to 4-tuples are only valid for
6538 * Note: For non-tunneled packets, this value is not applicable.
6544 * Note: For non-tunneled packets, this value is not applicable.
6560 * Note: For non-tunneled packets, this value is not applicable.
6566 * Note: For non-tunneled packets, this value is not applicable.
6616 * field), this field contains the 4b sub-nanosecond portion of the
6685 #define RX_PKT_V3_CMPL_HI_FLAGS2_META_FORMAT_SFT 4
6687 #define RX_PKT_V3_CMPL_HI_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
6690 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
6692 * and action record pointer. - metadata2[25:0] contains the
6693 * action record pointer. - metadata2[31:26] contains the table
6696 #define RX_PKT_V3_CMPL_HI_FLAGS2_META_FORMAT_ACT_REC_PTR (UINT32_C(0x1) << 4)
6700 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
6703 * - VXLAN = VNI[23:0] -> VXLAN Network ID
6704 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
6705 * - NVGRE = TNI[23:0] -> Tenant Network ID
6706 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
6707 * - IPv4 = 0 (not populated)
6708 * - IPv6 = Flow Label[19:0]
6709 * - PPPoE = sessionID[15:0]
6710 * - MPLs = Outer label[19:0]
6711 * - UPAR = Selected[31:0] with bit mask
6713 #define RX_PKT_V3_CMPL_HI_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
6717 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
6721 #define RX_PKT_V3_CMPL_HI_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
6725 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
6728 * - metadata2[8:0] contains the outer_l3_offset.
6729 * - metadata2[17:9] contains the inner_l2_offset.
6730 * - metadata2[26:18] contains the inner_l3_offset.
6731 * - metadata2[31:27] contains the inner_l4_size.
6733 #define RX_PKT_V3_CMPL_HI_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
6736 * This field indicates the IP type for the inner-most IP header.
6769 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
6770 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
6772 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
6773 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
6774 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
6804 * Not On Chip: All BDs needed for the packet were not on-chip
6842 * of the packet when this field is non-zero.
6880 * by the tunnel header length. Valid for GTPv1-U packets.
6888 * field is non-zero.
7005 * This field indicates the IP type for the inner-most IP header.
7070 * The 4b sub-nanosecond portion of the timestamp is in
7100 #define RX_PKT_COMPRESS_CMPL_CS_ERROR_CALC_SFT 4
7187 * field is non-zero.
7241 * of the packet when this field is non-zero.
7354 * GRO/Header-Data Separation:
7405 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
7411 * IP and TCP or UDP headers. Note: For non-tunneled packets,
7415 * IP address of inner IP header. Note: For non-tunneled packets,
7421 * Note: For non-tunneled packets, this value is not applicable.
7424 * Note: For non-tunneled packets, this value is not applicable.
7426 * Note that 4-tuples values listed above are applicable
7427 * for layer 4 protocols supported and enabled for RSS in the hardware,
7430 * corresponding to 4-tuples are only valid for TCP traffic.
7492 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
7494 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
7497 * - metadata[11:0] contains the vlan VID value.
7498 * - metadata[12] contains the vlan DE value.
7499 * - metadata[15:13] contains the vlan PRI value.
7500 * - metadata[31:16] contains the vlan TPID value.
7502 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
7505 * This field indicates the IP type for the inner-most IP header.
7574 * RX L2 TPA Start V2 Completion Record (32 bytes split to 2 16-byte
7626 * Packet will be placed using In-Order Completion/Jumbo where
7642 * GRO/Header-Data Separation:
7652 * IOC/Header-Data Separation:
7653 * Packet will be placed using In-Order Completion/HDS where
7710 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
7716 * IP and TCP or UDP headers. Note: For non-tunneled packets,
7720 * IP address of inner IP header. Note: For non-tunneled packets,
7726 * Note: For non-tunneled packets, this value is not applicable.
7729 * Note: For non-tunneled packets, this value is not applicable.
7731 * Note that 4-tuples values listed above are applicable
7732 * for layer 4 protocols supported and enabled for RSS in the hardware,
7735 * corresponding to 4-tuples are only valid for TCP traffic.
7793 * When this bit is '0', the cs_ok field has the following definition:-
7795 * in the delivered packet, counted from the outer-most header group to
7796 * the inner-most header group, stopping at the first error. -
7798 * in the delivered packet, counted from the outer-most header group to
7799 * the inner-most header group, stopping at the first error. When this
7800 * bit is '1', the cs_ok field has the following definition: -
7802 * chip and passed in the delivered packet. - ip_cs_all_ok[3] =This bit
7804 * valid. - l4_cs_all_ok[4] = This bit will be '1' if all the parsed
7810 #define RX_TPA_START_V2_CMPL_FLAGS2_META_FORMAT_SFT 4
7812 #define RX_TPA_START_V2_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
7815 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
7817 * and action record pointer. - metadata2[25:0] contains the
7818 * action record pointer. - metadata2[31:26] contains the table
7821 #define RX_TPA_START_V2_CMPL_FLAGS2_META_FORMAT_ACT_REC_PTR (UINT32_C(0x1) << 4)
7825 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
7828 * - VXLAN = VNI[23:0] -> VXLAN Network ID
7829 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
7830 * - NVGRE = TNI[23:0] -> Tenant Network ID
7831 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
7832 * - IPv4 = 0 (not populated)
7833 * - IPv6 = Flow Label[19:0]
7834 * - PPPoE = sessionID[15:0]
7835 * - MPLs = Outer label[19:0]
7836 * - UPAR = Selected[31:0] with bit mask
7838 #define RX_TPA_START_V2_CMPL_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
7842 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
7846 #define RX_TPA_START_V2_CMPL_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
7850 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
7853 * - metadata2[8:0] contains the outer_l3_offset.
7854 * - metadata2[17:9] contains the inner_l2_offset.
7855 * - metadata2[26:18] contains the inner_l3_offset.
7856 * - metadata2[31:27] contains the inner_l4_size.
7858 #define RX_TPA_START_V2_CMPL_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
7861 * This field indicates the IP type for the inner-most IP header.
7896 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
7897 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
7899 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
7900 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
7901 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
7928 * per-packet maximum number of physical buffers configured for
7930 * per-aggregation maximum number of physical buffers configured
7974 * RX L2 TPA Start V3 Completion Record (32 bytes split to 2 16-byte
8026 * Packet will be placed using In-Order Completion/Jumbo where
8042 * GRO/Header-Data Separation:
8052 * IOC/Header-Data Separation:
8053 * Packet will be placed using In-Order Completion/HDS where
8107 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
8119 * Note: For non-tunneled packets, this value is not applicable.
8122 * Note: For non-tunneled packets, this value is not applicable.
8123 * * 4: The RSS hash was computed over source IP address of the inner
8128 * IP header. Note: For non-tunneled packets, this value is not
8132 * Note: For non-tunneled packets, this value is not applicable.
8149 * Note that 4-tuples values listed above are applicable
8150 * for layer 4 protocols supported and enabled for RSS in the hardware,
8153 * tuple_extract_op corresponding to 4-tuples are only valid for TCP
8236 #define RX_TPA_START_V3_CMPL_FLAGS2_META_FORMAT_SFT 4
8238 #define RX_TPA_START_V3_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
8241 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
8243 * and action record pointer. - metadata2[25:0] contains the
8244 * action record pointer. - metadata2[31:26] contains the table
8247 #define RX_TPA_START_V3_CMPL_FLAGS2_META_FORMAT_ACT_REC_PTR (UINT32_C(0x1) << 4)
8251 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
8254 * - VXLAN = VNI[23:0] -> VXLAN Network ID
8255 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
8256 * - NVGRE = TNI[23:0] -> Tenant Network ID
8257 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
8258 * - IPv4 = 0 (not populated)
8259 * - IPv6 = Flow Label[19:0]
8260 * - PPPoE = sessionID[15:0]
8261 * - MPLs = Outer label[19:0]
8262 * - UPAR = Selected[31:0] with bit mask
8264 #define RX_TPA_START_V3_CMPL_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
8268 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
8272 #define RX_TPA_START_V3_CMPL_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
8276 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
8279 * - metadata2[8:0] contains the outer_l3_offset.
8280 * - metadata2[17:9] contains the inner_l2_offset.
8281 * - metadata2[26:18] contains the inner_l3_offset.
8282 * - metadata2[31:27] contains the inner_l4_size.
8284 #define RX_TPA_START_V3_CMPL_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
8287 * This field indicates the IP type for the inner-most IP header.
8324 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
8325 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
8327 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
8328 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
8329 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
8356 * per-packet maximum number of physical buffers configured for
8358 * per-aggregation maximum number of physical buffers configured
8451 * Packet will be placed using In-Order Completion/Jumbo where
8467 * GRO/Header-Data Separation:
8477 * IOC/Header-Data Separation:
8478 * Packet will be placed using In-Order Completion/HDS where
8499 * - 2 TCP Packet
8560 * For non-GRO packets, this value is the
8566 * sub-fields.
8567 * - tsdelta[31]
8596 * This value may be used by GRO software to re-construct the original
8711 * GRO/Header-Data Separation:
8770 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
8776 * IP and TCP or UDP headers. Note: For non-tunneled packets,
8780 * IP address of inner IP header. Note: For non-tunneled packets,
8786 * Note: For non-tunneled packets, this value is not applicable.
8789 * Note: For non-tunneled packets, this value is not applicable.
8791 * Note that 4-tuples values listed above are applicable
8792 * for layer 4 protocols supported and enabled for RSS in the hardware,
8795 * corresponding to 4-tuples are only valid for TCP traffic.
8847 #define RX_TPA_V2_START_CMPL_FLAGS2_META_FORMAT_SFT 4
8849 #define RX_TPA_V2_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
8852 * - metadata[11:0] contains the vlan VID value.
8853 * - metadata[12] contains the vlan DE value.
8854 * - metadata[15:13] contains the vlan PRI value.
8855 * - metadata[31:16] contains the vlan TPID value.
8857 #define RX_TPA_V2_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
8862 * - VXLAN = VNI[23:0] -> VXLAN Network ID
8863 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier.
8864 * - NVGRE = TNI[23:0] -> Tenant Network ID
8865 * - GRE = KEY[31:0] -> key field with bit mask. Zero if K = 0
8866 * - IPV4 = 0 (not populated)
8867 * - IPV6 = Flow Label[19:0]
8868 * - PPPoE = sessionID[15:0]
8869 * - MPLs = Outer label[19:0]
8870 * - UPAR = Selected[31:0] with bit mask
8872 #define RX_TPA_V2_START_CMPL_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
8877 #define RX_TPA_V2_START_CMPL_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
8882 * - metadata[8:0] contains the outer_l3_offset.
8883 * - metadata[17:9] contains the inner_l2_offset.
8884 * - metadata[26:18] contains the inner_l3_offset.
8885 * - metadata[31:27] contains the inner_l4_size.
8887 #define RX_TPA_V2_START_CMPL_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
8890 * This field indicates the IP type for the inner-most IP header.
9065 * GRO/Header-Data Separation:
9075 * IOC/Header-Data Separation:
9076 * Packet will be placed using In-Order Completion/HDS where
9097 * - 2 TCP Packet
9132 * For non-GRO packets, this value is the
9138 * sub-fields.
9139 * - tsdelta[31]
9187 * This value may be used by GRO software to re-construct the original
9537 * 0x0 - 0xFFF8 - Used for function ids
9538 * 0xFFF8 - 0xFFFE - Reserved for internal processors
9539 * 0xFFFF - HWRM
9576 * 0x0 - 0xFFF8 - Used for function ids
9577 * 0xFFF8 - 0xFFFE - Reserved for internal processors
9578 * 0xFFFF - HWRM
9655 /* PF-VF communication channel status change. */
9788 * Used to notify the host that the firmware has DMA-ed additional
9817 /* 8-lsb timestamp from POR (100-msec resolution) */
9819 /* 16-lsb timestamp from POR (100-msec resolution) */
9914 /* 8-lsb timestamp from POR (100-msec resolution) */
9916 /* 16-lsb timestamp from POR (100-msec resolution) */
9938 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_ID_SFT 4
9977 /* 8-lsb timestamp from POR (100-msec resolution) */
9979 /* 16-lsb timestamp from POR (100-msec resolution) */
10021 /* 8-lsb timestamp from POR (100-msec resolution) */
10023 /* 16-lsb timestamp from POR (100-msec resolution) */
10102 /* 8-lsb timestamp from POR (100-msec resolution) */
10104 /* 16-lsb timestamp from POR (100-msec resolution) */
10158 /* 8-lsb timestamp from POR (100-msec resolution) */
10160 /* 16-lsb timestamp from POR (100-msec resolution) */
10218 /* 8-lsb timestamp from POR (100-msec resolution) */
10220 /* 16-lsb timestamp from POR (100-msec resolution) */
10262 /* 8-lsb timestamp from POR (100-msec resolution) */
10264 /* 16-lsb timestamp from POR (100-msec resolution) */
10320 /* 8-lsb timestamp from POR (100-msec resolution) */
10322 /* 16-lsb timestamp from POR (100-msec resolution) */
10395 * 8-lsb timestamp (100-msec resolution)
10401 * 16-lsb timestamp (100-msec resolution)
10433 /* A non-fatal firmware exception has occurred. */
10444 * Minimum time before driver should attempt access - units 100ms
10446 * Range 0-65535
10490 /* 8-lsb timestamp (100-msec resolution) */
10492 /* 16-lsb timestamp (100-msec resolution) */
10556 /* 8-lsb timestamp from POR (100-msec resolution) */
10558 /* 16-lsb timestamp from POR (100-msec resolution) */
10600 /* 8-lsb timestamp from POR (100-msec resolution) */
10602 /* 16-lsb timestamp from POR (100-msec resolution) */
10644 /* 8-lsb timestamp from POR (100-msec resolution) */
10646 /* 16-lsb timestamp from POR (100-msec resolution) */
10688 /* 8-lsb timestamp from POR (100-msec resolution) */
10690 /* 16-lsb timestamp from POR (100-msec resolution) */
10732 /* 8-lsb timestamp from POR (100-msec resolution) */
10734 /* 16-lsb timestamp from POR (100-msec resolution) */
10779 /* 8-lsb timestamp from POR (100-msec resolution) */
10781 /* 16-lsb timestamp from POR (100-msec resolution) */
10826 /* 8-lsb timestamp from POR (100-msec resolution) */
10828 /* 16-lsb timestamp from POR (100-msec resolution) */
10873 /* 8-lsb timestamp from POR (100-msec resolution) */
10875 /* 16-lsb timestamp from POR (100-msec resolution) */
10902 /* PF-VF communication channel status change. */
10917 /* 8-lsb timestamp from POR (100-msec resolution) */
10919 /* 16-lsb timestamp from POR (100-msec resolution) */
10924 * If this bit is set to 1, then it indicates that the PF-VF
10926 * If this bit set to 0, then it indicates that the PF-VF
10975 /* 8-lsb timestamp from POR (100-msec resolution) */
10977 /* 16-lsb timestamp from POR (100-msec resolution) */
11061 /* 8-lsb timestamp from POR (100-msec resolution) */
11063 /* 16-lsb timestamp from POR (100-msec resolution) */
11125 /* 8-lsb timestamp from POR (100-msec resolution) */
11127 /* 16-lsb timestamp from POR (100-msec resolution) */
11186 /* 8-lsb timestamp from POR (100-msec resolution) */
11188 /* 16-lsb timestamp from POR (100-msec resolution) */
11243 /* 8-lsb timestamp from POR (100-msec resolution) */
11245 /* 16-lsb timestamp from POR (100-msec resolution) */
11287 /* 8-lsb timestamp from POR (100-msec resolution) */
11289 /* 16-lsb timestamp from POR (100-msec resolution) */
11331 /* 8-lsb timestamp from POR (100-msec resolution) */
11333 /* 16-lsb timestamp from POR (100-msec resolution) */
11385 /* 8-lsb timestamp from POR (100-msec resolution) */
11387 /* 16-lsb timestamp from POR (100-msec resolution) */
11451 /* 8-lsb timestamp from POR (100-msec resolution) */
11453 /* 16-lsb timestamp from POR (100-msec resolution) */
11527 /* Flag 1 indicating partial non-idle state. */
11529 /* Flag 2 indicating partial non-idle state. */
11531 /* Flag 3 indicating partial non-idle state. */
11543 /* 8-lsb timestamp from POR (100-msec resolution) */
11545 /* 16-lsb timestamp from POR (100-msec resolution) */
11583 * 'event_data1' field, if non-zero, contains the estimated
11598 /* 8-lsb timestamp from POR (100-msec resolution) */
11600 /* 16-lsb timestamp from POR (100-msec resolution) */
11639 /* 8-lsb timestamp from POR (100-msec resolution) */
11641 /* 16-lsb timestamp from POR (100-msec resolution) */
11651 /* 1 means PFC WD for COS0 is on, 0 - off. */
11653 /* 1 means PFC WD for COS1 is on, 0 - off. */
11655 /* 1 means PFC WD for COS2 is on, 0 - off. */
11657 /* 1 means PFC WD for COS3 is on, 0 - off. */
11659 /* 1 means PFC WD for COS4 is on, 0 - off. */
11661 /* 1 means PFC WD for COS5 is on, 0 - off. */
11663 /* 1 means PFC WD for COS6 is on, 0 - off. */
11665 /* 1 means PFC WD for COS7 is on, 0 - off. */
11708 /* 8-lsb timestamp from POR (100-msec resolution) */
11710 /* 16-lsb timestamp from POR (100-msec resolution) */
11759 /* 8-lsb timestamp (100-msec resolution) */
11761 /* 16-lsb timestamp (100-msec resolution) */
11795 #define HWRM_ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_PHC_TIME_MSB_SFT 4
11846 #define HWRM_ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT 4
11857 /* 8-lsb timestamp (100-msec resolution) */
11859 /* 16-lsb timestamp (100-msec resolution) */
11905 /* 8-lsb timestamp (100-msec resolution) */
11907 /* 16-lsb timestamp (100-msec resolution) */
11957 /* 8-lsb timestamp (100-msec resolution) */
11959 /* 16-lsb timestamp (100-msec resolution) */
12002 /* 8-lsb timestamp (100-msec resolution) */
12004 /* 16-lsb timestamp (100-msec resolution) */
12048 /* 8-lsb timestamp (100-msec resolution) */
12050 /* 16-lsb timestamp (100-msec resolution) */
12095 /* 8-lsb timestamp (100-msec resolution) */
12097 /* 16-lsb timestamp (100-msec resolution) */
12181 /* 8-lsb timestamp (100-msec resolution) */
12183 /* 16-lsb timestamp (100-msec resolution) */
12236 /* 8-lsb timestamp (100-msec resolution) */
12238 /* 16-lsb timestamp (100-msec resolution) */
12266 * Used to notify the host that the firmware has DMA-ed additional
12278 * has DMA-ed 8192 bytes to the host buffer, then this field has a
12280 * writes the last page of the host buffer
12294 /* 8-lsb timestamp from POR (100-msec resolution) */
12296 /* 16-lsb timestamp from POR (100-msec resolution) */
12381 /* Trace byte 4 to 5 */
12433 /* Non-fatal Error */
12448 /* 8-lsb timestamp from POR (100-msec resolution) */
12450 /* 16-lsb timestamp from POR (100-msec resolution) */
12495 /* 8-lsb timestamp (100-msec resolution) */
12497 /* 16-lsb timestamp (100-msec resolution) */
12514 * should be fixed to be a proper 1 PPS signal before re-enabling
12593 /* 8-lsb timestamp (100-msec resolution) */
12595 /* 16-lsb timestamp (100-msec resolution) */
12650 /* 8-lsb timestamp (100-msec resolution) */
12652 /* 16-lsb timestamp (100-msec resolution) */
12662 * should be fixed to be a proper 1 PPS signal before re-enabling
12710 /* 8-lsb timestamp (100-msec resolution) */
12712 /* 16-lsb timestamp (100-msec resolution) */
12780 /* 8-lsb timestamp (100-msec resolution) */
12782 /* 16-lsb timestamp (100-msec resolution) */
12850 /* 8-lsb timestamp (100-msec resolution) */
12852 /* 16-lsb timestamp (100-msec resolution) */
12934 /* 8-lsb timestamp (100-msec resolution) */
12936 /* 16-lsb timestamp (100-msec resolution) */
12955 /* This field classifies the data present in the meta-data. */
12961 * This setting is used when packets are coming in-order. Depending on
12962 * the state of the receive context, the meta-data will carry
12996 /* This field classifies the data present in the meta-data. */
13000 * This setting is used when packets are coming in-order. Depending
13001 * on the state of the receive context, the meta-data will carry
13028 * meta-data.
13034 * meta-data.
13111 * This value indicates the lower 7-bit of the Crypto Key ID
13118 * This value indicates the upper 13-bit of the Crypto Key ID
13130 /* This field classifies the data present in the meta-data. */
13134 * This setting is used when packets are coming in-order. Depending on
13135 * the state of the receive context, the meta-data will carry
13157 * meta-data.
13163 * meta-data.
13240 * This value indicates the lower 7-bit of the Crypto Key ID
13247 * This value indicates the upper 13-bit of the Crypto Key ID
13272 * on when packets belonging to have arrived out-of-order and HW could
13283 /* This field classifies the data present in the meta-data. */
13309 * meta-data.
13315 * meta-data.
13369 * This value indicates the lower 7-bit of the Crypto Key ID
13376 * This value indicates the upper 13-bit of the Crypto Key ID
13399 /* tx_doorbell (size:32b/4B) */
13423 /* rx_doorbell (size:32b/4B) */
13447 /* cmpl_doorbell (size:32b/4B) */
13484 /* status_doorbell (size:32b/4B) */
13535 * that is begin requested. This value is 4 for push
13599 /* indicates 512 <= packet length < 1KB */
13601 /* indicates 1KB <= packet length < 2KB */
13603 /* indicates packet length >= 2KB */
13687 * ICMP for example (non-TCP/UDP), even if the tcp_udp_chksum is set,
13723 * The flag is ignored if the LSO packet is a normal (non-tunneled)
13743 * packet as 16-bit words.
13768 * This value is action meta-data that defines CFA edit operations
13810 * - meta[17:16] - TPID select value (0 = 0x8100).
13811 * - meta[15:12] - PRI/DE value.
13812 * - meta[11:0] - VID value.
13819 * can continue at offset 4 of the doorbell for up to 4 additional
13848 * * 0x0-0xFFF8 - The function ID
13849 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
13850 * * 0xFFFD - Reserved for user-space HWRM interface
13851 * * 0xFFFF - HWRM
13949 * * 0x0-0xFFF8 - The function ID
13950 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
13951 * * 0xFFFD - Reserved for user-space HWRM interface
13952 * * 0xFFFF - HWRM
14028 * * 0x0-0xFFF8 - The function ID
14029 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
14030 * * 0xFFFD - Reserved for user-space HWRM interface
14031 * * 0xFFFF - HWRM
14103 * * 0x0-0xFFF8 - The function ID
14104 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
14105 * * 0xFFFD - Reserved for user-space HWRM interface
14106 * * 0xFFFF - HWRM
14129 * 0xFFFF - Cleanup all children of this PF.
14179 * * 0x0-0xFFF8 - The function ID
14180 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
14181 * * 0xFFFD - Reserved for user-space HWRM interface
14182 * * 0xFFFF - HWRM
14310 * 00-00-00-00-00-00 indicates no MAC address configuration
14416 /* The number of MSI-X vectors requested for the VF. */
14470 * * 0x0-0xFFF8 - The function ID
14471 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
14472 * * 0xFFFD - Reserved for user-space HWRM interface
14473 * * 0xFFFF - HWRM
14522 * If 1, then the global MSI-X auto-masking is enabled for the
14720 * function. A value of 00-00-00-00-00-00 indicates no
14756 * is valid only on the PF with SR-IOV enabled.
14758 * SR-IOV disabled or on a VF.
14764 * PF with SR-IOV enabled. 0xFF... (All Fs) if this
14765 * command is called on a PF with SR-IOV disabled or
14829 * The maximum number of MSI-X vectors that may be allocated across
14830 * all VFs for the function. This is valid only on the PF with SR-IOV
14832 * SR-IOV disabled or on a VF.
14872 * uses ping-pong buffers from the push pages.
15094 * two-completion TX packet timestamp feature, a second completion
15098 * TX timestamp read when two-completion timestamp feature is
15118 * Steering Tags are system-specific values that must follow the
15270 * A value of 00-00-00-00-00-00-00-00 indicates no device serial number
15284 * (SR-IOV) enabled. Returns zero if this command is called on a PF
15285 * with VF RoCE (SR-IOV) disabled or on a VF.
15291 * (SR-IOV) enabled. Returns zero if this command is called on a PF
15292 * with VF RoCE (SR-IOV) disabled or on a VF.
15298 * PF with VF RoCE (SR-IOV) enabled. Returns zero if this command is
15299 * called on a PF with VF RoCE (SR-IOV) disabled or on a VF.
15305 * (SR-IOV) enabled. Returns zero if this command is called on a PF
15306 * with VF RoCE (SR-IOV) disabled or on a VF.
15312 * VF RoCE (SR-IOV) enabled. Returns zero if this command is called on
15313 * a PF with VF RoCE (SR-IOV) disabled or on a VF.
15318 * the function. This is valid only on the PF with VF RoCE (SR-IOV)
15320 * (SR-IOV) disabled or on a VF.
15358 * * 0x0-0xFFF8 - The function ID
15359 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
15360 * * 0xFFFD - Reserved for user-space HWRM interface
15361 * * 0xFFFF - HWRM
15415 * If 1, then magic packet based Out-Of-Box WoL is enabled on
15420 * If 1, then bitmap pattern based Out-Of-Box WoL packet is enabled
15450 * If set to 1, then multi-host mode is active for this function.
15453 * If set to 0, then multi-host mode is inactive for this function
15508 * If set to 1, then multi-root mode is active for this function.
15511 * If set to 0, then multi-root mode is inactive for this function
15530 * function. A value of 00-00-00-00-00-00 indicates no
15538 * Bus Number (8b):Device Number (4b):Function Number(4b).
15539 * If multi-host mode is active, the 4 lsb will indicate
15573 * If the reported mtu value is non-zero then it will be used for the
15577 * if it is non-zero.
15645 /* Value is in Kb or KB (base 10). */
15677 /* Value is in Kb or KB (base 10). */
15721 * Admin link state is in auto mode - follows the physical link
15728 #define HWRM_FUNC_QCFG_OUTPUT_OPTIONS_RSVD_SFT 4
15731 * This is valid only on the PF with SR-IOV enabled.
15733 * SR-IOV disabled or on a VF.
15775 * of the BAR size to the native CPU page size should be performed
15784 * - a single root system would return 0x1
15785 * - a 2x8 system (where EPs 0 and 2 are active) would return 0x5
15786 * - a 4x4 system (where EPs 0-3 are active) would return 0xF
15797 * poll the adapter ready state to re-initiate the registration process
15803 * should use this value to find out the doorbell page offset from the
15846 * Configured doorbell page size for this function.
15850 /* DB page size is 4KB. */
15852 /* DB page size is 8KB. */
15854 /* DB page size is 16KB. */
15856 /* DB page size is 32KB. */
15858 /* DB page size is 64KB. */
15860 /* DB page size is 128KB. */
15862 /* DB page size is 256KB. */
15864 /* DB page size is 512KB. */
15866 /* DB page size is 1MB. */
15868 /* DB page size is 2MB. */
15870 /* DB page size is 4MB. */
15939 * If the reported mtu value is non-zero then it will be used for the
16076 * * 0x0-0xFFF8 - The function ID
16077 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
16078 * * 0xFFFD - Reserved for user-space HWRM interface
16079 * * 0xFFFF - HWRM
16107 * This is an anti-spoofing check. If this flag is set,
16116 * This is an anti-spoofing check. If this flag is set,
16538 uint32_t dflt_ip_addr[4];
16560 /* Value is in Kb or KB (base 10). */
16592 /* Value is in Kb or KB (base 10). */
16616 /* VLAN Anti-spoofing mode. */
16618 /* No VLAN anti-spoofing checks are enabled */
16686 * Admin state is in auto mode - is to follow the physical link
16693 #define HWRM_FUNC_CFG_INPUT_OPTIONS_RSVD_SFT 4
16934 * page size. L2 driver can use different pages to ring the doorbell
16935 * for L2 push operation. The doorbell page size should be configured
16936 * to match the native CPU page size for proper RoCE and L2 doorbell
16938 * the doorbell page size by the RoCE driver using the command queue
16939 * method. The default is 4K.
16942 /* DB page size is 4KB. */
16944 /* DB page size is 8KB. */
16946 /* DB page size is 16KB. */
16948 /* DB page size is 32KB. */
16950 /* DB page size is 64KB. */
16952 /* DB page size is 128KB. */
16954 /* DB page size is 256KB. */
16956 /* DB page size is 512KB. */
16958 /* DB page size is 1MB. */
16960 /* DB page size is 2MB. */
16962 /* DB page size is 4MB. */
17071 * * 0x0-0xFFF8 - The function ID
17072 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17073 * * 0xFFFD - Reserved for user-space HWRM interface
17074 * * 0xFFFF - HWRM
17164 * # There were no BDs available on-chip for the packet.
17232 * * 0x0-0xFFF8 - The function ID
17233 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17234 * * 0xFFFD - Reserved for user-space HWRM interface
17235 * * 0xFFFF - HWRM
17277 * values are 0 through (max_configurable_queues - 1), where
17281 uint8_t unused_1[4];
17373 * * 0x0-0xFFF8 - The function ID
17374 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17375 * * 0xFFFD - Reserved for user-space HWRM interface
17376 * * 0xFFFF - HWRM
17440 * * 0x0-0xFFF8 - The function ID
17441 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17442 * * 0xFFFD - Reserved for user-space HWRM interface
17443 * * 0xFFFF - HWRM
17506 * * 0x0-0xFFF8 - The function ID
17507 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17508 * * 0xFFFD - Reserved for user-space HWRM interface
17509 * * 0xFFFF - HWRM
17615 * support of handling the NPAR 1.2 feature where the s-tag may be
17630 * flow-create commands that programs ingress lookup flows for this
17681 /* Microsoft Windows 8 64-bit OS. */
17696 * This is a 32-bit timestamp provided by the driver for
17701 uint8_t unused_1[4];
17703 * This is a 256-bit bit mask provided by the PF driver for
17716 * This is a 256-bit bit mask provided by the function driver
17792 * * 0x0-0xFFF8 - The function ID
17793 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17794 * * 0xFFFD - Reserved for user-space HWRM interface
17795 * * 0xFFFF - HWRM
17811 uint8_t unused_0[4];
17859 * * 0x0-0xFFF8 - The function ID
17860 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17861 * * 0xFFFD - Reserved for user-space HWRM interface
17862 * * 0xFFFF - HWRM
17894 * This field represents the page size used for request
17900 /* 4 Kbytes */
17908 /* 4 Mbytes */
17918 /* This field represents the page address of page #0. */
17920 /* This field represents the page address of page #1. */
17922 /* This field represents the page address of page #2. */
17924 /* This field represents the page address of page #3. */
17926 /* This field represents the page address of page #4. */
17928 /* This field represents the page address of page #5. */
17930 /* This field represents the page address of page #6. */
17932 /* This field represents the page address of page #7. */
17934 /* This field represents the page address of page #8. */
17936 /* This field represents the page address of page #9. */
17995 * * 0x0-0xFFF8 - The function ID
17996 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
17997 * * 0xFFFD - Reserved for user-space HWRM interface
17998 * * 0xFFFF - HWRM
18067 * * 0x0-0xFFF8 - The function ID
18068 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
18069 * * 0xFFFD - Reserved for user-space HWRM interface
18070 * * 0xFFFF - HWRM
18133 /* Microsoft Windows 8 64-bit OS. */
18189 * * 0x0-0xFFF8 - The function ID
18190 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
18191 * * 0xFFFD - Reserved for user-space HWRM interface
18192 * * 0xFFFF - HWRM
18227 /* Maximum guaranteed number of MSI-X vectors supported by function. */
18249 /* Maximum non-guaranteed number of RSS/COS contexts */
18253 /* Maximum non-guaranteed number of completion rings */
18257 /* Maximum non-guaranteed number of transmit rings */
18261 /* Maximum non-guaranteed number of receive rings */
18265 /* Maximum non-guaranteed number of L2 contexts */
18269 /* Maximum non-guaranteed number of VNICs */
18273 /* Maximum non-guaranteed number of statistic contexts */
18277 /* Maximum non-guaranteed number of ring groups */
18292 /* Minimum guaranteed number of MSI-X vectors supported by function */
18296 /* Maximum non-guaranteed number of KTLS Tx Key Contexts */
18300 /* Maximum non-guaranteed number of KTLS Rx Key Contexts */
18304 /* Maximum non-guaranteed number of QUIC Tx Key Contexts */
18308 /* Maximum non-guaranteed number of QUIC Rx Key Contexts */
18344 * * 0x0-0xFFF8 - The function ID
18345 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
18346 * * 0xFFFD - Reserved for user-space HWRM interface
18347 * * 0xFFFF - HWRM
18359 /* Maximum guaranteed number of MSI-X vectors for the function */
18363 /* Maximum non-guaranteed number of RSS/COS contexts */
18367 /* Maximum non-guaranteed number of completion rings */
18371 /* Maximum non-guaranteed number of transmit rings */
18375 /* Maximum non-guaranteed number of receive rings */
18379 /* Maximum non-guaranteed number of L2 contexts */
18383 /* Maximum non-guaranteed number of VNICs */
18387 /* Maximum non-guaranteed number of statistic contexts */
18391 /* Maximum non-guaranteed number of ring groups */
18400 /* Minimum guaranteed number of MSI-X vectors for the function */
18404 /* Maximum non-guaranteed number of KTLS Tx Key Contexts */
18408 /* Maximum non-guaranteed number of KTLS Rx Key Contexts */
18412 /* Maximum non-guaranteed number of QUIC Tx Key Contexts */
18416 /* Maximum non-guaranteed number of QUIC Rx Key Contexts */
18489 * * 0x0-0xFFF8 - The function ID
18490 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
18491 * * 0xFFFD - Reserved for user-space HWRM interface
18492 * * 0xFFFF - HWRM
18525 * mid-path.
18606 * When this field is non-zero, the 32b `mrav_num_entries` field in
18762 /* TQM ring page size and level. */
18777 /* TQM ring page size. */
18779 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_SFT 4
18780 /* 4KB. */
18781 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
18782 /* 8KB. */
18783 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
18784 /* 64KB. */
18785 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
18787 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
18789 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
18791 #define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
18796 /* TQM ring page directory. */
18823 * * 0x0-0xFFF8 - The function ID
18824 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
18825 * * 0xFFFD - Reserved for user-space HWRM interface
18826 * * 0xFFFF - HWRM
18838 * When set, the firmware only uses on-chip resources and does not
18960 /* QPC page size and level. */
18975 /* QPC page size. */
18977 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_SFT 4
18978 /* 4KB. */
18979 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
18980 /* 8KB. */
18981 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
18982 /* 64KB. */
18983 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
18985 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
18987 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
18989 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
18991 /* SRQ page size and level. */
19006 /* SRQ page size. */
19008 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_SFT 4
19009 /* 4KB. */
19010 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19011 /* 8KB. */
19012 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19013 /* 64KB. */
19014 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19016 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19018 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19020 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19022 /* CQ page size and level. */
19037 /* CQ page size. */
19039 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_SFT 4
19040 /* 4KB. */
19041 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19042 /* 8KB. */
19043 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19044 /* 64KB. */
19045 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19047 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19049 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19051 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_CQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19053 /* VNIC page size and level. */
19068 /* VNIC page size. */
19070 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_SFT 4
19071 /* 4KB. */
19072 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19073 /* 8KB. */
19074 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19075 /* 64KB. */
19076 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19078 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19080 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19082 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_VNIC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19084 /* Stat page size and level. */
19099 /* Stat page size. */
19101 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_SFT 4
19102 /* 4KB. */
19103 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19104 /* 8KB. */
19105 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19106 /* 64KB. */
19107 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19109 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19111 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19113 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_STAT_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19115 /* TQM slow path page size and level. */
19130 /* TQM slow path page size. */
19132 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_SFT 4
19133 /* 4KB. */
19134 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19135 /* 8KB. */
19136 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19137 /* 64KB. */
19138 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19140 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19142 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19144 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_SP_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19146 /* TQM ring 0 page size and level. */
19161 /* TQM ring 0 page size. */
19163 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_SFT 4
19164 /* 4KB. */
19165 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19166 /* 8KB. */
19167 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19168 /* 64KB. */
19169 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19171 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19173 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19175 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING0_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19177 /* TQM ring 1 page size and level. */
19192 /* TQM ring 1 page size. */
19194 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_SFT 4
19195 /* 4KB. */
19196 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19197 /* 8KB. */
19198 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19199 /* 64KB. */
19200 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19202 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19204 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19206 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING1_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19208 /* TQM ring 2 page size and level. */
19223 /* TQM ring 2 page size. */
19225 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_SFT 4
19226 /* 4KB. */
19227 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19228 /* 8KB. */
19229 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19230 /* 64KB. */
19231 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19233 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19235 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19237 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING2_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19239 /* TQM ring 3 page size and level. */
19254 /* TQM ring 3 page size. */
19256 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_SFT 4
19257 /* 4KB. */
19258 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19259 /* 8KB. */
19260 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19261 /* 64KB. */
19262 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19264 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19266 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19268 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING3_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19270 /* TQM ring 4 page size and level. */
19272 /* TQM ring 4 PBL indirect levels. */
19285 /* TQM ring 4 page size. */
19287 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_SFT 4
19288 /* 4KB. */
19289 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19290 /* 8KB. */
19291 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19292 /* 64KB. */
19293 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19295 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19297 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19299 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING4_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19301 /* TQM ring 5 page size and level. */
19316 /* TQM ring 5 page size. */
19318 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_SFT 4
19319 /* 4KB. */
19320 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19321 /* 8KB. */
19322 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19323 /* 64KB. */
19324 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19326 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19328 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19330 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING5_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19332 /* TQM ring 6 page size and level. */
19347 /* TQM ring 6 page size. */
19349 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_SFT 4
19350 /* 4KB. */
19351 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19352 /* 8KB. */
19353 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19354 /* 64KB. */
19355 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19357 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19359 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19361 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING6_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19363 /* TQM ring 7 page size and level. */
19378 /* TQM ring 7 page size. */
19380 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_SFT 4
19381 /* 4KB. */
19382 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19383 /* 8KB. */
19384 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19385 /* 64KB. */
19386 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19388 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19390 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19392 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TQM_RING7_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19394 /* MR/AV page size and level. */
19409 /* MR/AV page size. */
19411 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_SFT 4
19412 /* 4KB. */
19413 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19414 /* 8KB. */
19415 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19416 /* 64KB. */
19417 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19419 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19421 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19423 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_MRAV_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19425 /* Timer page size and level. */
19440 /* Timer page size. */
19442 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_SFT 4
19443 /* 4KB. */
19444 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19445 /* 8KB. */
19446 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19447 /* 64KB. */
19448 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19450 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19452 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19454 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TIM_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19456 /* QP page directory. */
19458 /* SRQ page directory. */
19460 /* CQ page directory. */
19462 /* VNIC page directory. */
19464 /* Stat page directory. */
19466 /* TQM slowpath page directory. */
19468 /* TQM ring 0 page directory. */
19470 /* TQM ring 1 page directory. */
19472 /* TQM ring 2 page directory. */
19474 /* TQM ring 3 page directory. */
19476 /* TQM ring 4 page directory. */
19478 /* TQM ring 5 page directory. */
19480 /* TQM ring 6 page directory. */
19482 /* TQM ring 7 page directory. */
19484 /* MR/AV page directory. */
19486 /* Timer page directory. */
19569 * Number of TQM ring 4 entries.
19665 /* TQM ring page size and level. */
19680 /* TQM ring page size. */
19682 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_SFT 4
19683 /* 4KB. */
19684 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19685 /* 8KB. */
19686 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19687 /* 64KB. */
19688 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19690 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19692 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19694 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING8_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19699 /* TQM ring page directory. */
19701 /* TQM ring page size and level. */
19716 /* TQM ring page size. */
19718 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_SFT 4
19719 /* 4KB. */
19720 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19721 /* 8KB. */
19722 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19723 /* 64KB. */
19724 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19726 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19728 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19730 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING9_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19735 /* TQM ring page directory. */
19737 /* TQM ring page size and level. */
19752 /* TQM ring page size. */
19754 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_SFT 4
19755 /* 4KB. */
19756 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19757 /* 8KB. */
19758 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19759 /* 64KB. */
19760 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19762 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19764 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19766 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RING10_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19771 /* TQM ring page directory. */
19777 /* Tx KTLS context page directory. */
19779 /* Rx KTLS context page directory. */
19785 /* Tx KTLS context page size and level. */
19800 /* Tx KTLS context page size. */
19802 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_SFT 4
19803 /* 4KB. */
19804 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19805 /* 8KB. */
19806 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19807 /* 64KB. */
19808 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19810 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19812 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19814 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_TKC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19816 /* Rx KTLS context page size and level. */
19831 /* Rx KTLS context page size. */
19833 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_SFT 4
19834 /* 4KB. */
19835 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
19836 /* 8KB. */
19837 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
19838 /* 64KB. */
19839 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
19841 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
19843 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
19845 #define HWRM_FUNC_BACKING_STORE_CFG_INPUT_RKC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
19899 * * 0x0-0xFFF8 - The function ID
19900 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
19901 * * 0xFFFD - Reserved for user-space HWRM interface
19902 * * 0xFFFF - HWRM
19927 * When set, the firmware only uses on-chip resources and does not
20049 /* QPC page size and level. */
20064 /* QPC page size. */
20066 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_SFT 4
20067 /* 4KB. */
20068 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20069 /* 8KB. */
20070 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20071 /* 64KB. */
20072 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20074 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20076 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20078 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_QPC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20080 /* SRQ page size and level. */
20095 /* SRQ page size. */
20097 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_SFT 4
20098 /* 4KB. */
20099 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20100 /* 8KB. */
20101 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20102 /* 64KB. */
20103 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20105 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20107 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20109 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_SRQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20111 /* CQ page size and level. */
20126 /* CQ page size. */
20128 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_SFT 4
20129 /* 4KB. */
20130 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20131 /* 8KB. */
20132 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20133 /* 64KB. */
20134 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20136 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20138 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20140 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_CQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20142 /* VNIC page size and level. */
20157 /* VNIC page size. */
20159 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_SFT 4
20160 /* 4KB. */
20161 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20162 /* 8KB. */
20163 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20164 /* 64KB. */
20165 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20167 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20169 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20171 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_VNIC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20173 /* Stat page size and level. */
20188 /* Stat page size. */
20190 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_SFT 4
20191 /* 4KB. */
20192 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20193 /* 8KB. */
20194 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20195 /* 64KB. */
20196 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20198 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20200 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20202 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_STAT_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20204 /* TQM slow path page size and level. */
20219 /* TQM slow path page size. */
20221 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_SFT 4
20222 /* 4KB. */
20223 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20224 /* 8KB. */
20225 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20226 /* 64KB. */
20227 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20229 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20231 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20233 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_SP_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20235 /* TQM ring 0 page size and level. */
20250 /* TQM ring 0 page size. */
20252 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_SFT 4
20253 /* 4KB. */
20254 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20255 /* 8KB. */
20256 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20257 /* 64KB. */
20258 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20260 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20262 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20264 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING0_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20266 /* TQM ring 1 page size and level. */
20281 /* TQM ring 1 page size. */
20283 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_SFT 4
20284 /* 4KB. */
20285 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20286 /* 8KB. */
20287 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20288 /* 64KB. */
20289 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20291 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20293 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20295 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING1_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20297 /* TQM ring 2 page size and level. */
20312 /* TQM ring 2 page size. */
20314 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_SFT 4
20315 /* 4KB. */
20316 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20317 /* 8KB. */
20318 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20319 /* 64KB. */
20320 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20322 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20324 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20326 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING2_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20328 /* TQM ring 3 page size and level. */
20343 /* TQM ring 3 page size. */
20345 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_SFT 4
20346 /* 4KB. */
20347 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20348 /* 8KB. */
20349 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20350 /* 64KB. */
20351 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20353 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20355 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20357 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING3_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20359 /* TQM ring 4 page size and level. */
20361 /* TQM ring 4 PBL indirect levels. */
20374 /* TQM ring 4 page size. */
20376 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_SFT 4
20377 /* 4KB. */
20378 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20379 /* 8KB. */
20380 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20381 /* 64KB. */
20382 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20384 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20386 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20388 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING4_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20390 /* TQM ring 5 page size and level. */
20405 /* TQM ring 5 page size. */
20407 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_SFT 4
20408 /* 4KB. */
20409 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20410 /* 8KB. */
20411 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20412 /* 64KB. */
20413 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20415 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20417 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20419 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING5_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20421 /* TQM ring 6 page size and level. */
20436 /* TQM ring 6 page size. */
20438 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_SFT 4
20439 /* 4KB. */
20440 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20441 /* 8KB. */
20442 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20443 /* 64KB. */
20444 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20446 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20448 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20450 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING6_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20452 /* TQM ring 7 page size and level. */
20467 /* TQM ring 7 page size. */
20469 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_SFT 4
20470 /* 4KB. */
20471 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20472 /* 8KB. */
20473 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20474 /* 64KB. */
20475 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20477 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20479 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20481 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TQM_RING7_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20483 /* MR/AV page size and level. */
20498 /* MR/AV page size. */
20500 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_SFT 4
20501 /* 4KB. */
20502 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20503 /* 8KB. */
20504 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20505 /* 64KB. */
20506 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20508 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20510 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20512 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_MRAV_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20514 /* Timer page size and level. */
20529 /* Timer page size. */
20531 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_SFT 4
20532 /* 4KB. */
20533 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20534 /* 8KB. */
20535 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20536 /* 64KB. */
20537 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20539 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20541 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20543 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TIM_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20545 /* QP page directory. */
20547 /* SRQ page directory. */
20549 /* CQ page directory. */
20551 /* VNIC page directory. */
20553 /* Stat page directory. */
20555 /* TQM slowpath page directory. */
20557 /* TQM ring 0 page directory. */
20559 /* TQM ring 1 page directory. */
20561 /* TQM ring 2 page directory. */
20563 /* TQM ring 3 page directory. */
20565 /* TQM ring 4 page directory. */
20567 /* TQM ring 5 page directory. */
20569 /* TQM ring 6 page directory. */
20571 /* TQM ring 7 page directory. */
20573 /* MR/AV page directory. */
20575 /* Timer page directory. */
20607 /* Number of TQM ring 4 entries. */
20632 /* TQM ring page size and level. */
20647 /* TQM ring page size. */
20649 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_SFT 4
20650 /* 4KB. */
20651 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20652 /* 8KB. */
20653 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20654 /* 64KB. */
20655 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20657 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20659 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20661 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING8_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20666 /* TQM ring page directory. */
20668 /* TQM ring page size and level. */
20683 /* TQM ring page size. */
20685 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_SFT 4
20686 /* 4KB. */
20687 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20688 /* 8KB. */
20689 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20690 /* 64KB. */
20691 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20693 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20695 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20697 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING9_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20702 /* TQM ring page directory. */
20704 /* TQM ring page size and level. */
20719 /* TQM ring page size. */
20721 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_SFT 4
20722 /* 4KB. */
20723 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20724 /* 8KB. */
20725 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20726 /* 64KB. */
20727 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20729 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20731 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20733 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RING10_TQM_RING_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20738 /* TQM ring page directory. */
20744 /* Tx KTLS context page directory. */
20746 /* Rx KTLS context page directory. */
20748 /* Tx KTLS context page size and level. */
20763 /* Tx KTLS context page size. */
20765 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_SFT 4
20766 /* 4KB. */
20767 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20768 /* 8KB. */
20769 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20770 /* 64KB. */
20771 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20773 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20775 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20777 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_TKC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20779 /* Rx KTLS context page size and level. */
20794 /* Rx KTLS context page size. */
20796 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_SFT 4
20797 /* 4KB. */
20798 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
20799 /* 8KB. */
20800 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
20801 /* 64KB. */
20802 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
20804 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
20806 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
20808 #define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_RKC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
20850 * * 0x0-0xFFF8 - The function ID
20851 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
20852 * * 0xFFFD - Reserved for user-space HWRM interface
20853 * * 0xFFFF - HWRM
20931 * A value of 0xFFFF-FFFF indicates this register does not exist.
20970 * A value of 0xFFFF-FFFF indicates this register does not exist.
21008 * A value of 0xFFFF-FFFF indicates this register does not exist.
21046 * A value of 0xFFFF-FFFF indicates this register does not exist.
21096 * A value of 0xFFFF-FFFF indicates this register does not exist.
21137 * If this value is non-zero, drivers have to wait for
21145 * A value of 0xFFFF-FFFF indicates this register does not exist.
21214 * * 0x0-0xFFF8 - The function ID
21215 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
21216 * * 0xFFFD - Reserved for user-space HWRM interface
21217 * * 0xFFFF - HWRM
21276 * * 0x0-0xFFF8 - The function ID
21277 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
21278 * * 0xFFFD - Reserved for user-space HWRM interface
21279 * * 0xFFFF - HWRM
21305 * Up to 4 pins can be returned in the response.
21424 * * 0x0-0xFFF8 - The function ID
21425 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
21426 * * 0xFFFD - Reserved for user-space HWRM interface
21427 * * 0xFFFF - HWRM
21566 uint8_t unused_0[4];
21614 * * 0x0-0xFFF8 - The function ID
21615 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
21616 * * 0xFFFD - Reserved for user-space HWRM interface
21617 * * 0xFFFF - HWRM
21707 /* 4Khz sync in frequency. */
21798 * * 0x0-0xFFF8 - The function ID
21799 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
21800 * * 0xFFFD - Reserved for user-space HWRM interface
21801 * * 0xFFFF - HWRM
21816 uint8_t unused_0[4];
21840 * two timestamps provide the cross-trigger timestamps.
21841 * Driver can directly use these values for cross-trigger.
21885 * * 0x0-0xFFF8 - The function ID
21886 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
21887 * * 0xFFFD - Reserved for user-space HWRM interface
21888 * * 0xFFFF - HWRM
21933 * the last non-master function to make a call to condition PHC as
21965 * 0 - Failover timer is automatically selected based on the last
21972 * 0xFFFFFFFF - If driver specifies this value, then failover never
21975 * X - If driver specifies any other value, this is admin indicated
21981 uint8_t unused_1[4];
22029 * * 0x0-0xFFF8 - The function ID
22030 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
22031 * * 0xFFFD - Reserved for user-space HWRM interface
22032 * * 0xFFFF - HWRM
22067 * Firmware returns the last non-master/non-secondary function to
22072 * Firmware returns the second last non-master/non-secondary function
22126 * * 0x0-0xFFF8 - The function ID
22127 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
22128 * * 0xFFFD - Reserved for user-space HWRM interface
22129 * * 0xFFFF - HWRM
22188 uint8_t unused_1[4];
22211 * num_key_ctxs_allocated - 1'. In XID partition mode,
22255 * * 0x0-0xFFF8 - The function ID
22256 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
22257 * * 0xFFFD - Reserved for user-space HWRM interface
22258 * * 0xFFFF - HWRM
22343 * * 0x0-0xFFF8 - The function ID
22344 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
22345 * * 0xFFFD - Reserved for user-space HWRM interface
22346 * * 0xFFFF - HWRM
22368 /* Slow-path TQM ring. */
22370 /* Fast-path TQM ring. */
22380 /* Mid-path TQM ring. */
22412 * Instance of the backing store type. It is zero-based,
22417 * TCE (0), RCE (1), TE_CFA(2), RE_CFA (3), PRIMATE(4)
22429 * When set, the firmware only uses on-chip resources and
22458 /* Page directory. */
22464 /* Page size and pbl level. */
22479 /* Page size. */
22481 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_SFT 4
22482 /* 4KB. */
22483 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_PG_4K (UINT32_C(0x0) << 4)
22484 /* 8KB. */
22485 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_PG_8K (UINT32_C(0x1) << 4)
22486 /* 64KB. */
22487 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_PG_64K (UINT32_C(0x2) << 4)
22489 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_PG_2M (UINT32_C(0x3) << 4)
22491 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_PG_8M (UINT32_C(0x4) << 4)
22493 #define HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_PAGE_SIZE_PG_1G (UINT32_C(0x5) << 4)
22499 * | ----- | -------------------------------------------------- |
22504 * | 4 | All four split entries have valid data. |
22509 * must be cast to a type-specific data structure first before
22513 * | ---- | -------------------------------------------------- |
22577 * * 0x0-0xFFF8 - The function ID
22578 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
22579 * * 0xFFFD - Reserved for user-space HWRM interface
22580 * * 0xFFFF - HWRM
22602 /* Slow-path TQM ring. */
22604 /* Fast-path TQM ring. */
22614 /* Mid-path TQM ring. */
22626 /* VF XID partition in-use table. */
22646 * Instance of the backing store type. It is zero-based,
22651 * TCE (0), RCE (1), TE_CFA(2), RE_CFA (3), PRIMATE(4)
22660 uint8_t rsvd[4];
22686 /* Slow-path TQM ring. */
22688 /* Fast-path TQM ring. */
22698 /* Mid-path TQM ring. */
22722 * Instance of the backing store type. It is zero-based,
22727 * TCE (0), RCE (1), TE_CFA(2), RE_CFA (3), PRIMATE(4)
22738 /* Page directory. */
22742 /* Page size and pbl level. */
22757 /* Page size. */
22759 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_SFT 4
22760 /* 4KB. */
22761 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_PG_4K (UINT32_C(0x0) << 4)
22762 /* 8KB. */
22763 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_PG_8K (UINT32_C(0x1) << 4)
22764 /* 64KB. */
22765 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_PG_64K (UINT32_C(0x2) << 4)
22767 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_PG_2M (UINT32_C(0x3) << 4)
22769 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_PG_8M (UINT32_C(0x4) << 4)
22771 #define HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_PAGE_SIZE_PG_1G (UINT32_C(0x5) << 4)
22777 * | ----- | -------------------------------------------------- |
22782 * | 4 | All four split entries have valid data. |
22788 * must be cast to a type-specific data structure first before
22792 * | ---- | -------------------------------------------------- |
22930 * * 0x0-0xFFF8 - The function ID
22931 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
22932 * * 0xFFFD - Reserved for user-space HWRM interface
22933 * * 0xFFFF - HWRM
22955 /* Slow-path TQM ring. */
22957 /* Fast-path TQM ring. */
22967 /* Mid-path TQM ring. */
23024 /* Slow-path TQM ring. */
23026 /* Fast-path TQM ring. */
23036 /* Mid-path TQM ring. */
23087 * - For 2-port adapters, the ability to extend the RoCE QP
23091 * - The count of RoCE QP entries, derived from 'max_num_entries'
23092 * (max_num_entries - qp_num_qp1_entries - qp_num_l2_entries -
23094 * always zero when QPs are pseudo-statically allocated), includes
23106 * TCE (0), RCE (1), TE_CFA(2), RE_CFA (3), PRIMATE(4)
23110 * 3. If the backing store type is VF XID partition in-use table, use
23151 * | ----- | -------------------------------------------------- |
23156 * | 4 | All four split entries have valid data. |
23189 #define HWRM_FUNC_BACKING_STORE_QCAPS_V2_OUTPUT_EXACT_CNT_BIT_MAP_UNUSED_SFT 4
23192 * must be cast to a type-specific data structure first before
23196 * | ---- | -------------------------------------------------- |
23246 * * 0x0-0xFFF8 - The function ID
23247 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23248 * * 0xFFFD - Reserved for user-space HWRM interface
23249 * * 0xFFFF - HWRM
23290 uint8_t unused_1[4];
23339 * * 0x0-0xFFF8 - The function ID
23340 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23341 * * 0xFFFD - Reserved for user-space HWRM interface
23342 * * 0xFFFF - HWRM
23374 * 0xFFFF-FFFF indicates this register does not exist.
23437 * address. A value of 0xFFFF-FFFF indicates this register does not
23526 * * 0x0-0xFFF8 - The function ID
23527 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23528 * * 0xFFFD - Reserved for user-space HWRM interface
23529 * * 0xFFFF - HWRM
23587 * * 0x0-0xFFF8 - The function ID
23588 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23589 * * 0xFFFD - Reserved for user-space HWRM interface
23590 * * 0xFFFF - HWRM
23681 * * 0x0-0xFFF8 - The function ID
23682 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23683 * * 0xFFFD - Reserved for user-space HWRM interface
23684 * * 0xFFFF - HWRM
23703 uint8_t unused_0[4];
23752 * * 0x0-0xFFF8 - The function ID
23753 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23754 * * 0xFFFD - Reserved for user-space HWRM interface
23755 * * 0xFFFF - HWRM
23808 uint8_t unused_0[4];
23856 * * 0x0-0xFFF8 - The function ID
23857 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23858 * * 0xFFFD - Reserved for user-space HWRM interface
23859 * * 0xFFFF - HWRM
23938 * * 0x0-0xFFF8 - The function ID
23939 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
23940 * * 0xFFFD - Reserved for user-space HWRM interface
23941 * * 0xFFFF - HWRM
23970 * from 0 to n - 1 on a device with n ports. The number of front panel
23976 * If the LAG mode is active-backup, only one port can be an active
23984 * In active-active, balance_xor or 802_3_ad mode, all member ports
23999 /* rsvd3 is 4 b */
24001 #define HWRM_FUNC_LAG_CREATE_INPUT_ACTIVE_PORT_MAP_RSVD3_SFT 4
24005 * from 0 to n - 1 on a device with n ports. The number of front panel
24008 * each must not be a member of another LAG. Note that on a 4-port
24009 * device, there can be either 2 ports or 4 ports in the member ports.
24021 /* rsvd4 is 4 b */
24023 #define HWRM_FUNC_LAG_CREATE_INPUT_MEMBER_PORT_MAP_RSVD4_SFT 4
24035 uint8_t unused_0[4];
24088 * * 0x0-0xFFF8 - The function ID
24089 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24090 * * 0xFFFD - Reserved for user-space HWRM interface
24091 * * 0xFFFF - HWRM
24122 * from 0 to n - 1 on a device with n ports. The number of front panel
24128 * If the LAG mode is active-backup, only one port can be an active
24136 * In active-active, balance_xor or 802_3_ad mode, all member ports
24151 /* rsvd3 is 4 b */
24153 #define HWRM_FUNC_LAG_UPDATE_INPUT_ACTIVE_PORT_MAP_RSVD3_SFT 4
24157 * from 0 to n - 1 on a device with n ports. The number of front panel
24160 * each must not be a member of another LAG. Note that on a 4-port
24161 * device, there can be either 2 ports or 4 ports in the member ports.
24173 /* rsvd4 is 4 b */
24175 #define HWRM_FUNC_LAG_UPDATE_INPUT_MEMBER_PORT_MAP_RSVD4_SFT 4
24235 * * 0x0-0xFFF8 - The function ID
24236 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24237 * * 0xFFFD - Reserved for user-space HWRM interface
24238 * * 0xFFFF - HWRM
24298 * * 0x0-0xFFF8 - The function ID
24299 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24300 * * 0xFFFD - Reserved for user-space HWRM interface
24301 * * 0xFFFF - HWRM
24330 * from 0 to n - 1 on a device with n ports. The number of front panel
24336 * If the LAG mode is active-backup, only one port can be an active
24344 * In active-active, balance_xor or 802_3_ad mode, all member ports
24359 /* rsvd3 is 4 b */
24361 #define HWRM_FUNC_LAG_QCFG_OUTPUT_ACTIVE_PORT_MAP_RSVD3_SFT 4
24365 * from 0 to n - 1 on a device with n ports. The number of front panel
24368 * each must not be a member of another LAG. Note that on a 4-port
24369 * device, there can be either 2 ports or 4 ports in the member ports.
24381 /* rsvd4 is 4 b */
24383 #define HWRM_FUNC_LAG_QCFG_OUTPUT_MEMBER_PORT_MAP_RSVD4_SFT 4
24395 uint8_t unused_0[4];
24429 * * 0x0-0xFFF8 - The function ID
24430 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24431 * * 0xFFFD - Reserved for user-space HWRM interface
24432 * * 0xFFFF - HWRM
24486 * In the active-backup mode, only one member port is active port at
24490 * In the active-active, balance_xor or 802_3_ad mode, all member ports
24492 * needs to send the NIC a new active-port bitmap with marking this
24506 /* rsvd3 is 4 b */
24508 #define HWRM_FUNC_LAG_MODE_CFG_INPUT_ACTIVE_PORT_MAP_RSVD3_SFT 4
24517 * For a 4-port NIC, the LAG member port combination can consist of
24535 /* rsvd4 is 4 b */
24537 #define HWRM_FUNC_LAG_MODE_CFG_INPUT_MEMBER_PORT_MAP_RSVD4_SFT 4
24601 * * 0x0-0xFFF8 - The function ID
24602 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24603 * * 0xFFFD - Reserved for user-space HWRM interface
24604 * * 0xFFFF - HWRM
24644 * In the active-backup mode, only one member port is active port at
24648 * In the active-active, balance_xor or 802_3_ad mode, all member ports
24650 * needs to send the NIC a new active-port bitmap with marking this
24664 /* rsvd2 is 4 b */
24666 #define HWRM_FUNC_LAG_MODE_QCFG_OUTPUT_ACTIVE_PORT_MAP_RSVD2_SFT 4
24675 * For a 4-port NIC, the LAG member port combination can consist of
24693 /* rsvd3 is 4 b */
24695 #define HWRM_FUNC_LAG_MODE_QCFG_OUTPUT_MEMBER_PORT_MAP_RSVD3_SFT 4
24741 * * 0x0-0xFFF8 - The function ID
24742 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24743 * * 0xFFFD - Reserved for user-space HWRM interface
24744 * * 0xFFFF - HWRM
24776 /* S-TAG VLAN identifier configured for the function. */
24778 /* S-TAG PCP value configured for the function. */
24782 * S-TAG TPID value configured for the function. This field is
24786 /* C-TAG VLAN identifier configured for the function. */
24788 /* C-TAG PCP value configured for the function. */
24792 * C-TAG TPID value configured for the function. This field is
24834 * * 0x0-0xFFF8 - The function ID
24835 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24836 * * 0xFFFD - Reserved for user-space HWRM interface
24837 * * 0xFFFF - HWRM
24886 /* S-TAG VLAN identifier configured for the function. */
24888 /* S-TAG PCP value configured for the function. */
24892 * S-TAG TPID value configured for the function. This field is
24896 /* C-TAG VLAN identifier configured for the function. */
24898 /* C-TAG PCP value configured for the function. */
24902 * C-TAG TPID value configured for the function. This field is
24910 uint8_t unused_3[4];
24958 * * 0x0-0xFFF8 - The function ID
24959 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
24960 * * 0xFFFD - Reserved for user-space HWRM interface
24961 * * 0xFFFF - HWRM
24997 * Each VNIC ID is written as a 32-bit number.
25034 * * 0x0-0xFFF8 - The function ID
25035 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25036 * * 0xFFFD - Reserved for user-space HWRM interface
25037 * * 0xFFFF - HWRM
25053 /* These 16-bit fields contain the VF fid and the rate scale percentage. */
25144 * * 0x0-0xFFF8 - The function ID
25145 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25146 * * 0xFFFD - Reserved for user-space HWRM interface
25147 * * 0xFFFF - HWRM
25164 /* These 16-bit fields contain the VF fid */
25189 /* These 16-bit fields contain the VF fid and the rate scale percentage. */
25267 * * 0x0-0xFFF8 - The function ID
25268 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25269 * * 0xFFFD - Reserved for user-space HWRM interface
25270 * * 0xFFFF - HWRM
25319 * reset. The driver should do complete re-initialization when that
25328 * driver to completely re-initialize all resources for the function
25366 * * 0x0-0xFFF8 - The function ID
25367 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25368 * * 0xFFFD - Reserved for user-space HWRM interface
25369 * * 0xFFFF - HWRM
25459 * When this bit is '1', it indicates 4th PF belongs to one of the
25557 * * 0x0-0xFFF8 - The function ID
25558 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25559 * * 0xFFFD - Reserved for user-space HWRM interface
25560 * * 0xFFFF - HWRM
25637 * RSS hashing over innermost 4 tuples {l3.src, l3.dest,
25638 * l4.src, l4.dest} for tunnel packets. For none-tunnel
25646 * tunnel packets. For none-tunnel packets, the RSS hash is
25652 * RSS hashing over outermost 4 tuples {t_l3.src, t_l3.dest,
25653 * t_l4.src, t_l4.dest} for tunnel packets. For none-tunnel
25661 * tunnel packets. For none-tunnel packets, the RSS hash is
25754 * * 0x0-0xFFF8 - The function ID
25755 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25756 * * 0xFFFD - Reserved for user-space HWRM interface
25757 * * 0xFFFF - HWRM
25844 * RSS hashing over innermost 4 tuples {l3.src, l3.dest,
25845 * l4.src, l4.dest} for tunnel packets. For none-tunnel
25853 * tunnel packets. For none-tunnel packets, the RSS hash is
25859 * RSS hashing over outermost 4 tuples {t_l3.src, t_l3.dest,
25860 * t_l4.src, t_l4.dest} for tunnel packets. For none-tunnel
25868 * tunnel packets. For none-tunnel packets, the RSS hash is
25914 * * 0x0-0xFFF8 - The function ID
25915 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
25916 * * 0xFFFD - Reserved for user-space HWRM interface
25917 * * 0xFFFF - HWRM
25966 * When this bit is set to '1', the auto-negotiation process
26080 * There may be conditions (e.g. out-of-band or sideband
26404 /* 100Mb link speed (Half-duplex) */
26406 /* 100Mb link speed (Full-duplex) */
26408 /* 1Gb link speed (Half-duplex) */
26410 /* 1Gb link speed (Full-duplex) */
26428 /* 10Mb link speed (Half-duplex) */
26430 /* 10Mb link speed (Full-duplex) */
26479 * This value controls the pre-emphasis to be used for the
26482 * Normally HWRM FW will determine proper pre-emphasis.
26497 /* 100Mb link speed (Full-duplex) */
26501 /* 1Gb link speed (Full-duplex) */
26547 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
26551 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
26553 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
26555 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
26557 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
26559 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
26561 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
26563 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
26565 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
26567 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
26582 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
26586 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
26588 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
26590 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
26592 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
26594 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
26596 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
26598 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
26600 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
26602 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
26681 * * 0x0-0xFFF8 - The function ID
26682 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
26683 * * 0xFFFD - Reserved for user-space HWRM interface
26684 * * 0xFFFF - HWRM
26728 /* PAM4-56 signaling */
26730 /* PAM4-112 signaling */
26735 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_SFT 4
26737 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_NONE_ACTIVE (UINT32_C(0x0) << 4)
26739 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE (UINT32_C(0x1) << 4)
26741 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE (UINT32_C(0x2) << 4)
26743 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE (UINT32_C(0x3) << 4)
26745 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE (UINT32_C(0x4) << 4)
26747 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE (UINT32_C(0x5) << 4)
26749 #define HWRM_PORT_PHY_QCFG_OUTPUT_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE (UINT32_C(0x6) << 4)
26818 /* 100Mb link speed (Half-duplex) */
26820 /* 100Mb link speed (Full-duplex) */
26822 /* 1Gb link speed (Half-duplex) */
26824 /* 1Gb link speed (Full-duplex) */
26842 /* 10Mb link speed (Half-duplex) */
26844 /* 10Mb link speed (Full-duplex) */
26964 /* 100Mb link speed (Half-duplex) */
26966 /* 100Mb link speed (Full-duplex) */
26968 /* 1Gb link speed (Half-duplex) */
26970 /* 1Gb link speed (Full-duplex) */
26988 /* 10Mb link speed (Half-duplex) */
26990 /* 10Mb link speed (Full-duplex) */
27070 /* BASE-CR */
27072 /* BASE-KR4 (Deprecated) */
27074 /* BASE-LR */
27076 /* BASE-SR */
27078 /* BASE-KR2 (Deprecated) */
27080 /* BASE-KX */
27082 /* BASE-KR */
27084 /* BASE-T */
27086 /* EEE capable BASE-T */
27278 /* 100Mb link speed (Half-duplex) */
27280 /* 100Mb link speed (Full-duplex) */
27282 /* 1Gb link speed (Half-duplex) */
27284 /* 1Gb link speed (Full-duplex) */
27302 /* 10Mb link speed (Half-duplex) */
27304 /* 10Mb link speed (Full-duplex) */
27354 /* 100Mb link speed (Full-duplex) */
27358 /* 1Gb link speed (Full-duplex) */
27374 /* 100Mb link speed (Full-duplex) */
27378 /* 1Gb link speed (Full-duplex) */
27407 /* QSFP-DD */
27411 /* SFP-DD CMIS */
27632 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
27636 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
27638 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
27640 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
27642 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
27644 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
27646 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
27648 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
27650 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
27652 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
27667 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
27671 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
27673 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
27675 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
27677 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
27679 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
27681 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
27683 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
27685 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
27687 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
27705 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
27709 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
27711 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
27713 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
27715 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
27717 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
27719 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
27721 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
27723 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
27725 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
27766 * * 0x0-0xFFF8 - The function ID
27767 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
27768 * * 0xFFFD - Reserved for user-space HWRM interface
27769 * * 0xFFFF - HWRM
27851 * When this bit is '1', the Out-Of-Box WoL is requested to
27856 * When this bit is '1', the Out-Of-Box WoL is requested to
27975 * tunneled packets or packet headers of non-tunneled packets.
27981 * For example, a value of 0-3 is returned where 0 is being
27997 * For example, a value of 0-3 is returned where 0 is being
28004 * IP header of non-tunneled packets.
28010 * For example, a value of 0-3 is returned where 0 is being
28015 * This is a 16-bit bit mask that is used to request a
28027 * This is a 16-bit bit mask that is used to request a
28046 * non-tunneled packets.
28227 * * 0x0-0xFFF8 - The function ID
28228 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
28229 * * 0xFFFD - Reserved for user-space HWRM interface
28230 * * 0xFFFF - HWRM
28297 * For example, a value of 0-3 is returned where 0 is being
28326 * When this bit is '1', the Out-Of-Box WoL is enabled on this
28340 * For example, a value of 0-3 is returned where 0 is being
28354 * For example, a value of 0-3 is returned where 0 is being
28363 * This is a 16-bit bit mask that represents the
28379 * This is a 16-bit bit mask that represents the
28402 * non-tunneled packets.
28431 * does not apply to non-tunneled packets.
28488 uint8_t unused_2[4];
28522 * * 0x0-0xFFF8 - The function ID
28523 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
28524 * * 0xFFFD - Reserved for user-space HWRM interface
28525 * * 0xFFFF - HWRM
28562 * When this bit is set to '1', the device supports one-step
28651 /* Total Number of 65-127 Bytes frames transmitted */
28653 /* Total Number of 128-255 Bytes frames transmitted */
28655 /* Total Number of 256-511 Bytes frames transmitted */
28657 /* Total Number of 512-1023 Bytes frames transmitted */
28659 /* Total Number of 1024-1518 Bytes frames transmitted */
28667 /* Total Number of 1519-2047 Bytes frames transmitted */
28669 /* Total Number of 2048-4095 Bytes frames transmitted */
28671 /* Total Number of 4096-9216 Bytes frames transmitted */
28673 /* Total Number of 9217-16383 Bytes frames transmitted */
28688 * Total number of PFC/per-priority PAUSE
28698 /* Total number of over-sized frames transmitted */
28746 * Pri 4 transmitted
28779 /* Total number of end-to-end HOL frames */
28793 /* Total Number of 65-127 Bytes frames received */
28795 /* Total Number of 128-255 Bytes frames received */
28797 /* Total Number of 256-511 Bytes frames received */
28799 /* Total Number of 512-1023 Bytes frames received */
28801 /* Total Number of 1024-1518 Bytes frames received */
28809 /* Total Number of 1519-2047 Bytes frames received */
28811 /* Total Number of 2048-4095 Bytes frames received */
28813 /* Total Number of 4096-9216 Bytes frames received */
28815 /* Total Number of 9217-16383 Bytes frames received */
28847 /* Total number of received frames with out-of-range length */
28862 /* Total number of over-sized frames received */
28905 * XON to XOFF on Pri 4
28945 * bit for Pri 4
28965 /* Total Number of under-sized frames received */
29026 * * 0x0-0xFFF8 - The function ID
29027 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
29028 * * 0xFFFD - Reserved for user-space HWRM interface
29029 * * 0xFFFF - HWRM
29099 /* Total number of tx bytes count on cos queue 4 */
29115 /* Total number of tx packets count on cos queue 4 */
29123 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 0 */
29125 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 0 */
29127 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 1 */
29129 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 1 */
29131 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 2 */
29133 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 2 */
29135 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 3 */
29137 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 3 */
29139 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 4 */
29141 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 4 */
29143 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 5 */
29145 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 5 */
29147 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 6 */
29149 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 6 */
29151 /* time duration between transmitting a XON -> XOFF and a subsequent XOFF -> XON for priority 7 */
29153 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 7 */
29179 /* Total number of rx bytes count on cos queue 4 */
29195 /* Total number of rx packets count on cos queue 4 */
29203 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 0 */
29205 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 0 */
29207 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 1 */
29209 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 1 */
29211 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 2 */
29213 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 2 */
29215 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 3 */
29217 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 3 */
29219 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 4 */
29221 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 4 */
29223 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 5 */
29225 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 5 */
29227 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 6 */
29229 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 6 */
29231 /* time duration receiving a XON -> XOFF and a subsequent XOFF -> XON for priority 7 */
29233 /* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 7 */
29254 /* Total number of rx discard bytes count on cos queue 4 */
29270 /* Total number of rx discard packets count on cos queue 4 */
29295 * once for each 10-bit symbol corrected by FEC block.
29306 * StormDetect event - when percentage of XOFF frames received
29308 * StormRevert event - when percentage of XON frames received
29341 * for Pri 4
29381 * for Pri 4
29421 * for pri 4
29461 * for pri 4
29501 * for pri 4
29541 * for pri 4
29581 * for pri 4
29621 * for pri 4
29661 * for pri 4
29701 * for pri 4
29744 * * 0x0-0xFFF8 - The function ID
29745 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
29746 * * 0xFFFD - Reserved for user-space HWRM interface
29747 * * 0xFFFF - HWRM
29845 * * 0x0-0xFFF8 - The function ID
29846 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
29847 * * 0xFFFD - Reserved for user-space HWRM interface
29848 * * 0xFFFF - HWRM
29865 uint8_t unused_0[4];
29923 * * 0x0-0xFFF8 - The function ID
29924 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
29925 * * 0xFFFD - Reserved for user-space HWRM interface
29926 * * 0xFFFF - HWRM
30038 * * 0x0-0xFFF8 - The function ID
30039 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30040 * * 0xFFFD - Reserved for user-space HWRM interface
30041 * * 0xFFFF - HWRM
30053 * multi-host mode.
30094 uint8_t unused_0[4];
30134 * Number of packets marked in CoS queue 4.
30182 * * 0x0-0xFFF8 - The function ID
30183 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30184 * * 0xFFFD - Reserved for user-space HWRM interface
30185 * * 0xFFFF - HWRM
30257 * * 0x0-0xFFF8 - The function ID
30258 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30259 * * 0xFFFD - Reserved for user-space HWRM interface
30260 * * 0xFFFF - HWRM
30320 * * 0x0-0xFFF8 - The function ID
30321 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30322 * * 0xFFFD - Reserved for user-space HWRM interface
30323 * * 0xFFFF - HWRM
30446 * * 0x0-0xFFF8 - The function ID
30447 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30448 * * 0xFFFD - Reserved for user-space HWRM interface
30449 * * 0xFFFF - HWRM
30536 /* 2-port device */
30538 /* 3-port device */
30540 /* 4-port device */
30542 /* 12-port device */
30552 /* 100Mb link speed (Half-duplex) */
30554 /* 100Mb link speed (Full-duplex) */
30556 /* 1Gb link speed (Half-duplex) */
30558 /* 1Gb link speed (Full-duplex) */
30576 /* 10Mb link speed (Half-duplex) */
30578 /* 10Mb link speed (Full-duplex) */
30587 /* 100Mb link speed (Half-duplex) */
30589 /* 100Mb link speed (Full-duplex) */
30591 /* 1Gb link speed (Half-duplex) */
30593 /* 1Gb link speed (Full-duplex) */
30611 /* 10Mb link speed (Half-duplex) */
30613 /* 10Mb link speed (Full-duplex) */
30625 /* 100Mb link speed (Full-duplex) */
30629 /* 1Gb link speed (Full-duplex) */
30690 * priority-based flow control is not supported.
30732 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
30736 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
30738 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
30740 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
30742 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
30744 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
30746 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
30748 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
30750 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
30752 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
30768 /* 40Gb (NRZ: 10G per lane, 4 lanes) link speed */
30772 /* 100Gb (NRZ: 25G per lane, 4 lanes) link speed */
30774 /* 50Gb (PAM4-56: 50G per lane, 1 lane) link speed */
30776 /* 100Gb (PAM4-56: 50G per lane, 2 lanes) link speed */
30778 /* 200Gb (PAM4-56: 50G per lane, 4 lanes) link speed */
30780 /* 400Gb (PAM4-56: 50G per lane, 8 lanes) link speed */
30782 /* 100Gb (PAM4-112: 100G per lane, 1 lane) link speed */
30784 /* 200Gb (PAM4-112: 100G per lane, 2 lanes) link speed */
30786 /* 400Gb (PAM4-112: 100G per lane, 4 lanes) link speed */
30788 /* 800Gb (PAM4-112: 100G per lane, 8 lanes) link speed */
30824 * * 0x0-0xFFF8 - The function ID
30825 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30826 * * 0xFFFD - Reserved for user-space HWRM interface
30827 * * 0xFFFF - HWRM
30851 /* 8-bit I2C slave address. */
30853 /* The bank number of the page that is being accessed over I2C. */
30855 /* The page number that is being accessed over I2C. */
30857 /* Offset within the page that is being accessed over I2C. */
30862 * the data shall be written from the beginning of the page.
30915 * * 0x0-0xFFF8 - The function ID
30916 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
30917 * * 0xFFFD - Reserved for user-space HWRM interface
30918 * * 0xFFFF - HWRM
30942 /* 8-bit I2C slave address. */
30944 /* The bank number of the page that is being accessed over I2C. */
30946 /* The page number that is being accessed over I2C. */
30948 /* Offset within the page that is being accessed over I2C. */
30953 * the data shall be read from the beginning of the page.
31006 * * 0x0-0xFFF8 - The function ID
31007 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
31008 * * 0xFFFD - Reserved for user-space HWRM interface
31009 * * 0xFFFF - HWRM
31025 /* 8-bit device address. */
31027 /* 16-bit register address. */
31029 /* 16-bit register data. */
31085 * * 0x0-0xFFF8 - The function ID
31086 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
31087 * * 0xFFFD - Reserved for user-space HWRM interface
31088 * * 0xFFFF - HWRM
31104 /* 8-bit device address. */
31106 /* 16-bit register address. */
31128 /* 16-bit register data. */
31164 * * 0x0-0xFFF8 - The function ID
31165 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
31166 * * 0xFFFD - Reserved for user-space HWRM interface
31167 * * 0xFFFF - HWRM
31302 * Up to 4 LEDs can be configured with this command.
31351 * For all other non-zero values of this field, LED #0 shall
31402 * For all other non-zero values of this field, LED #1 shall
31453 * For all other non-zero values of this field, LED #2 shall
31504 * For all other non-zero values of this field, LED #3 shall
31558 * * 0x0-0xFFF8 - The function ID
31559 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
31560 * * 0xFFFD - Reserved for user-space HWRM interface
31561 * * 0xFFFF - HWRM
31589 * Up to 4 LEDs can be returned in the response.
31644 * For all other non-zero values of this field, LED #0 is
31701 * For all other non-zero values of this field, LED #1 is
31758 * For all other non-zero values of this field, LED #2 is
31815 * For all other non-zero values of this field, LED #3 is
31854 * * 0x0-0xFFF8 - The function ID
31855 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
31856 * * 0xFFFD - Reserved for user-space HWRM interface
31857 * * 0xFFFF - HWRM
31885 * Up to 4 LEDs can be returned in the response.
31905 * For all other non-zero values of this field, LED #0 is
31967 * For all other non-zero values of this field, LED #0 is
32029 * For all other non-zero values of this field, LED #0 is
32091 * For all other non-zero values of this field, LED #0 is
32172 * * 0x0-0xFFF8 - The function ID
32173 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32174 * * 0xFFFD - Reserved for user-space HWRM interface
32175 * * 0xFFFF - HWRM
32252 /* If set to 1, FEC stat t-code 0-7 registers are enabled. */
32255 * If set to 1, FEC stat t-code 8-15 registers are enabled.
32330 * * 0x0-0xFFF8 - The function ID
32331 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32332 * * 0xFFFD - Reserved for user-space HWRM interface
32333 * * 0xFFFF - HWRM
32471 * legacy behaviour -- it will report a buffer size up to almost
32518 * * 0x0-0xFFF8 - The function ID
32519 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32520 * * 0xFFFD - Reserved for user-space HWRM interface
32521 * * 0xFFFF - HWRM
32576 * On a 1G BASE-T module, if this bit is set,
32647 * * 0x0-0xFFF8 - The function ID
32648 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32649 * * 0xFFFD - Reserved for user-space HWRM interface
32650 * * 0xFFFF - HWRM
32703 * On a 1G BASE-T module, if this bit is set, module PHY
32762 * * 0x0-0xFFF8 - The function ID
32763 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32764 * * 0xFFFD - Reserved for user-space HWRM interface
32765 * * 0xFFFF - HWRM
32782 * 0-0xF are reserved for internal use.
32809 * 0-0xF are reserved for internal use.
32846 * * 0x0-0xFFF8 - The function ID
32847 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32848 * * 0xFFFD - Reserved for user-space HWRM interface
32849 * * 0xFFFF - HWRM
32866 uint8_t unused_0[4];
32917 * * 0x0-0xFFF8 - The function ID
32918 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
32919 * * 0xFFFD - Reserved for user-space HWRM interface
32920 * * 0xFFFF - HWRM
32958 uint8_t unused_1[4];
33006 * * 0x0-0xFFF8 - The function ID
33007 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33008 * * 0xFFFD - Reserved for user-space HWRM interface
33009 * * 0xFFFF - HWRM
33094 * * 0x0-0xFFF8 - The function ID
33095 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33096 * * 0xFFFD - Reserved for user-space HWRM interface
33097 * * 0xFFFF - HWRM
33191 uint8_t unused_1[4];
33272 * * 0x0-0xFFF8 - The function ID
33273 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33274 * * 0xFFFD - Reserved for user-space HWRM interface
33275 * * 0xFFFF - HWRM
33400 * * 0x0-0xFFF8 - The function ID
33401 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33402 * * 0xFFFD - Reserved for user-space HWRM interface
33403 * * 0xFFFF - HWRM
33477 * * 0x0-0xFFF8 - The function ID
33478 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33479 * * 0xFFFD - Reserved for user-space HWRM interface
33480 * * 0xFFFF - HWRM
33558 * * 0x0-0xFFF8 - The function ID
33559 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33560 * * 0xFFFD - Reserved for user-space HWRM interface
33561 * * 0xFFFF - HWRM
33633 * * 0x0-0xFFF8 - The function ID
33634 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
33635 * * 0xFFFD - Reserved for user-space HWRM interface
33636 * * 0xFFFF - HWRM
33772 * FF - Invalid id
33788 /* Lossy (best-effort) */
33803 * FF - Invalid id
33819 /* Lossy (best-effort) */
33834 * FF - Invalid id
33850 /* Lossy (best-effort) */
33865 * FF - Invalid id
33881 /* Lossy (best-effort) */
33895 * ID of CoS Queue 4.
33896 * FF - Invalid id
33912 /* Lossy (best-effort) */
33927 * FF - Invalid id
33943 /* Lossy (best-effort) */
33958 * FF - Invalid id
33974 /* Lossy (best-effort) */
33989 * FF - Invalid id
34005 /* Lossy (best-effort) */
34175 * * 0x0-0xFFF8 - The function ID
34176 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34177 * * 0xFFFD - Reserved for user-space HWRM interface
34178 * * 0xFFFF - HWRM
34222 /* Lossy (best-effort) */
34272 * * 0x0-0xFFF8 - The function ID
34273 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34274 * * 0xFFFD - Reserved for user-space HWRM interface
34275 * * 0xFFFF - HWRM
34297 /* Bi-directional (Symmetrically applicable to TX and RX paths) */
34321 /* Lossy (best-effort) */
34376 * * 0x0-0xFFF8 - The function ID
34377 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34378 * * 0xFFFD - Reserved for user-space HWRM interface
34379 * * 0xFFFF - HWRM
34418 /* If set to 1, then PFC is enabled on PRI 4. */
34476 * * 0x0-0xFFF8 - The function ID
34477 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34478 * * 0xFFFD - Reserved for user-space HWRM interface
34479 * * 0xFFFF - HWRM
34498 /* If set to 1, then PFC is requested to be enabled on PRI 4. */
34576 * * 0x0-0xFFF8 - The function ID
34577 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34578 * * 0xFFFD - Reserved for user-space HWRM interface
34579 * * 0xFFFF - HWRM
34657 * CoS Queue assigned to priority 4. This value can only
34727 * * 0x0-0xFFF8 - The function ID
34728 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34729 * * 0xFFFD - Reserved for user-space HWRM interface
34730 * * 0xFFFF - HWRM
34752 /* Bi-directional (Symmetrically applicable to TX and RX paths) */
34830 * CoS Queue assigned to priority 4. This value can only
34897 * * 0x0-0xFFF8 - The function ID
34898 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
34899 * * 0xFFFD - Reserved for user-space HWRM interface
34900 * * 0xFFFF - HWRM
34955 /* Value is in Kb or KB (base 10). */
34987 /* Value is in Kb or KB (base 10). */
35010 * tsa_assign is 0 - Strict Priority (SP)
35011 * 0..7 - Valid values.
35012 * 8..255 - Reserved.
35043 /* Value is in Kb or KB (base 10). */
35075 /* Value is in Kb or KB (base 10). */
35098 * tsa_assign is 0 - Strict Priority (SP)
35099 * 0..7 - Valid values.
35100 * 8..255 - Reserved.
35131 /* Value is in Kb or KB (base 10). */
35163 /* Value is in Kb or KB (base 10). */
35186 * tsa_assign is 0 - Strict Priority (SP)
35187 * 0..7 - Valid values.
35188 * 8..255 - Reserved.
35219 /* Value is in Kb or KB (base 10). */
35251 /* Value is in Kb or KB (base 10). */
35274 * tsa_assign is 0 - Strict Priority (SP)
35275 * 0..7 - Valid values.
35276 * 8..255 - Reserved.
35284 /* ID of CoS Queue 4. */
35307 /* Value is in Kb or KB (base 10). */
35339 /* Value is in Kb or KB (base 10). */
35362 * tsa_assign is 0 - Strict Priority (SP)
35363 * 0..7 - Valid values.
35364 * 8..255 - Reserved.
35395 /* Value is in Kb or KB (base 10). */
35427 /* Value is in Kb or KB (base 10). */
35450 * tsa_assign is 0 - Strict Priority (SP)
35451 * 0..7 - Valid values.
35452 * 8..255 - Reserved.
35483 /* Value is in Kb or KB (base 10). */
35515 /* Value is in Kb or KB (base 10). */
35538 * tsa_assign is 0 - Strict Priority (SP)
35539 * 0..7 - Valid values.
35540 * 8..255 - Reserved.
35571 /* Value is in Kb or KB (base 10). */
35603 /* Value is in Kb or KB (base 10). */
35626 * tsa_assign is 0 - Strict Priority (SP)
35627 * 0..7 - Valid values.
35628 * 8..255 - Reserved.
35636 uint8_t unused_2[4];
35670 * * 0x0-0xFFF8 - The function ID
35671 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
35672 * * 0xFFFD - Reserved for user-space HWRM interface
35673 * * 0xFFFF - HWRM
35755 /* Value is in Kb or KB (base 10). */
35787 /* Value is in Kb or KB (base 10). */
35810 * tsa_assign is 0 - Strict Priority (SP)
35811 * 0..7 - Valid values.
35812 * 8..255 - Reserved.
35843 /* Value is in Kb or KB (base 10). */
35875 /* Value is in Kb or KB (base 10). */
35898 * tsa_assign is 0 - Strict Priority (SP)
35899 * 0..7 - Valid values.
35900 * 8..255 - Reserved.
35931 /* Value is in Kb or KB (base 10). */
35963 /* Value is in Kb or KB (base 10). */
35986 * tsa_assign is 0 - Strict Priority (SP)
35987 * 0..7 - Valid values.
35988 * 8..255 - Reserved.
36019 /* Value is in Kb or KB (base 10). */
36051 /* Value is in Kb or KB (base 10). */
36074 * tsa_assign is 0 - Strict Priority (SP)
36075 * 0..7 - Valid values.
36076 * 8..255 - Reserved.
36084 /* ID of CoS Queue 4. */
36107 /* Value is in Kb or KB (base 10). */
36139 /* Value is in Kb or KB (base 10). */
36162 * tsa_assign is 0 - Strict Priority (SP)
36163 * 0..7 - Valid values.
36164 * 8..255 - Reserved.
36195 /* Value is in Kb or KB (base 10). */
36227 /* Value is in Kb or KB (base 10). */
36250 * tsa_assign is 0 - Strict Priority (SP)
36251 * 0..7 - Valid values.
36252 * 8..255 - Reserved.
36283 /* Value is in Kb or KB (base 10). */
36315 /* Value is in Kb or KB (base 10). */
36338 * tsa_assign is 0 - Strict Priority (SP)
36339 * 0..7 - Valid values.
36340 * 8..255 - Reserved.
36371 /* Value is in Kb or KB (base 10). */
36403 /* Value is in Kb or KB (base 10). */
36426 * tsa_assign is 0 - Strict Priority (SP)
36427 * 0..7 - Valid values.
36428 * 8..255 - Reserved.
36484 * * 0x0-0xFFF8 - The function ID
36485 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
36486 * * 0xFFFD - Reserved for user-space HWRM interface
36487 * * 0xFFFF - HWRM
36520 /* Max number of DSCP-MASK-PRI entries supported. */
36556 * * 0x0-0xFFF8 - The function ID
36557 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
36558 * * 0xFFFD - Reserved for user-space HWRM interface
36559 * * 0xFFFF - HWRM
36570 * This is the host address where the 24-bits DSCP-MASK-PRI
36583 uint8_t unused_1[4];
36598 * A count of the number of DSCP-MASK-PRI tuple(s) pointed to
36603 * This is the default PRI which un-initialized DSCP values are
36607 uint8_t unused_0[4];
36641 * * 0x0-0xFFF8 - The function ID
36642 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
36643 * * 0xFFFD - Reserved for user-space HWRM interface
36644 * * 0xFFFF - HWRM
36655 * This is the host address where the 24-bits DSCP-MASK-PRI tuple
36656 * will be copied from. A non-zero mask "adds" a tuple, while
36659 * prior to Thor a mask can be 0 - 0x3f, while on Thor it can
36679 * This is the default PRI which un-initialized DSCP values will be
36684 * A count of the number of DSCP-MASK-PRI tuple(s) in the data pointed
36688 uint8_t unused_0[4];
36736 * * 0x0-0xFFF8 - The function ID
36737 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
36738 * * 0xFFFD - Reserved for user-space HWRM interface
36739 * * 0xFFFF - HWRM
36783 * This is the default PRI which un-initialized MPLS values will be
36821 * * 0x0-0xFFF8 - The function ID
36822 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
36823 * * 0xFFFD - Reserved for user-space HWRM interface
36824 * * 0xFFFF - HWRM
36883 * pri assigned to MPLS TC(EXP) 4. This value can only be changed
36886 * MPLS TC(EXP) 4.
36944 * * 0x0-0xFFF8 - The function ID
36945 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
36946 * * 0xFFFD - Reserved for user-space HWRM interface
36947 * * 0xFFFF - HWRM
37026 * pri assigned to MPLS TC(EXP) 4. This value can only
37092 * * 0x0-0xFFF8 - The function ID
37093 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37094 * * 0xFFFD - Reserved for user-space HWRM interface
37095 * * 0xFFFF - HWRM
37164 * * 0x0-0xFFF8 - The function ID
37165 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37166 * * 0xFFFD - Reserved for user-space HWRM interface
37167 * * 0xFFFF - HWRM
37222 * User priority assigned to VLAN priority 4. A value of 0xff
37279 * * 0x0-0xFFF8 - The function ID
37280 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37281 * * 0xFFFD - Reserved for user-space HWRM interface
37282 * * 0xFFFF - HWRM
37361 * User priority assigned to VLAN priority 4. This value can only
37427 * * 0x0-0xFFF8 - The function ID
37428 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37429 * * 0xFFFD - Reserved for user-space HWRM interface
37430 * * 0xFFFF - HWRM
37484 * single-host mode, each panel port has its own queue group, and thus,
37486 * through port 0. In multi-root or multi-host mode, each PCIe endpoint
37559 * * 0x0-0xFFF8 - The function ID
37560 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37561 * * 0xFFFD - Reserved for user-space HWRM interface
37562 * * 0xFFFF - HWRM
37608 * The buffer_pool_id[0-3]_map field represents mapping of rx
37613 * The buffer_pool_id[0-3]_map field represents mapping of rx
37639 * single-host mode, each panel port has its own queue group, and thus,
37641 * through port 0. In multi-root or multi-host mode, each PCIe endpoint
37702 * * 0x0-0xFFF8 - The function ID
37703 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37704 * * 0xFFFD - Reserved for user-space HWRM interface
37705 * * 0xFFFF - HWRM
37768 …HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG_OUTPUT_QUEUE_ENABLE_QID4_ENABLE_DISABLED (UINT32_C(0x0) << 4)
37770 …HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG_OUTPUT_QUEUE_ENABLE_QID4_ENABLE_ENABLED (UINT32_C(0x1) << 4)
37804 /* Lossy (best-effort). */
37811 /* Lossy (best-effort). */
37818 /* Lossy (best-effort). */
37825 /* Lossy (best-effort). */
37832 /* Lossy (best-effort). */
37833 …#define HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG_OUTPUT_QUEUE_MODE_QID4_MODE_LOSSY (UINT32_C(0x0) << 4)
37835 …ine HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG_OUTPUT_QUEUE_MODE_QID4_MODE_LOSSLESS (UINT32_C(0x1) << 4)
37839 /* Lossy (best-effort). */
37846 /* Lossy (best-effort). */
37853 /* Lossy (best-effort). */
37892 * * 0x0-0xFFF8 - The function ID
37893 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
37894 * * 0xFFFD - Reserved for user-space HWRM interface
37895 * * 0xFFFF - HWRM
37950 …e HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG_INPUT_QUEUE_ENABLE_QID4_ENABLE_DISABLED (UINT32_C(0x0) << 4)
37952 …e HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG_INPUT_QUEUE_ENABLE_QID4_ENABLE_ENABLED (UINT32_C(0x1) << 4)
37986 /* Lossy (best-effort). */
37993 /* Lossy (best-effort). */
38000 /* Lossy (best-effort). */
38007 /* Lossy (best-effort). */
38014 /* Lossy (best-effort). */
38015 #define HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG_INPUT_QUEUE_MODE_QID4_MODE_LOSSY (UINT32_C(0x0) << 4)
38017 …efine HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG_INPUT_QUEUE_MODE_QID4_MODE_LOSSLESS (UINT32_C(0x1) << 4)
38021 /* Lossy (best-effort). */
38028 /* Lossy (best-effort). */
38035 /* Lossy (best-effort). */
38088 * * 0x0-0xFFF8 - The function ID
38089 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
38090 * * 0xFFFD - Reserved for user-space HWRM interface
38091 * * 0xFFFF - HWRM
38154 …HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_QCFG_OUTPUT_QUEUE_ENABLE_QID4_ENABLE_DISABLED (UINT32_C(0x0) << 4)
38156 …HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_QCFG_OUTPUT_QUEUE_ENABLE_QID4_ENABLE_ENABLED (UINT32_C(0x1) << 4)
38213 * * 0x0-0xFFF8 - The function ID
38214 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
38215 * * 0xFFFD - Reserved for user-space HWRM interface
38216 * * 0xFFFF - HWRM
38269 …e HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_CFG_INPUT_QUEUE_ENABLE_QID4_ENABLE_DISABLED (UINT32_C(0x0) << 4)
38271 …e HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_CFG_INPUT_QUEUE_ENABLE_QID4_ENABLE_ENABLED (UINT32_C(0x1) << 4)
38342 * * 0x0-0xFFF8 - The function ID
38343 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
38344 * * 0xFFFD - Reserved for user-space HWRM interface
38345 * * 0xFFFF - HWRM
38605 * * 0x0-0xFFF8 - The function ID
38606 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
38607 * * 0xFFFD - Reserved for user-space HWRM interface
38608 * * 0xFFFF - HWRM
38645 * Specifies PCIe BW efficiency in the range of 0-100%. System
38647 * less than 100% accounts for internal PCIe over-subscription. The
38698 * value. Its range of values is 0-50%.
38740 * * 0x0-0xFFF8 - The function ID
38741 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
38742 * * 0xFFFD - Reserved for user-space HWRM interface
38743 * * 0xFFFF - HWRM
38796 * Specifies PCIe BW efficiency in the range of 0-100%. System
38798 * less than 100% accounts for internal PCIe over-subscription. The
38849 * value. Its range of values is 0-50%.
38857 uint8_t unused_0[4];
38905 * * 0x0-0xFFF8 - The function ID
38906 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
38907 * * 0xFFFD - Reserved for user-space HWRM interface
38908 * * 0xFFFF - HWRM
38948 * value. Its range of values is 0-50%.
39016 * * 0x0-0xFFF8 - The function ID
39017 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39018 * * 0xFFFD - Reserved for user-space HWRM interface
39019 * * 0xFFFF - HWRM
39067 * value. Its range of values is 0-50%.
39101 uint8_t unused_0[4];
39149 * * 0x0-0xFFF8 - The function ID
39150 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39151 * * 0xFFFD - Reserved for user-space HWRM interface
39152 * * 0xFFFF - HWRM
39211 * * 0x0-0xFFF8 - The function ID
39212 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39213 * * 0xFFFD - Reserved for user-space HWRM interface
39214 * * 0xFFFF - HWRM
39226 uint8_t unused_0[4];
39274 * * 0x0-0xFFF8 - The function ID
39275 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39276 * * 0xFFFD - Reserved for user-space HWRM interface
39277 * * 0xFFFF - HWRM
39336 * * 0x0-0xFFF8 - The function ID
39337 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39338 * * 0xFFFD - Reserved for user-space HWRM interface
39339 * * 0xFFFF - HWRM
39357 * allocation of a default VNIC on behalf of virtio-net
39362 * Virtio-net function's FID.
39363 * This virtio-net function is requesting allocation of default
39417 * * 0x0-0xFFF8 - The function ID
39418 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39419 * * 0xFFFD - Reserved for user-space HWRM interface
39420 * * 0xFFFF - HWRM
39481 uint8_t unused_1[4];
39530 * * 0x0-0xFFF8 - The function ID
39531 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39532 * * 0xFFFD - Reserved for user-space HWRM interface
39533 * * 0xFFFF - HWRM
39545 uint8_t unused_0[4];
39593 * * 0x0-0xFFF8 - The function ID
39594 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39595 * * 0xFFFD - Reserved for user-space HWRM interface
39596 * * 0xFFFF - HWRM
39629 * receive both RoCE and non-RoCE traffic.
39664 * receive both RoCE and non-RoCE traffic, but forward only the
39839 uint8_t unused0[4];
39887 * * 0x0-0xFFF8 - The function ID
39888 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
39889 * * 0xFFFD - Reserved for user-space HWRM interface
39890 * * 0xFFFF - HWRM
39967 * receive both RoCE and non-RoCE traffic.
39980 * mis-configuration by HWRM clients.
39999 * receive both RoCE and non-RoCE traffic, but forward only
40120 * * 0x0-0xFFF8 - The function ID
40121 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
40122 * * 0xFFFD - Reserved for user-space HWRM interface
40123 * * 0xFFFF - HWRM
40134 uint8_t unused_0[4];
40171 * receive both RoCE and non-RoCE traffic on VNIC(s) is
40174 * both RoCE and non-RoCE traffic on VNIC(s) is
40235 * virtio-net functions default VNIC allocation using
40390 * * 0x0-0xFFF8 - The function ID
40391 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
40392 * * 0xFFFD - Reserved for user-space HWRM interface
40393 * * 0xFFFF - HWRM
40407 * non-tunneled TCP packets.
40431 * packets with IP ECN set to non-zero.
40496 * devices supporting TPA v2, the unit is multiples of 4 and
40504 /* 4 segments */
40523 /* 4 aggregations */
40638 uint8_t unused_1[4];
40686 * * 0x0-0xFFF8 - The function ID
40687 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
40688 * * 0xFFFD - Reserved for user-space HWRM interface
40689 * * 0xFFFF - HWRM
40719 * non-tunneled TCP packets.
40743 * packets with IP ECN set to non-zero.
40781 /* 4 segments */
40797 /* 4 aggregations */
40943 * * 0x0-0xFFF8 - The function ID
40944 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
40945 * * 0xFFFD - Reserved for user-space HWRM interface
40946 * * 0xFFFF - HWRM
41061 * RSS hashing over innermost 4 tuples {l3.src, l3.dest,
41062 * l4.src, l4.dest} for tunnel packets. For none-tunnel
41070 * tunnel packets. For none-tunnel packets, the RSS hash is
41076 * RSS hashing over outermost 4 tuples {t_l3.src, t_l3.dest,
41077 * t_l4.src, t_l4.dest} for tunnel packets. For none-tunnel
41085 * tunnel packets. For none-tunnel packets, the RSS hash is
41153 uint8_t unused_1[4];
41220 * * 0x0-0xFFF8 - The function ID
41221 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
41222 * * 0xFFFD - Reserved for user-space HWRM interface
41223 * * 0xFFFF - HWRM
41235 * for chips before Thor - i.e. Cumulus and Whitney.
41243 uint8_t unused_0[4];
41332 uint8_t unused_0[4];
41354 * RSS hashing over innermost 4 tuples {l3.src, l3.dest,
41355 * l4.src, l4.dest} for tunnel packets. For none-tunnel
41363 * tunnel packets. For none-tunnel packets, the RSS hash is
41369 * RSS hashing over outermost 4 tuples {t_l3.src, t_l3.dest,
41370 * t_l4.src, t_l4.dest} for tunnel packets. For none-tunnel
41378 * tunnel packets. For none-tunnel packets, the RSS hash is
41444 * * 0x0-0xFFF8 - The function ID
41445 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
41446 * * 0xFFFD - Reserved for user-space HWRM interface
41447 * * 0xFFFF - HWRM
41472 * to enable Header-Data split for IPv4 packets according
41478 * # If the packet is identified as non-TCP and non-UDP
41486 * to enable Header-Data split for IPv6 packets according
41492 * # If the packet is identified as non-TCP and non-UDP
41500 * to enable Header-Data split for FCoE packets at the
41506 * to enable Header-Data split for RoCE packets at the
41561 * This value shall be in multiple of 4 bytes.
41571 * field are between 1 and 8. If the VNIC uses header-data-
41578 uint8_t unused_0[4];
41627 * * 0x0-0xFFF8 - The function ID
41628 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
41629 * * 0xFFFD - Reserved for user-space HWRM interface
41630 * * 0xFFFF - HWRM
41642 uint8_t unused_0[4];
41669 * to enable Header-Data split for IPv4 packets.
41674 * to enable Header-Data split for IPv6 packets.
41679 * to enable Header-Data split for FCoE packets.
41684 * to enable Header-Data split for RoCE packets.
41720 * This value shall be in multiple of 4 bytes.
41730 * field are between 1 and 8. If the VNIC uses header-data-
41772 * * 0x0-0xFFF8 - The function ID
41773 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
41774 * * 0xFFFD - Reserved for user-space HWRM interface
41775 * * 0xFFFF - HWRM
41834 * * 0x0-0xFFF8 - The function ID
41835 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
41836 * * 0xFFFD - Reserved for user-space HWRM interface
41837 * * 0xFFFF - HWRM
41897 * * 0x0-0xFFF8 - The function ID
41898 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
41899 * * 0xFFFD - Reserved for user-space HWRM interface
41900 * * 0xFFFF - HWRM
41973 * completion is generated. Non-zero values for the field are only
41980 /* Generates a TX coalesced completion for up to 4 TX packets. */
42041 * two-completion TX packet timestamp feature. By enabling this
42053 * This value is a pointer to the page table for the
42057 /* First Byte Offset of the first entry in the first page. */
42060 * Actual page size in 2^page_size. The supported range is increments
42062 * - 4 = 16 B
42063 * Page size is 16 B.
42064 * - 12 = 4 KB
42065 * Page size is 4 KB.
42066 * - 13 = 8 KB
42067 * Page size is 8 KB.
42068 * - 16 = 64 KB
42069 * Page size is 64 KB.
42070 * - 21 = 2 MB
42071 * Page size is 2 MB.
42072 * - 22 = 4 MB
42073 * Page size is 4 MB.
42074 * - 30 = 1 GB
42075 * Page size is 1 GB.
42079 * This value indicates the depth of page table.
42084 * 1. FBO and page size fields are not valid.
42101 * For completion rings, this value is also the MSI-X
42155 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4
42209 /* Value is in Kb or KB (base 10). */
42232 /* MSI-X */
42234 /* No Interrupt - Polled mode */
42337 * * 0x0-0xFFF8 - The function ID
42338 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
42339 * * 0xFFFD - Reserved for user-space HWRM interface
42340 * * 0xFFFF - HWRM
42442 * * 0x0-0xFFF8 - The function ID
42443 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
42444 * * 0xFFFD - Reserved for user-space HWRM interface
42445 * * 0xFFFF - HWRM
42478 uint8_t unused_1[4];
42538 * * 0x0-0xFFF8 - The function ID
42539 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
42540 * * 0xFFFD - Reserved for user-space HWRM interface
42541 * * 0xFFFF - HWRM
42645 uint8_t unused_2[4];
42694 * * 0x0-0xFFF8 - The function ID
42695 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
42696 * * 0xFFFD - Reserved for user-space HWRM interface
42697 * * 0xFFFF - HWRM
42834 * * 0x0-0xFFF8 - The function ID
42835 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
42836 * * 0xFFFD - Reserved for user-space HWRM interface
42837 * * 0xFFFF - HWRM
42976 * * 0x0-0xFFF8 - The function ID
42977 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
42978 * * 0xFFFD - Reserved for user-space HWRM interface
42979 * * 0xFFFF - HWRM
43000 uint8_t unused_0[4];
43092 * * 0x0-0xFFF8 - The function ID
43093 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
43094 * * 0xFFFD - Reserved for user-space HWRM interface
43095 * * 0xFFFF - HWRM
43194 uint8_t unused_0[4];
43242 * * 0x0-0xFFF8 - The function ID
43243 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
43244 * * 0xFFFD - Reserved for user-space HWRM interface
43245 * * 0xFFFF - HWRM
43329 * * 0x0-0xFFF8 - The function ID
43330 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
43331 * * 0xFFFD - Reserved for user-space HWRM interface
43332 * * 0xFFFF - HWRM
43344 uint8_t unused_0[4];
43392 * * 0x0-0xFFF8 - The function ID
43393 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
43394 * * 0xFFFD - Reserved for user-space HWRM interface
43395 * * 0xFFFF - HWRM
43448 /* TQM ring 0 page size and level. */
43463 /* TQM ring 0 page size. */
43465 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_SFT 4
43466 /* 4KB. */
43467 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43468 /* 8KB. */
43469 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43470 /* 64KB. */
43471 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43473 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43475 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43477 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING0_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43479 /* TQM ring 1 page size and level. */
43494 /* TQM ring 1 page size. */
43496 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_SFT 4
43497 /* 4KB. */
43498 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43499 /* 8KB. */
43500 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43501 /* 64KB. */
43502 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43504 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43506 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43508 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING1_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43510 /* TQM ring 2 page size and level. */
43525 /* TQM ring 2 page size. */
43527 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_SFT 4
43528 /* 4KB. */
43529 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43530 /* 8KB. */
43531 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43532 /* 64KB. */
43533 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43535 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43537 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43539 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING2_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43541 /* TQM ring 3 page size and level. */
43556 /* TQM ring 3 page size. */
43558 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_SFT 4
43559 /* 4KB. */
43560 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43561 /* 8KB. */
43562 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43563 /* 64KB. */
43564 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43566 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43568 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43570 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING3_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43572 /* TQM ring 4 page size and level. */
43574 /* TQM ring 4 PBL indirect levels. */
43587 /* TQM ring 4 page size. */
43589 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_SFT 4
43590 /* 4KB. */
43591 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43592 /* 8KB. */
43593 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43594 /* 64KB. */
43595 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43597 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43599 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43601 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING4_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43603 /* TQM ring 5 page size and level. */
43618 /* TQM ring 5 page size. */
43620 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_SFT 4
43621 /* 4KB. */
43622 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43623 /* 8KB. */
43624 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43625 /* 64KB. */
43626 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43628 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43630 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43632 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING5_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43634 /* TQM ring 6 page size and level. */
43649 /* TQM ring 6 page size. */
43651 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_SFT 4
43652 /* 4KB. */
43653 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43654 /* 8KB. */
43655 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43656 /* 64KB. */
43657 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43659 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43661 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43663 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING6_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43665 /* TQM ring 7 page size and level. */
43680 /* TQM ring 7 page size. */
43682 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_SFT 4
43683 /* 4KB. */
43684 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
43685 /* 8KB. */
43686 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
43687 /* 64KB. */
43688 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
43690 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
43692 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
43694 #define HWRM_RING_SCHQ_ALLOC_INPUT_TQM_RING7_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
43696 /* TQM ring 0 page directory. */
43698 /* TQM ring 1 page directory. */
43700 /* TQM ring 2 page directory. */
43702 /* TQM ring 3 page directory. */
43704 /* TQM ring 4 page directory. */
43706 /* TQM ring 5 page directory. */
43708 /* TQM ring 6 page directory. */
43710 /* TQM ring 7 page directory. */
43761 * Number of TQM ring 4 entries.
43864 * * 0x0-0xFFF8 - The function ID
43865 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
43866 * * 0xFFFD - Reserved for user-space HWRM interface
43867 * * 0xFFFF - HWRM
43971 uint8_t unused_1[4];
44019 * * 0x0-0xFFF8 - The function ID
44020 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
44021 * * 0xFFFD - Reserved for user-space HWRM interface
44022 * * 0xFFFF - HWRM
44103 * * 0x0-0xFFF8 - The function ID
44104 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
44105 * * 0xFFFD - Reserved for user-space HWRM interface
44106 * * 0xFFFF - HWRM
44150 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_SFT 4
44152 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_NO_ROCE_L2 (UINT32_C(0x0) << 4)
44154 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_L2 (UINT32_C(0x1) << 4)
44156 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_ROCE (UINT32_C(0x2) << 4)
44161 * 0 - legacy behavior, XDP filter is created with L2 filter
44162 * 1 - XDP filter won't be created with L2 filter
44370 /* Non-tunnel */
44382 /* Multi-Protocol Label Switching (MPLS) */
44402 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
44443 * 1 - Above the given filter
44444 * 2 - Below the given filter
44466 * The flow id value in bit 0-29 is the actual ID of the flow
44469 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
44531 * * 0x0-0xFFF8 - The function ID
44532 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
44533 * * 0xFFFD - Reserved for user-space HWRM interface
44534 * * 0xFFFF - HWRM
44597 * * 0x0-0xFFF8 - The function ID
44598 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
44599 * * 0xFFFD - Reserved for user-space HWRM interface
44600 * * 0xFFFF - HWRM
44645 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_REMAP_OP_SFT 4
44647 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_REMAP_OP_NO_UPDATE (UINT32_C(0x0) << 4)
44649 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_REMAP_OP_BYPASS_LKUP (UINT32_C(0x1) << 4)
44651 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_REMAP_OP_ENABLE_LKUP (UINT32_C(0x2) << 4)
44751 * * 0x0-0xFFF8 - The function ID
44752 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
44753 * * 0xFFFD - Reserved for user-space HWRM interface
44754 * * 0xFFFF - HWRM
44769 * multi-cast packets specified by the multicast addr table.
44774 * all multi-cast packets.
44801 * PF (e.g. S-Tag). If a unique outer VLAN
44829 * filters for the VLAN-tagged packets that match the
44837 * filters for non-VLAN tagged packets and VLAN-tagged
44845 * filters for non-VLAN tagged packets and VLAN-tagged
44866 uint8_t unused_0[4];
44869 * Each VLAN entry in the table is 4 bytes of a VLAN tag
44876 * valid. Each entry is 4 bytes.
44879 uint8_t unused_1[4];
44944 * * 0x0-0xFFF8 - The function ID
44945 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
44946 * * 0xFFFD - Reserved for user-space HWRM interface
44947 * * 0xFFFF - HWRM
44967 * antispoof table. Each table entry contains the 16-bit TPID
44968 * (0x8100 or 0x88a8 only), 16-bit VLAN ID, and a 16-bit mask,
44971 * for the 12-bit VLAN ID.
45022 * * 0x0-0xFFF8 - The function ID
45023 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45024 * * 0xFFFD - Reserved for user-space HWRM interface
45025 * * 0xFFFF - HWRM
45049 * entry will contain the 16-bit TPID (0x8100 or 0x88a8 only),
45050 * 16-bit VLAN ID, and a 16-bit mask, all in network order to
45052 * the mask value should be 0xfff for the 12-bit VLAN ID.
45105 * * 0x0-0xFFF8 - The function ID
45106 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45107 * * 0xFFFD - Reserved for user-space HWRM interface
45108 * * 0xFFFF - HWRM
45194 * Only 12-bits of VLAN ID are used in setting the filter.
45201 uint32_t l3_addr[4];
45206 uint32_t t_l3_addr[4];
45209 * 4 - IPv4
45210 * 6 - IPv6
45216 * 4 - IPv4
45217 * 6 - IPv6
45223 /* Non-tunnel */
45235 /* Multi-Protocol Label Switching (MPLS) */
45255 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
45298 * Only lower 24-bits of VNI field are used
45325 * The flow id value in bit 0-29 is the actual ID of the flow
45328 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
45390 * * 0x0-0xFFF8 - The function ID
45391 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45392 * * 0xFFFD - Reserved for user-space HWRM interface
45393 * * 0xFFFF - HWRM
45453 * * 0x0-0xFFF8 - The function ID
45454 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45455 * * 0xFFFD - Reserved for user-space HWRM interface
45456 * * 0xFFFF - HWRM
45470 /* Non-tunnel */
45482 /* Multi-Protocol Label Switching (MPLS) */
45502 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
45514 uint8_t unused_0[4];
45563 * * 0x0-0xFFF8 - The function ID
45564 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45565 * * 0xFFFD - Reserved for user-space HWRM interface
45566 * * 0xFFFF - HWRM
45580 /* Non-tunnel */
45592 /* Multi-Protocol Label Switching (MPLS) */
45612 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
45666 * * 0x0-0xFFF8 - The function ID
45667 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45668 * * 0xFFFD - Reserved for user-space HWRM interface
45669 * * 0xFFFF - HWRM
45683 /* Non-tunnel */
45695 /* Multi-Protocol Label Switching (MPLS) */
45715 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
45758 #define HWRM_VXLAN_IPV4_HDR_VER_HLEN_VERSION_SFT 4
45800 uint32_t src_ip_addr[4];
45802 uint32_t dest_ip_addr[4];
45830 /* IP version 4. */
45876 * * 0x0-0xFFF8 - The function ID
45877 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45878 * * 0xFFFD - Reserved for user-space HWRM interface
45879 * * 0xFFFF - HWRM
45913 /* Multi-Protocol Label Switching (MPLS) */
45933 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
45989 * * 0x0-0xFFF8 - The function ID
45990 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
45991 * * 0xFFFD - Reserved for user-space HWRM interface
45992 * * 0xFFFF - HWRM
46004 uint8_t unused_0[4];
46053 * * 0x0-0xFFF8 - The function ID
46054 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
46055 * * 0xFFFD - Reserved for user-space HWRM interface
46056 * * 0xFFFF - HWRM
46224 * 4 - IPv4
46225 * 6 - IPv6
46239 * 6 - TCP
46240 * 17 - UDP
46241 * 1 - ICMP
46242 * 58 - ICMPV6
46243 * 255 - RSVD
46276 * apply to both non-tunneled and tunneled packets.
46282 /* Non-tunnel */
46294 /* Multi-Protocol Label Switching (MPLS) */
46314 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
46339 uint32_t src_ipaddr[4];
46345 uint32_t src_ipaddr_mask[4];
46350 uint32_t dst_ipaddr[4];
46356 uint32_t dst_ipaddr_mask[4];
46399 * The flow id value in bit 0-29 is the actual ID of the flow
46402 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
46480 * * 0x0-0xFFF8 - The function ID
46481 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
46482 * * 0xFFFD - Reserved for user-space HWRM interface
46483 * * 0xFFFF - HWRM
46543 * * 0x0-0xFFF8 - The function ID
46544 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
46545 * * 0xFFFD - Reserved for user-space HWRM interface
46546 * * 0xFFFF - HWRM
46668 * * 0x0-0xFFF8 - The function ID
46669 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
46670 * * 0xFFFD - Reserved for user-space HWRM interface
46671 * * 0xFFFF - HWRM
46704 * Setting of this flag indicates de-capsulation action for the
46822 /* Non-tunnel */
46834 /* Multi-Protocol Label Switching (MPLS) */
46854 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
46864 * Only lower 24-bits of VNI field are used
46900 * 4 - IPv4
46901 * 6 - IPv6
46915 * 6 - TCP
46916 * 17 - UDP
46931 uint32_t src_ipaddr[4];
46937 uint32_t dst_ipaddr[4];
46962 uint8_t unused_2[4];
46979 * The flow id value in bit 0-29 is the actual ID of the flow
46982 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
47044 * * 0x0-0xFFF8 - The function ID
47045 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47046 * * 0xFFFD - Reserved for user-space HWRM interface
47047 * * 0xFFFF - HWRM
47107 * * 0x0-0xFFF8 - The function ID
47108 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47109 * * 0xFFFD - Reserved for user-space HWRM interface
47110 * * 0xFFFF - HWRM
47136 uint8_t unused_0[4];
47212 * * 0x0-0xFFF8 - The function ID
47213 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47214 * * 0xFFFD - Reserved for user-space HWRM interface
47215 * * 0xFFFF - HWRM
47251 uint8_t unused_0[4];
47258 * The maximum non-guaranteed number of tx meter profiles supported
47268 * The maximum non-guaranteed number of rx meter profiles supported
47278 * The maximum non-guaranteed number of tx meter instances supported
47288 * The maximum non-guaranteed number of rx meter instances supported
47327 * * 0x0-0xFFF8 - The function ID
47328 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47329 * * 0xFFFD - Reserved for user-space HWRM interface
47330 * * 0xFFFF - HWRM
47371 /* A meter rate specified in bytes-per-second. */
47388 /* Value is in Kb or KB (base 10). */
47416 /* Value is in Kb or KB (base 10). */
47427 /* A meter rate specified in bytes-per-second. */
47444 /* Value is in Kb or KB (base 10). */
47472 /* Value is in Kb or KB (base 10). */
47539 * * 0x0-0xFFF8 - The function ID
47540 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47541 * * 0xFFFD - Reserved for user-space HWRM interface
47542 * * 0xFFFF - HWRM
47573 uint8_t unused_1[4];
47622 * * 0x0-0xFFF8 - The function ID
47623 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47624 * * 0xFFFD - Reserved for user-space HWRM interface
47625 * * 0xFFFF - HWRM
47669 /* A meter rate specified in bytes-per-second. */
47686 /* Value is in Kb or KB (base 10). */
47714 /* Value is in Kb or KB (base 10). */
47725 /* A meter rate specified in bytes-per-second. */
47742 /* Value is in Kb or KB (base 10). */
47770 /* Value is in Kb or KB (base 10). */
47829 * * 0x0-0xFFF8 - The function ID
47830 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47831 * * 0xFFFD - Reserved for user-space HWRM interface
47832 * * 0xFFFF - HWRM
47863 uint8_t unused_1[4];
47920 * * 0x0-0xFFF8 - The function ID
47921 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
47922 * * 0xFFFD - Reserved for user-space HWRM interface
47923 * * 0xFFFF - HWRM
48011 * * 0x0-0xFFF8 - The function ID
48012 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
48013 * * 0xFFFD - Reserved for user-space HWRM interface
48014 * * 0xFFFF - HWRM
48045 uint8_t unused_1[4];
48094 * * 0x0-0xFFF8 - The function ID
48095 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
48096 * * 0xFFFD - Reserved for user-space HWRM interface
48097 * * 0xFFFF - HWRM
48200 * Only lower 24-bits of VNI field are used
48206 /* Non-tunnel */
48218 /* Multi-Protocol Label Switching (MPLS) */
48238 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
48280 * 4 - IPv4
48281 * 6 - IPv6
48295 * 6 - TCP
48296 * 17 - UDP
48312 uint32_t src_ipaddr[4];
48317 uint32_t dst_ipaddr[4];
48389 * * 0x0-0xFFF8 - The function ID
48390 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
48391 * * 0xFFFD - Reserved for user-space HWRM interface
48392 * * 0xFFFF - HWRM
48404 uint8_t unused_0[4];
48453 * * 0x0-0xFFF8 - The function ID
48454 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
48455 * * 0xFFFD - Reserved for user-space HWRM interface
48456 * * 0xFFFF - HWRM
48567 * If set to 1 there will be no attempt to allocate an on-chip try
48570 * an on-chip flow counter for the newly created flow. This will
48603 uint32_t ip_dst[4];
48605 uint32_t ip_src[4];
48630 uint32_t nat_ip_address[4];
48631 /* L2 header re-write Destination MAC address. */
48639 /* L2 header re-write Source MAC address. */
48645 /* Non-tunnel */
48657 /* Multi-Protocol Label Switching (MPLS) */
48677 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
48699 * The flow id value in bit 0-29 is the actual ID of the flow
48702 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
48760 /* No more wild-card TCAM */
48795 * * 0x0-0xFFF8 - The function ID
48796 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
48797 * * 0xFFFD - Reserved for user-space HWRM interface
48798 * * 0xFFFF - HWRM
48882 uint32_t nat_ip_address[4];
48895 /* Multi-Protocol Label Switching (MPLS) */
48915 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
48928 /* Non-tunnel */
48940 /* Multi-Protocol Label Switching (MPLS) */
48960 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
48990 uint32_t ip_dst[4];
48992 uint32_t ip_src[4];
48994 uint32_t nat_ip_address[4];
49007 /* L2 header re-write Destination MAC address. */
49010 /* L2 header re-write Source MAC address. */
49086 * * 0x0-0xFFF8 - The function ID
49087 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49088 * * 0xFFFD - Reserved for user-space HWRM interface
49089 * * 0xFFFF - HWRM
49205 * * 0x0-0xFFF8 - The function ID
49206 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49207 * * 0xFFFD - Reserved for user-space HWRM interface
49208 * * 0xFFFF - HWRM
49221 * Set to 1 to indicate the page size, page layers, and
49258 /* Specify page size of the flow table memory. */
49260 /* The page size is 4K */
49262 /* The page size is 8K */
49264 /* The page size is 64K */
49266 /* The page size is 256K */
49268 /* The page size is 1M */
49270 /* The page size is 2M */
49272 /* The page size is 4M */
49274 /* The page size is 1G */
49341 * * 0x0-0xFFF8 - The function ID
49342 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49343 * * 0xFFFD - Reserved for user-space HWRM interface
49344 * * 0xFFFF - HWRM
49534 * * 0x0-0xFFF8 - The function ID
49535 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49536 * * 0xFFFD - Reserved for user-space HWRM interface
49537 * * 0xFFFF - HWRM
49605 * * 0x0-0xFFF8 - The function ID
49606 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49607 * * 0xFFFD - Reserved for user-space HWRM interface
49608 * * 0xFFFF - HWRM
49711 * each entry is 4 bytes.
49715 uint8_t unused_1[4];
49764 * * 0x0-0xFFF8 - The function ID
49765 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49766 * * 0xFFFD - Reserved for user-space HWRM interface
49767 * * 0xFFFF - HWRM
49869 * * 0x0-0xFFF8 - The function ID
49870 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49871 * * 0xFFFD - Reserved for user-space HWRM interface
49872 * * 0xFFFF - HWRM
49960 * * 0x0-0xFFF8 - The function ID
49961 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
49962 * * 0xFFFD - Reserved for user-space HWRM interface
49963 * * 0xFFFF - HWRM
50035 * * 0x0-0xFFF8 - The function ID
50036 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50037 * * 0xFFFD - Reserved for user-space HWRM interface
50038 * * 0xFFFF - HWRM
50048 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50050 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50052 uint8_t unused_0[4];
50103 * * 0x0-0xFFF8 - The function ID
50104 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50105 * * 0xFFFD - Reserved for user-space HWRM interface
50106 * * 0xFFFF - HWRM
50166 * * 0x0-0xFFF8 - The function ID
50167 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50168 * * 0xFFFD - Reserved for user-space HWRM interface
50169 * * 0xFFFF - HWRM
50255 * * 0x0-0xFFF8 - The function ID
50256 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50257 * * 0xFFFD - Reserved for user-space HWRM interface
50258 * * 0xFFFF - HWRM
50269 * Pair mode (0-vf2fn, 1-rep2fn, 2-rep2rep, 3-proxy, 4-pfpair,
50270 * 5-rep2fn_mod, 6-rep2fn_modall, 7-rep2fn_truflow).
50305 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50307 /* Logical Host (0xff-local host). */
50309 /* Logical PF (0xff-PF for command channel). */
50311 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50313 /* Loopback port (0xff-internal loopback), valid for mode-3. */
50315 /* Priority used for encap of loopback packets valid for mode-3. */
50357 * packets will be dropped when the B-side RX rings are full.
50363 * the RX CoS queue will be flow controlled when the A-side RX rings
50367 uint8_t unused_1[4];
50424 * * 0x0-0xFFF8 - The function ID
50425 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50426 * * 0xFFFD - Reserved for user-space HWRM interface
50427 * * 0xFFFF - HWRM
50439 /* Logical PF (0xff-PF for command channel). */
50442 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50445 * Pair mode (0-vf2fn, 1-rep2fn, 2-rep2rep, 3-proxy, 4-pfpair,
50446 * 5-rep2fn_mod, 6-rep2fn_modall, 7-rep2fn_truflow).
50529 * * 0x0-0xFFF8 - The function ID
50530 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50531 * * 0xFFFD - Reserved for user-space HWRM interface
50532 * * 0xFFFF - HWRM
50594 /* Pair mode (0-vf2fn, 1-rep2fn, 2-rep2rep, 3-proxy, 4-pfpair). */
50660 * * 0x0-0xFFF8 - The function ID
50661 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50662 * * 0xFFFD - Reserved for user-space HWRM interface
50663 * * 0xFFFF - HWRM
50673 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50680 uint8_t unused_0[4];
50735 * * 0x0-0xFFF8 - The function ID
50736 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50737 * * 0xFFFD - Reserved for user-space HWRM interface
50738 * * 0xFFFF - HWRM
50750 /* Logical VF number (range: 0 -> MAX_VFS -1). */
50757 uint8_t unused_0[4];
50806 * * 0x0-0xFFF8 - The function ID
50807 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50808 * * 0xFFFD - Reserved for user-space HWRM interface
50809 * * 0xFFFF - HWRM
50837 /* Non-tunnel */
50849 /* Multi-Protocol Label Switching (MPLS) */
50871 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
50908 * * 0x0-0xFFF8 - The function ID
50909 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
50910 * * 0xFFFD - Reserved for user-space HWRM interface
50911 * * 0xFFFF - HWRM
50934 /* Page size. */
50936 /* 4KB page size. */
50938 /* 8KB page size. */
50940 /* 64KB page size. */
50942 /* 256KB page size. */
50944 /* 1MB page size. */
50946 /* 2MB page size. */
50948 /* 4MB page size. */
50950 /* 1GB page size. */
51009 * * 0x0-0xFFF8 - The function ID
51010 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51011 * * 0xFFFD - Reserved for user-space HWRM interface
51012 * * 0xFFFF - HWRM
51076 * * 0x0-0xFFF8 - The function ID
51077 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51078 * * 0xFFFD - Reserved for user-space HWRM interface
51079 * * 0xFFFF - HWRM
51121 /* Page size. */
51123 /* 4KB page size. */
51125 /* 8KB page size. */
51127 /* 64KB page size. */
51129 /* 256KB page size. */
51131 /* 1MB page size. */
51133 /* 2MB page size. */
51135 /* 4MB page size. */
51137 /* 1GB page size. */
51140 uint8_t unused_0[4];
51178 * * 0x0-0xFFF8 - The function ID
51179 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51180 * * 0xFFFD - Reserved for user-space HWRM interface
51181 * * 0xFFFF - HWRM
51244 * * 0x0-0xFFF8 - The function ID
51245 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51246 * * 0xFFFD - Reserved for user-space HWRM interface
51247 * * 0xFFFF - HWRM
51275 /* 64-bit packet counters followed by 64-bit byte counters format. */
51285 * Maximum non-guaranteed number of flow counters supported for this
51295 * Maximum non-guaranteed number of flow counters supported for this
51305 * Maximum non-guaranteed number of extension flow counters supported
51315 * Maximum non-guaranteed number of extension flow counters supported
51325 * Maximum non-guaranteed number of meter drop counters supported for
51335 * Maximum non-guaranteed number of meter drop counters supported for
51379 * * 0x0-0xFFF8 - The function ID
51380 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51381 * * 0xFFFD - Reserved for user-space HWRM interface
51382 * * 0xFFFF - HWRM
51480 * * 0x0-0xFFF8 - The function ID
51481 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51482 * * 0xFFFD - Reserved for user-space HWRM interface
51483 * * 0xFFFF - HWRM
51564 * * 0x0-0xFFF8 - The function ID
51565 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51566 * * 0xFFFD - Reserved for user-space HWRM interface
51567 * * 0xFFFF - HWRM
51641 * * 0x0-0xFFF8 - The function ID
51642 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51643 * * 0xFFFD - Reserved for user-space HWRM interface
51644 * * 0xFFFF - HWRM
51706 * or semi-direct access to the allocated memory while none of
51744 * 32k, 64k 128k, 256k, 512k, 1M, 2M, 4M, 8M, 32M, 64M, 128M
51793 * * 0x0-0xFFF8 - The function ID
51794 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51795 * * 0xFFFD - Reserved for user-space HWRM interface
51796 * * 0xFFFF - HWRM
51897 * * 0x0-0xFFF8 - The function ID
51898 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51899 * * 0xFFFD - Reserved for user-space HWRM interface
51900 * * 0xFFFF - HWRM
51983 * * 0x0-0xFFF8 - The function ID
51984 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
51985 * * 0xFFFD - Reserved for user-space HWRM interface
51986 * * 0xFFFF - HWRM
52082 * * 0x0-0xFFF8 - The function ID
52083 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52084 * * 0xFFFD - Reserved for user-space HWRM interface
52085 * * 0xFFFF - HWRM
52095 uint32_t unused_0[4];
52111 * Value of 1 to indicate firmware support 16-bit flow handle.
52112 * Value of 0 to indicate firmware not support 16-bit flow handle.
52116 * Value of 1 to indicate firmware support 64-bit flow handle.
52117 * Value of 0 to indicate firmware not support 64-bit flow handle.
52155 * allocation of an on-chip flow counter which can be used for EEM
52157 * allocation of an on-chip flow counter.
52280 * * 0x0-0xFFF8 - The function ID
52281 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52282 * * 0xFFFD - Reserved for user-space HWRM interface
52283 * * 0xFFFF - HWRM
52298 uint8_t unused0[4];
52358 * * 0x0-0xFFF8 - The function ID
52359 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52360 * * 0xFFFD - Reserved for user-space HWRM interface
52361 * * 0xFFFF - HWRM
52383 * with layer 4 (TCP/UDP) headers will hash using the destination
52393 * bit2 = port 2, bit3 = port 4, bit4 = loopback port
52396 /* Specify the active port when active-backup mode is specified */
52449 * * 0x0-0xFFF8 - The function ID
52450 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52451 * * 0xFFFD - Reserved for user-space HWRM interface
52452 * * 0xFFFF - HWRM
52513 * * 0x0-0xFFF8 - The function ID
52514 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52515 * * 0xFFFD - Reserved for user-space HWRM interface
52516 * * 0xFFFF - HWRM
52598 * 4 - IPv4
52599 * 6 - IPv6
52613 * 6 - TCP
52614 * 17 - UDP
52641 uint32_t src_ipaddr[4];
52646 uint32_t dst_ipaddr[4];
52659 * KID is limited to 20-bits.
52680 * The flow id value in bit 0-29 is the actual ID of the flow
52683 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
52745 * * 0x0-0xFFF8 - The function ID
52746 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52747 * * 0xFFFD - Reserved for user-space HWRM interface
52748 * * 0xFFFF - HWRM
52808 * * 0x0-0xFFF8 - The function ID
52809 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52810 * * 0xFFFD - Reserved for user-space HWRM interface
52811 * * 0xFFFF - HWRM
52895 * * 0x0-0xFFF8 - The function ID
52896 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52897 * * 0xFFFD - Reserved for user-space HWRM interface
52898 * * 0xFFFF - HWRM
52913 uint8_t unused0[4];
52973 * * 0x0-0xFFF8 - The function ID
52974 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
52975 * * 0xFFFD - Reserved for user-space HWRM interface
52976 * * 0xFFFF - HWRM
53048 * * 0x0-0xFFF8 - The function ID
53049 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53050 * * 0xFFFD - Reserved for user-space HWRM interface
53051 * * 0xFFFF - HWRM
53141 * * 0x0-0xFFF8 - The function ID
53142 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53143 * * 0xFFFD - Reserved for user-space HWRM interface
53144 * * 0xFFFF - HWRM
53222 * * 0x0-0xFFF8 - The function ID
53223 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53224 * * 0xFFFD - Reserved for user-space HWRM interface
53225 * * 0xFFFF - HWRM
53294 * * 0x0-0xFFF8 - The function ID
53295 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53296 * * 0xFFFD - Reserved for user-space HWRM interface
53297 * * 0xFFFF - HWRM
53310 uint8_t unused0[4];
53360 * * 0x0-0xFFF8 - The function ID
53361 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53362 * * 0xFFFD - Reserved for user-space HWRM interface
53363 * * 0xFFFF - HWRM
53376 uint8_t unused0[4];
53404 * A value of 1 in this field indicates that the re-use of
53406 * Non-tunnel L2, L2-L3 and IP-IP tunnel.
53467 * * 0x0-0xFFF8 - The function ID
53468 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53469 * * 0xFFFD - Reserved for user-space HWRM interface
53470 * * 0xFFFF - HWRM
53540 * between TF and AFM within the 4 internal memory banks (Thor).
53581 * * 0x0-0xFFF8 - The function ID
53582 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53583 * * 0xFFFD - Reserved for user-space HWRM interface
53584 * * 0xFFFF - HWRM
53681 * * 0x0-0xFFF8 - The function ID
53682 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53683 * * 0xFFFD - Reserved for user-space HWRM interface
53684 * * 0xFFFF - HWRM
53766 * * 0x0-0xFFF8 - The function ID
53767 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53768 * * 0xFFFD - Reserved for user-space HWRM interface
53769 * * 0xFFFF - HWRM
53890 * * 0x0-0xFFF8 - The function ID
53891 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53892 * * 0xFFFD - Reserved for user-space HWRM interface
53893 * * 0xFFFF - HWRM
53927 * set to a non-zero value in case of a re-alloc, specifies a
53928 * tunnel-type of dynamic UPAR tunnel.
53987 * * 0x0-0xFFF8 - The function ID
53988 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
53989 * * 0xFFFD - Reserved for user-space HWRM interface
53990 * * 0xFFFF - HWRM
54093 * * 0x0-0xFFF8 - The function ID
54094 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54095 * * 0xFFFD - Reserved for user-space HWRM interface
54096 * * 0xFFFF - HWRM
54194 * * 0x0-0xFFF8 - The function ID
54195 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54196 * * 0xFFFD - Reserved for user-space HWRM interface
54197 * * 0xFFFF - HWRM
54289 * * 0x0-0xFFF8 - The function ID
54290 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54291 * * 0xFFFD - Reserved for user-space HWRM interface
54292 * * 0xFFFF - HWRM
54380 * * 0x0-0xFFF8 - The function ID
54381 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54382 * * 0xFFFD - Reserved for user-space HWRM interface
54383 * * 0xFFFF - HWRM
54473 * * 0x0-0xFFF8 - The function ID
54474 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54475 * * 0xFFFD - Reserved for user-space HWRM interface
54476 * * 0xFFFF - HWRM
54558 * * 0x0-0xFFF8 - The function ID
54559 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54560 * * 0xFFFD - Reserved for user-space HWRM interface
54561 * * 0xFFFF - HWRM
54641 * * 0x0-0xFFF8 - The function ID
54642 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54643 * * 0xFFFD - Reserved for user-space HWRM interface
54644 * * 0xFFFF - HWRM
54744 * * 0x0-0xFFF8 - The function ID
54745 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54746 * * 0xFFFD - Reserved for user-space HWRM interface
54747 * * 0xFFFF - HWRM
54799 uint8_t unused0[4];
54841 * * 0x0-0xFFF8 - The function ID
54842 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54843 * * 0xFFFD - Reserved for user-space HWRM interface
54844 * * 0xFFFF - HWRM
54925 * * 0x0-0xFFF8 - The function ID
54926 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
54927 * * 0xFFFD - Reserved for user-space HWRM interface
54928 * * 0xFFFF - HWRM
55009 * * 0x0-0xFFF8 - The function ID
55010 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55011 * * 0xFFFD - Reserved for user-space HWRM interface
55012 * * 0xFFFF - HWRM
55096 * * 0x0-0xFFF8 - The function ID
55097 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55098 * * 0xFFFD - Reserved for user-space HWRM interface
55099 * * 0xFFFF - HWRM
55183 * * 0x0-0xFFF8 - The function ID
55184 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55185 * * 0xFFFD - Reserved for user-space HWRM interface
55186 * * 0xFFFF - HWRM
55273 * * 0x0-0xFFF8 - The function ID
55274 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55275 * * 0xFFFD - Reserved for user-space HWRM interface
55276 * * 0xFFFF - HWRM
55361 * * 0x0-0xFFF8 - The function ID
55362 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55363 * * 0xFFFD - Reserved for user-space HWRM interface
55364 * * 0xFFFF - HWRM
55458 * * 0x0-0xFFF8 - The function ID
55459 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55460 * * 0xFFFD - Reserved for user-space HWRM interface
55461 * * 0xFFFF - HWRM
55533 * * 0x0-0xFFF8 - The function ID
55534 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55535 * * 0xFFFD - Reserved for user-space HWRM interface
55536 * * 0xFFFF - HWRM
55612 * * 0x0-0xFFF8 - The function ID
55613 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55614 * * 0xFFFD - Reserved for user-space HWRM interface
55615 * * 0xFFFF - HWRM
55711 * * 0x0-0xFFF8 - The function ID
55712 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55713 * * 0xFFFD - Reserved for user-space HWRM interface
55714 * * 0xFFFF - HWRM
55818 * * 0x0-0xFFF8 - The function ID
55819 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55820 * * 0xFFFD - Reserved for user-space HWRM interface
55821 * * 0xFFFF - HWRM
55906 * * 0x0-0xFFF8 - The function ID
55907 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
55908 * * 0xFFFD - Reserved for user-space HWRM interface
55909 * * 0xFFFF - HWRM
55922 * specify that the function is a non-trusted VF of the parent PF.
55924 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
55930 /* Non-zero if this table scope is shared. */
55966 * Non-zero if this is the first FID associated with this table scope
56007 * * 0x0-0xFFF8 - The function ID
56008 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56009 * * 0xFFFD - Reserved for user-space HWRM interface
56010 * * 0xFFFF - HWRM
56052 /* The page size of the table scope. */
56118 * * 0x0-0xFFF8 - The function ID
56119 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56120 * * 0xFFFD - Reserved for user-space HWRM interface
56121 * * 0xFFFF - HWRM
56185 * * 0x0-0xFFF8 - The function ID
56186 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56187 * * 0xFFFD - Reserved for user-space HWRM interface
56188 * * 0xFFFF - HWRM
56201 * specify that the function is a non-trusted VF of the parent PF.
56203 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56263 * * 0x0-0xFFF8 - The function ID
56264 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56265 * * 0xFFFD - Reserved for user-space HWRM interface
56266 * * 0xFFFF - HWRM
56279 * specify that the function is a non-trusted VF of the parent PF.
56281 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56326 * id alloc, dis-associating the last fid from a session id (fid_cnt goes
56347 * * 0x0-0xFFF8 - The function ID
56348 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56349 * * 0xFFFD - Reserved for user-space HWRM interface
56350 * * 0xFFFF - HWRM
56363 * specify that the function is a non-trusted VF of the parent PF.
56365 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56429 * * 0x0-0xFFF8 - The function ID
56430 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56431 * * 0xFFFD - Reserved for user-space HWRM interface
56432 * * 0xFFFF - HWRM
56445 * specify that the function is a non-trusted VF of the parent PF.
56447 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56457 uint8_t unused0[4];
56492 * Dis-associate a TFC session from the target_fid.
56494 * session id alloc, dis-associating the last fid from a session id
56516 * * 0x0-0xFFF8 - The function ID
56517 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56518 * * 0xFFFD - Reserved for user-space HWRM interface
56519 * * 0xFFFF - HWRM
56532 * specify that the function is a non-trusted VF of the parent PF.
56534 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56544 uint8_t unused0[4];
56603 * * 0x0-0xFFF8 - The function ID
56604 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56605 * * 0xFFFD - Reserved for user-space HWRM interface
56606 * * 0xFFFF - HWRM
56619 * specify that the function is a non-trusted VF of the parent PF.
56621 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56715 * * 0x0-0xFFF8 - The function ID
56716 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56717 * * 0xFFFD - Reserved for user-space HWRM interface
56718 * * 0xFFFF - HWRM
56731 * specify that the function is a non-trusted VF of the parent PF.
56733 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56807 * * 0x0-0xFFF8 - The function ID
56808 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56809 * * 0xFFFD - Reserved for user-space HWRM interface
56810 * * 0xFFFF - HWRM
56823 * specify that the function is a non-trusted VF of the parent PF.
56825 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56846 * For blktype CFA - CFA resource subtype. For definitions,
56848 * For blktype rxp, re_gparse, te_gparse -
56928 * * 0x0-0xFFF8 - The function ID
56929 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
56930 * * 0xFFFD - Reserved for user-space HWRM interface
56931 * * 0xFFFF - HWRM
56944 * specify that the function is a non-trusted VF of the parent PF.
56946 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
56972 * For blktype CFA - CFA resource subtype. For definitions,
56974 * For blktype rxp, re_gparse, te_gparse -
57065 * * 0x0-0xFFF8 - The function ID
57066 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57067 * * 0xFFFD - Reserved for user-space HWRM interface
57068 * * 0xFFFF - HWRM
57100 * specify that the function is a non-trusted VF of the parent PF.
57102 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57187 * * 0x0-0xFFF8 - The function ID
57188 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57189 * * 0xFFFD - Reserved for user-space HWRM interface
57190 * * 0xFFFF - HWRM
57222 * specify that the function is a non-trusted VF of the parent PF.
57224 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57306 * * 0x0-0xFFF8 - The function ID
57307 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57308 * * 0xFFFD - Reserved for user-space HWRM interface
57309 * * 0xFFFF - HWRM
57336 * specify that the function is a non-trusted VF of the parent PF.
57338 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57439 * * 0x0-0xFFF8 - The function ID
57440 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57441 * * 0xFFFD - Reserved for user-space HWRM interface
57442 * * 0xFFFF - HWRM
57455 * specify that the function is a non-trusted VF of the parent PF.
57457 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57505 /* Non-zero if this is the first allocation for the global ID. */
57508 uint8_t unused0[4];
57543 * * 0x0-0xFFF8 - The function ID
57544 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57545 * * 0xFFFD - Reserved for user-space HWRM interface
57546 * * 0xFFFF - HWRM
57559 * specify that the function is a non-trusted VF of the parent PF.
57561 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57593 uint8_t unused0[4];
57650 * * 0x0-0xFFF8 - The function ID
57651 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57652 * * 0xFFFD - Reserved for user-space HWRM interface
57653 * * 0xFFFF - HWRM
57680 * specify that the function is a non-trusted VF of the parent PF.
57682 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57711 uint8_t unused0[4];
57753 * * 0x0-0xFFF8 - The function ID
57754 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57755 * * 0xFFFD - Reserved for user-space HWRM interface
57756 * * 0xFFFF - HWRM
57783 * specify that the function is a non-trusted VF of the parent PF.
57785 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57864 * * 0x0-0xFFF8 - The function ID
57865 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57866 * * 0xFFFD - Reserved for user-space HWRM interface
57867 * * 0xFFFF - HWRM
57896 * specify that the function is a non-trusted VF of the parent PF.
57898 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
57983 * * 0x0-0xFFF8 - The function ID
57984 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
57985 * * 0xFFFD - Reserved for user-space HWRM interface
57986 * * 0xFFFF - HWRM
58013 * specify that the function is a non-trusted VF of the parent PF.
58015 * set to 0xffff. A non-trusted VF cannot specify a valid FID in this
58075 * * 0x0-0xFFF8 - The function ID
58076 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58077 * * 0xFFFD - Reserved for user-space HWRM interface
58078 * * 0xFFFF - HWRM
58163 * * 0x0-0xFFF8 - The function ID
58164 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58165 * * 0xFFFD - Reserved for user-space HWRM interface
58166 * * 0xFFFF - HWRM
58276 * * 0x0-0xFFF8 - The function ID
58277 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58278 * * 0xFFFD - Reserved for user-space HWRM interface
58279 * * 0xFFFF - HWRM
58344 * * 0x0-0xFFF8 - The function ID
58345 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58346 * * 0xFFFD - Reserved for user-space HWRM interface
58347 * * 0xFFFF - HWRM
58440 * * 0x0-0xFFF8 - The function ID
58441 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58442 * * 0xFFFD - Reserved for user-space HWRM interface
58443 * * 0xFFFF - HWRM
58479 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
58491 /* ULP Dynamic UPAR tunnel reserved 4 */
58522 * specific tunnel types that use layer 4 (e.g. UDP)
58529 * specific tunnel types that use layer 4 (e.g. UDP)
58606 * * 0x0-0xFFF8 - The function ID
58607 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58608 * * 0xFFFD - Reserved for user-space HWRM interface
58609 * * 0xFFFF - HWRM
58648 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
58660 /* ULP Dynamic UPAR tunnel reserved 4 */
58677 * specific tunnel types that use layer 4 (e.g. UDP)
58685 uint8_t unused_0[4];
58772 * * 0x0-0xFFF8 - The function ID
58773 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
58774 * * 0xFFFD - Reserved for user-space HWRM interface
58775 * * 0xFFFF - HWRM
58814 /* Generic Protocol Extension for VXLAN (VXLAN-GPE) */
58826 /* ULP Dynamic UPAR tunnel reserved 4 */
58845 uint8_t unused_0[4];
58993 * Count, in 4-byte (dword) units, of bytes
58999 * Count, in 4-byte (dword) units, of bytes
59011 * non-zero status value.
59020 * De-Compression/De-cryption Engine usage,
59049 * * 0x0-0xFFF8 - The function ID
59050 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59051 * * 0xFFFD - Reserved for user-space HWRM interface
59052 * * 0xFFFF - HWRM
59163 * * 0x0-0xFFF8 - The function ID
59164 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59165 * * 0xFFFD - Reserved for user-space HWRM interface
59166 * * 0xFFFF - HWRM
59178 uint8_t unused_0[4];
59228 * * 0x0-0xFFF8 - The function ID
59229 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59230 * * 0xFFFD - Reserved for user-space HWRM interface
59231 * * 0xFFFF - HWRM
59338 * * 0x0-0xFFF8 - The function ID
59339 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59340 * * 0xFFFD - Reserved for user-space HWRM interface
59341 * * 0xFFFF - HWRM
59452 * * 0x0-0xFFF8 - The function ID
59453 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59454 * * 0xFFFD - Reserved for user-space HWRM interface
59455 * * 0xFFFF - HWRM
59467 uint8_t unused_0[4];
59491 * Count, in 4-byte (dword) units, of bytes
59497 * Count, in 4-byte (dword) units, of bytes
59509 * non-zero status value.
59518 * De-Compression/De-cryption Engine usage,
59556 * * 0x0-0xFFF8 - The function ID
59557 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59558 * * 0xFFFD - Reserved for user-space HWRM interface
59559 * * 0xFFFF - HWRM
59571 uint8_t unused_0[4];
59619 * * 0x0-0xFFF8 - The function ID
59620 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59621 * * 0xFFFD - Reserved for user-space HWRM interface
59622 * * 0xFFFF - HWRM
59699 uint32_t pcie_ltssm_histogram[4];
59730 * * 0x0-0xFFF8 - The function ID
59731 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59732 * * 0xFFFD - Reserved for user-space HWRM interface
59733 * * 0xFFFF - HWRM
59807 /* Non-posted Header Flow Control credits available for the caller PF. */
59813 /* Non-Posted Data Flow Control credits available for the caller PF. */
59818 * Available Non-posted credit for target flow control reads or
59838 * the 4 tags for the caller PF. The unit of time recorded is in
59844 * of the 4 tags for the caller PF. The unit of time recorded is in
59917 * * 0x0-0xFFF8 - The function ID
59918 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
59919 * * 0xFFFD - Reserved for user-space HWRM interface
59920 * * 0xFFFF - HWRM
60010 * * 0x0-0xFFF8 - The function ID
60011 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
60012 * * 0xFFFD - Reserved for user-space HWRM interface
60013 * * 0xFFFF - HWRM
60034 * Host (in multi-host environment): This is only valid if requester
60039 * AP processor complex (in multi-host environment).
60046 * Host (in multi-host environment): This is only valid if requester
60055 * status is set to a non-0x8000 value to disambiguate reset pending
60093 uint8_t unused_0[4];
60152 * * 0x0-0xFFF8 - The function ID
60153 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
60154 * * 0xFFFD - Reserved for user-space HWRM interface
60155 * * 0xFFFF - HWRM
60176 * Host (in multi-host environment): This is only valid if requester
60181 * AP processor complex (in multi-host environment). Use host_idx to
60262 * * 0x0-0xFFF8 - The function ID
60263 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
60264 * * 0xFFFD - Reserved for user-space HWRM interface
60265 * * 0xFFFF - HWRM
60280 /* Current month of year (1-12) */
60282 /* Current day of month (1-31) */
60284 /* Current hour (0-23) */
60286 /* Current minute (0-59) */
60288 /* Current second (0-59) */
60291 /* Current millisecond (0-999) */
60300 uint8_t unused_1[4];
60348 * * 0x0-0xFFF8 - The function ID
60349 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
60350 * * 0xFFFD - Reserved for user-space HWRM interface
60351 * * 0xFFFF - HWRM
60379 /* Current month of year (1-12) */
60381 /* Current day of month (1-31) */
60383 /* Current hour (0-23) */
60385 /* Current minute (0-59) */
60387 /* Current second (0-59) */
60390 /* Current millisecond (0-999) */
60443 /* MSI-X vectors per VF table. */
60455 * This value indicates the count of 64-bit values that point to the next
60457 * a count of 64-bit words from the beginning of the current header.
60491 /* ETS priority 4 to TC map. */
60507 /* ETS TC 4 to bandwidth map. */
60532 /* ETS TC 4 to TSA map. */
60540 uint8_t unused_0[4];
60598 /* DCBX mode - IEEE or CEE. This is read only field. */
60715 /* TLV sub-type. */
60734 uint8_t unused_3[4];
60746 uint8_t unused_5[4];
60840 /* MSI-X vectors per VF for row 0 */
60844 /* MSI-X vectors per VF for row 1 */
60848 /* MSI-X vectors per VF for row 2 */
60852 /* MSI-X vectors per VF for row 3 */
60854 /* Starting VF for row 4 */
60856 /* MSI-X vectors per VF for row 4 */
60860 /* MSI-X vectors per VF for row 5 */
60864 /* MSI-X vectors per VF for row 6 */
60868 /* MSI-X vectors per VF for row 7 */
60895 * * 0x0-0xFFF8 - The function ID
60896 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
60897 * * 0xFFFD - Reserved for user-space HWRM interface
60898 * * 0xFFFF - HWRM
60988 * * 0x0-0xFFF8 - The function ID
60989 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
60990 * * 0xFFFD - Reserved for user-space HWRM interface
60991 * * 0xFFFF - HWRM
61109 * * 0x0-0xFFF8 - The function ID
61110 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61111 * * 0xFFFD - Reserved for user-space HWRM interface
61112 * * 0xFFFF - HWRM
61221 * * 0x0-0xFFF8 - The function ID
61222 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61223 * * 0xFFFD - Reserved for user-space HWRM interface
61224 * * 0xFFFF - HWRM
61245 uint8_t unused_0[4];
61309 * * 0x0-0xFFF8 - The function ID
61310 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61311 * * 0xFFFD - Reserved for user-space HWRM interface
61312 * * 0xFFFF - HWRM
61325 * enabled device-wide. When ECN is enabled on a multi-host system,
61329 * for ECN marking and steers ECN-capable packets to those queues.
61383 * * 0x0-0xFFF8 - The function ID
61384 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61385 * * 0xFFFD - Reserved for user-space HWRM interface
61386 * * 0xFFFF - HWRM
61410 /* When this bit is '1', ECN is enabled device-wide. */
61446 * * 0x0-0xFFF8 - The function ID
61447 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61448 * * 0xFFFD - Reserved for user-space HWRM interface
61449 * * 0xFFFF - HWRM
61594 * * 0x0-0xFFF8 - The function ID
61595 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61596 * * 0xFFFD - Reserved for user-space HWRM interface
61597 * * 0xFFFF - HWRM
61677 * * 0x0-0xFFF8 - The function ID
61678 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61679 * * 0xFFFD - Reserved for user-space HWRM interface
61680 * * 0xFFFF - HWRM
61696 * livepatch to existing firmware at run-time.
61726 /* 64-bit Host address of livepatch image for memory direct loading. */
61810 * * 0x0-0xFFF8 - The function ID
61811 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61812 * * 0xFFFD - Reserved for user-space HWRM interface
61813 * * 0xFFFF - HWRM
61891 uint8_t unused_0[4];
61969 * * 0x0-0xFFF8 - The function ID
61970 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
61971 * * 0xFFFD - Reserved for user-space HWRM interface
61972 * * 0xFFFF - HWRM
62035 uint8_t unused_0[4];
62070 * * 0x0-0xFFF8 - The function ID
62071 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62072 * * 0xFFFD - Reserved for user-space HWRM interface
62073 * * 0xFFFF - HWRM
62092 * in firmware if recovery-specific steps are also needed for the
62118 uint8_t unused_0[4];
62154 * * 0x0-0xFFF8 - The function ID
62155 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62156 * * 0xFFFD - Reserved for user-space HWRM interface
62157 * * 0xFFFF - HWRM
62183 uint8_t unused_0[4];
62218 * * 0x0-0xFFF8 - The function ID
62219 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62220 * * 0xFFFD - Reserved for user-space HWRM interface
62221 * * 0xFFFF - HWRM
62231 /* State backup page size and level. */
62246 /* State backup page size. */
62248 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_SFT 4
62249 /* 4KB. */
62250 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
62251 /* 8KB. */
62252 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
62253 /* 64KB. */
62254 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
62256 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
62258 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
62260 #define HWRM_FW_STATE_BACKUP_INPUT_BACKUP_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
62263 /* State backup page directory. */
62287 /* Data or control plane detected as non-quiesced */
62304 uint8_t unused_0[4];
62339 * * 0x0-0xFFF8 - The function ID
62340 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62341 * * 0xFFFD - Reserved for user-space HWRM interface
62342 * * 0xFFFF - HWRM
62352 /* State restore page size and level. */
62367 /* State restore page size. */
62369 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_SFT 4
62370 /* 4KB. */
62371 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
62372 /* 8KB. */
62373 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
62374 /* 64KB. */
62375 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
62377 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
62379 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
62381 #define HWRM_FW_STATE_RESTORE_INPUT_RESTORE_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
62384 /* State restore page directory. */
62458 * * 0x0-0xFFF8 - The function ID
62459 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62460 * * 0xFFFD - Reserved for user-space HWRM interface
62461 * * 0xFFFF - HWRM
62526 /* Read-Write */
62586 * * 0x0-0xFFF8 - The function ID
62587 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62588 * * 0xFFFD - Reserved for user-space HWRM interface
62589 * * 0xFFFF - HWRM
62609 * 0x0 - 0xFFF8 - Used for function ids
62610 * 0xFFF8 - 0xFFFE - Reserved for internal processors
62611 * 0xFFFF - HWRM
62662 * * 0x0-0xFFF8 - The function ID
62663 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62664 * * 0xFFFD - Reserved for user-space HWRM interface
62665 * * 0xFFFF - HWRM
62685 * 0x0 - 0xFFF8 - Used for function ids
62686 * 0xFFF8 - 0xFFFE - Reserved for internal processors
62687 * 0xFFFF - HWRM
62738 * * 0x0-0xFFF8 - The function ID
62739 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62740 * * 0xFFFD - Reserved for user-space HWRM interface
62741 * * 0xFFFF - HWRM
62754 * 0x0 - 0xFFF8 - Used for function ids
62755 * 0xFFF8 - 0xFFFE - Reserved for internal processors
62756 * 0xFFFF - HWRM
62762 * -1, then no CR completion shall be generated for the
62829 * * 0x0-0xFFF8 - The function ID
62830 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62831 * * 0xFFFD - Reserved for user-space HWRM interface
62832 * * 0xFFFF - HWRM
62845 * 0x0 - 0xFFF8 - Used for function ids
62846 * 0xFFF8 - 0xFFFE - Reserved for internal processors
62847 * 0xFFFF - Broadcast to all children VFs (only applicable when
62853 uint32_t encap_async_event_cmpl[4];
62901 * * 0x0-0xFFF8 - The function ID
62902 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
62903 * * 0xFFFD - Reserved for user-space HWRM interface
62904 * * 0xFFFF - HWRM
62975 * indicate a temperature range from -64 to +191. The actual
62977 * Example: A value of 0 represents a temperature of -64, a value of
62984 * indicate a temperature range from -64 to +191. The actual
62986 * Example: A value of 0 represents a temperature of -64, a value of
62993 * indicate a temperature range from -64 to +191. The actual
62995 * Example: A value of 0 represents a temperature of -64, a value of
63021 uint8_t unused_0[4];
63055 * * 0x0-0xFFF8 - The function ID
63056 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63057 * * 0xFFFD - Reserved for user-space HWRM interface
63058 * * 0xFFFF - HWRM
63131 * * 0x0-0xFFF8 - The function ID
63132 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63133 * * 0xFFFD - Reserved for user-space HWRM interface
63134 * * 0xFFFF - HWRM
63193 * * 0x0-0xFFF8 - The function ID
63194 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63195 * * 0xFFFD - Reserved for user-space HWRM interface
63196 * * 0xFFFF - HWRM
63269 * power_histogram_bucket_enum. Values saturate at the max 32-bit
63372 * * 0x0-0xFFF8 - The function ID
63373 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63374 * * 0xFFFD - Reserved for user-space HWRM interface
63375 * * 0xFFFF - HWRM
63419 /* This value represents a Wake-on-LAN type. */
63461 uint8_t unused_1[4];
63485 /* This value identifies a Wake-on-LAN (WoL) filter. */
63521 * * 0x0-0xFFF8 - The function ID
63522 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63523 * * 0xFFFD - Reserved for user-space HWRM interface
63524 * * 0xFFFF - HWRM
63604 * * 0x0-0xFFF8 - The function ID
63605 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63606 * * 0xFFFD - Reserved for user-space HWRM interface
63607 * * 0xFFFF - HWRM
63628 uint8_t unused_0[4];
63765 * * 0x0-0xFFF8 - The function ID
63766 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63767 * * 0xFFFD - Reserved for user-space HWRM interface
63768 * * 0xFFFF - HWRM
63813 * wake-up.
63825 uint8_t unused_0[4];
63859 * * 0x0-0xFFF8 - The function ID
63860 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63861 * * 0xFFFD - Reserved for user-space HWRM interface
63862 * * 0xFFFF - HWRM
63895 * This field, if not zero, contains the IEEE 802.3 CRC-32 checksum of
63897 * x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1
63934 * * 0x0-0xFFF8 - The function ID
63935 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
63936 * * 0xFFFD - Reserved for user-space HWRM interface
63937 * * 0xFFFF - HWRM
64000 * * 0x0-0xFFF8 - The function ID
64001 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64002 * * 0xFFFD - Reserved for user-space HWRM interface
64003 * * 0xFFFF - HWRM
64020 /* Indirect access type to on-chip data structures. */
64054 /* MHB registers (valid for multi-host environment) */
64056 /* PCIE global registers (valid for multi-host environment) */
64058 /* SOC registers (valid for multi-host environment) */
64066 * Three sub-types will be supported which will be specified
64068 * 1) sub-type CHECK(0) if ELOG is available in media.
64069 * 2) sub-type READ(1) a portion of the elog.
64070 * 3) sub-type ERASE(2) a portion of the elog.
64087 * sub-code, erase offset and erase size for soc_elog)
64137 * * 0x0-0xFFF8 - The function ID
64138 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64139 * * 0xFFFD - Reserved for user-space HWRM interface
64140 * * 0xFFFF - HWRM
64150 /* Indirect access type to on-chip data structures. */
64184 /* MHB registers (valid for multi-host environment) */
64186 /* PCIE global registers (valid for multi-host environment) */
64188 /* SOC registers (valid for multi-host environment) */
64206 uint8_t unused_1[4];
64258 * * 0x0-0xFFF8 - The function ID
64259 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64260 * * 0xFFFD - Reserved for user-space HWRM interface
64261 * * 0xFFFF - HWRM
64277 uint8_t unused_0[4];
64346 * * 0x0-0xFFF8 - The function ID
64347 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64348 * * 0xFFFD - Reserved for user-space HWRM interface
64349 * * 0xFFFF - HWRM
64410 * * 0x0-0xFFF8 - The function ID
64411 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64412 * * 0xFFFD - Reserved for user-space HWRM interface
64413 * * 0xFFFF - HWRM
64511 * * 0x0-0xFFF8 - The function ID
64512 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64513 * * 0xFFFD - Reserved for user-space HWRM interface
64514 * * 0xFFFF - HWRM
64557 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMSTERDAM 4
64583 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_ATLANTIC_CAPE_VERDE -4
64584 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_ATLANTIC_SOUTH_GEORGIA -8
64585 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_ARGENTINA_BUENOS_AIRES -12
64586 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_SAO_PAULO -12
64587 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_NEWFOUNDLAND -14
64588 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_BARBADOS -16
64589 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_CANCUN -20
64590 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_COSTA_RICA -24
64591 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_AMERICA_PHOENIX -28
64592 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_US_ARIZONA -28
64593 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_US_PACIFIC -32
64594 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_US_ALASKA -36
64595 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_PACIFIC_MARQUESAS -38
64596 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_PACIFIC_HAWAII -40
64597 #define HWRM_DBG_CRASHDUMP_HEADER_OUTPUT_UTC_OFFSET_PACIFIC_MIDWAY -44
64656 * * 0x0-0xFFF8 - The function ID
64657 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64658 * * 0xFFFD - Reserved for user-space HWRM interface
64659 * * 0xFFFF - HWRM
64678 * (without erasing any existing contents), re-allocate and
64679 * re-initialize new ones. In case where the crash dump feature
64734 * * 0x0-0xFFF8 - The function ID
64735 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64736 * * 0xFFFD - Reserved for user-space HWRM interface
64737 * * 0xFFFF - HWRM
64826 * * 0x0-0xFFF8 - The function ID
64827 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64828 * * 0xFFFD - Reserved for user-space HWRM interface
64829 * * 0xFFFF - HWRM
64973 * * 0x0-0xFFF8 - The function ID
64974 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
64975 * * 0xFFFD - Reserved for user-space HWRM interface
64976 * * 0xFFFF - HWRM
65003 /* page size. */
65006 /* 4KB. */
65008 /* 8KB. */
65010 /* 64KB. */
65117 * * 0x0-0xFFF8 - The function ID
65118 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65119 * * 0xFFFD - Reserved for user-space HWRM interface
65120 * * 0xFFFF - HWRM
65205 * * 0x0-0xFFF8 - The function ID
65206 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65207 * * 0xFFFD - Reserved for user-space HWRM interface
65208 * * 0xFFFF - HWRM
65263 * length: 0 - 23 bits represents the actual data without the pad.
65264 * flags: 24 - 31 bits represents indirect register ranges.
65265 * - bit 24: Set if registers in this segment are indirect accessed.
65273 /* Value in the partner register for indirect or multi-field registers. */
65302 * * 0x0-0xFFF8 - The function ID
65303 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65304 * * 0xFFFD - Reserved for user-space HWRM interface
65305 * * 0xFFFF - HWRM
65400 * * 0x0-0xFFF8 - The function ID
65401 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65402 * * 0xFFFD - Reserved for user-space HWRM interface
65403 * * 0xFFFF - HWRM
65437 * This bit must be '1' for 10-bit i2c addressing,
65438 * 7-bit addressing otherwise.
65505 * * 0x0-0xFFF8 - The function ID
65506 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65507 * * 0xFFFD - Reserved for user-space HWRM interface
65508 * * 0xFFFF - HWRM
65579 * * 0x0-0xFFF8 - The function ID
65580 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65581 * * 0xFFFD - Reserved for user-space HWRM interface
65582 * * 0xFFFF - HWRM
65668 * * 0x0-0xFFF8 - The function ID
65669 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65670 * * 0xFFFD - Reserved for user-space HWRM interface
65671 * * 0xFFFF - HWRM
65749 * * 0x0-0xFFF8 - The function ID
65750 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65751 * * 0xFFFD - Reserved for user-space HWRM interface
65752 * * 0xFFFF - HWRM
65769 * of 4
65787 /* Non-zero firmware timestamp */
65841 * * 0x0-0xFFF8 - The function ID
65842 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65843 * * 0xFFFD - Reserved for user-space HWRM interface
65844 * * 0xFFFF - HWRM
65871 /* Non-zero firmware timestamp */
65923 * * 0x0-0xFFF8 - The function ID
65924 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
65925 * * 0xFFFD - Reserved for user-space HWRM interface
65926 * * 0xFFFF - HWRM
65958 /* Non-zero firmware timestamp */
66010 * * 0x0-0xFFF8 - The function ID
66011 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66012 * * 0xFFFD - Reserved for user-space HWRM interface
66013 * * 0xFFFF - HWRM
66028 * usid. NOTE: when offset is zero, the first 6 32-bit
66029 * words may contain values for F0-F7 as well as the
66047 * F0-F7 code word indexes as well as the code word index for
66078 /* Non-zero firmware timestamp */
66120 * * 0x0-0xFFF8 - The function ID
66121 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66122 * * 0xFFFD - Reserved for user-space HWRM interface
66123 * * 0xFFFF - HWRM
66146 /* Non-zero firmware timestamp */
66206 * * 0x0-0xFFF8 - The function ID
66207 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66208 * * 0xFFFD - Reserved for user-space HWRM interface
66209 * * 0xFFFF - HWRM
66236 * value of -1 indicates that the USID is invalid. The invalid USID is
66256 /* Non-zero firmware timestamp */
66308 * * 0x0-0xFFF8 - The function ID
66309 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66310 * * 0xFFFD - Reserved for user-space HWRM interface
66311 * * 0xFFFF - HWRM
66379 /* Non-zero firmware timestamp */
66435 * * 0x0-0xFFF8 - The function ID
66436 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66437 * * 0xFFFD - Reserved for user-space HWRM interface
66438 * * 0xFFFF - HWRM
66473 /* Non-zero firmware timestamp */
66531 * * 0x0-0xFFF8 - The function ID
66532 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66533 * * 0xFFFD - Reserved for user-space HWRM interface
66534 * * 0xFFFF - HWRM
66585 * has DMA-ed 8192 bytes to the host buffer, then this field has a
66587 * writes the last page of the host buffer
66624 * * 0x0-0xFFF8 - The function ID
66625 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66626 * * 0xFFFD - Reserved for user-space HWRM interface
66627 * * 0xFFFF - HWRM
66638 * 64-bit Host Source Address.
66643 * 32-bit Destination Address.
66644 * This is the NVRAM byte-offset where the source data will be written
66654 * writes for NIC or Security SoC non-volatile storage on the
66656 * Security SoC non-volatile storage on the device.
66707 * * 0x0-0xFFF8 - The function ID
66708 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66709 * * 0xFFFD - Reserved for user-space HWRM interface
66710 * * 0xFFFF - HWRM
66721 * 64-bit Host Destination Address.
66725 /* The 0-based index of the directory entry. */
66728 /* The NVRAM byte-offset to read from. */
66732 uint8_t unused_1[4];
66780 * * 0x0-0xFFF8 - The function ID
66781 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66782 * * 0xFFFD - Reserved for user-space HWRM interface
66783 * * 0xFFFF - HWRM
66794 * 64-bit Host Destination Address.
66798 /* 32-bit NVRAM byte-offset to read from. */
66806 * read for NIC or Security SoC non-volatile storage on the
66808 * SoC non-volatile storage on the device.
66859 * * 0x0-0xFFF8 - The function ID
66860 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66861 * * 0xFFFD - Reserved for user-space HWRM interface
66862 * * 0xFFFF - HWRM
66873 * 64-bit Host Destination Address.
66924 * * 0x0-0xFFF8 - The function ID
66925 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66926 * * 0xFFFD - Reserved for user-space HWRM interface
66927 * * 0xFFFF - HWRM
66988 * * 0x0-0xFFF8 - The function ID
66989 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
66990 * * 0xFFFD - Reserved for user-space HWRM interface
66991 * * 0xFFFF - HWRM
67002 * 64-bit Host Source Address.
67013 * The 0-based instance of the combined Directory Entry Type and
67066 * for an item's data is to pre-allocate extra storage (padding) to
67073 * 32-bit offset of data blob from where data is being written.
67074 * Only valid for batch mode. For non-batch writes 'dont care'.
67078 * Length of data to be written.Should be non-zero.
67079 * Only valid for batch mode. For non-batch writes 'dont care'.
67158 * * 0x0-0xFFF8 - The function ID
67159 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67160 * * 0xFFFD - Reserved for user-space HWRM interface
67161 * * 0xFFFF - HWRM
67172 * 64-bit Host Source Address.
67176 /* 16-bit directory entry index. */
67195 /* 32-bit NVRAM byte-offset to modify content from. */
67199 * be non-zero.
67202 uint8_t unused_1[4];
67250 * * 0x0-0xFFF8 - The function ID
67251 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67252 * * 0xFFFD - Reserved for user-space HWRM interface
67253 * * 0xFFFF - HWRM
67354 * * 0x0-0xFFF8 - The function ID
67355 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67356 * * 0xFFFD - Reserved for user-space HWRM interface
67357 * * 0xFFFF - HWRM
67417 * * 0x0-0xFFF8 - The function ID
67418 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67419 * * 0xFFFD - Reserved for user-space HWRM interface
67420 * * 0xFFFF - HWRM
67592 * * 0x0-0xFFF8 - The function ID
67593 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67594 * * 0xFFFD - Reserved for user-space HWRM interface
67595 * * 0xFFFF - HWRM
67615 * The (0-based) instance of this Directory Type.
67680 * * 0x0-0xFFF8 - The function ID
67681 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67682 * * 0xFFFD - Reserved for user-space HWRM interface
67683 * * 0xFFFF - HWRM
67758 * * 0x0-0xFFF8 - The function ID
67759 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67760 * * 0xFFFD - Reserved for user-space HWRM interface
67761 * * 0xFFFF - HWRM
67775 * will be over-ridden (i.e. 'create' or 'replace' will be treated
67833 * Bit-mask of successfully installed items.
67834 * Bit-0 corresponding to the first packaged item, Bit-1 for the second
67919 * A controller power reset (e.g. system power-cycle) is
67927 uint8_t unused_0[4];
67952 /* Firmware update failed due to Anti-rollback. */
67983 * * 0x0-0xFFF8 - The function ID
67984 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
67985 * * 0xFFFD - Reserved for user-space HWRM interface
67986 * * 0xFFFF - HWRM
68059 * * 0x0-0xFFF8 - The function ID
68060 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68061 * * 0xFFFD - Reserved for user-space HWRM interface
68062 * * 0xFFFF - HWRM
68100 /* index for the 4th dimensions */
68193 * * 0x0-0xFFF8 - The function ID
68194 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68195 * * 0xFFFD - Reserved for user-space HWRM interface
68196 * * 0xFFFF - HWRM
68234 /* index for the 4th dimensions */
68247 /* one-way encryption. */
68255 #define HWRM_NVM_SET_VARIABLE_INPUT_FLAGS_FLAGS_UNUSED_0_SFT 4
68324 * * 0x0-0xFFF8 - The function ID
68325 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68326 * * 0xFFFD - Reserved for user-space HWRM interface
68327 * * 0xFFFF - HWRM
68365 /* index for the 4th dimensions */
68441 * * 0x0-0xFFF8 - The function ID
68442 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68443 * * 0xFFFD - Reserved for user-space HWRM interface
68444 * * 0xFFFF - HWRM
68459 * If the selection field is non-zero, only the selected data are
68466 * If the selection field is non-zero, only the selected data are
68482 uint8_t unused_1[4];
68556 * * 0x0-0xFFF8 - The function ID
68557 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68558 * * 0xFFFD - Reserved for user-space HWRM interface
68559 * * 0xFFFF - HWRM
68628 * * 0x0-0xFFF8 - The function ID
68629 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68630 * * 0xFFFD - Reserved for user-space HWRM interface
68631 * * 0xFFFF - HWRM
68644 uint8_t unused_0[4];
68708 * * 0x0-0xFFF8 - The function ID
68709 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68710 * * 0xFFFD - Reserved for user-space HWRM interface
68711 * * 0xFFFF - HWRM
68781 * * 0x0-0xFFF8 - The function ID
68782 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
68783 * * 0xFFFD - Reserved for user-space HWRM interface
68784 * * 0xFFFF - HWRM
68809 uint8_t unused_0[4];
68836 #define ROCE_SP_HSI_VERSION_UPDATE 4
68837 #define ROCE_SP_HSI_VERSION_STR "1.8.4"
68843 #define ROCE_SP_HSI_NA_SIGNATURE ((uint32_t)(-1))
68914 * De-allocate key command frees a MR/MW entry associated with the
68920 /* Deregister MR command de-registers memory from the specified MR. */
68943 /* De-initialize firmware command deinitializes the firmware. */
68951 * - Max QP, CQ, MR+MW, SRQ per PF
68952 * - Max QP, CQ, MR+MW, SRQ per VF
69007 * support the pseudo-static QP allocation feature.
69038 /* Size of the command in 16-byte units. */
69044 /* Size of the response buffer in 16-byte units. */
69114 /* Size of the response buffer in 16-byte units. */
69208 * SQ page size.
69212 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_SFT 4
69213 /* 4KB. */
69214 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69215 /* 8KB. */
69216 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69217 /* 64KB. */
69218 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69220 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69222 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69224 #define CREATE_QP_BATCH_DATA_SQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69244 * RQ page size.
69248 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_SFT 4
69249 /* 4KB. */
69250 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69251 /* 8KB. */
69252 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69253 /* 64KB. */
69254 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69256 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69258 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69260 #define CREATE_QP_BATCH_DATA_RQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69263 /* Doorbell page index. */
69266 * When the SQ is configured to use variable-size WQE, 'sq_size'
69268 * to use fixed-size WQE, 'sq_size' denotes the max number of SQ WQEs.
69275 * Max send SGEs per SWQE. This is only applicable to fixed-size
69276 * WQE support. On variable-size WQE, this is ignored.
69281 * Offset of First WQE in the first SQ page, in 128 byte units.
69285 #define CREATE_QP_BATCH_DATA_SQ_FWO_SFT 4
69289 * On chips with variable-size WQE support, a value of zero implies
69295 * Offset of First WQE in the first RQ page, in 128 byte units.
69299 #define CREATE_QP_BATCH_DATA_RQ_FWO_SFT 4
69329 * xid to use for the non-QP1 QP.
69347 * When the SQ is configured to use variable-size WQEs, the SQ size is
69439 /* Number of received ECN-marked packets. */
69479 /* Size of the command in 16-byte units. */
69485 /* Size of the response buffer in 16-byte units. */
69559 /* Size of the command in 16-byte units. */
69584 /* Size of the response buffer in 16-byte units. */
69603 /* QPC page size. */
69605 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT 4
69606 /* 4KB. */
69607 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69608 /* 8KB. */
69609 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69610 /* 64KB. */
69611 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69613 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69615 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69617 #define CMDQ_INITIALIZE_FW_QPC_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69633 /* MRW page size. */
69635 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_SFT 4
69636 /* 4KB. */
69637 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69638 /* 8KB. */
69639 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69640 /* 64KB. */
69641 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69643 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69645 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69647 #define CMDQ_INITIALIZE_FW_MRW_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69663 /* SRQ page size. */
69665 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_SFT 4
69666 /* 4KB. */
69667 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69668 /* 8KB. */
69669 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69670 /* 64KB. */
69671 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69673 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69675 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69677 #define CMDQ_INITIALIZE_FW_SRQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69693 /* CQ page size. */
69695 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_SFT 4
69696 /* 4KB. */
69697 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69698 /* 8KB. */
69699 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69700 /* 64KB. */
69701 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69703 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69705 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69707 #define CMDQ_INITIALIZE_FW_CQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69723 /* TQM page size. */
69725 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_SFT 4
69726 /* 4KB. */
69727 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69728 /* 8KB. */
69729 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69730 /* 64KB. */
69731 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69733 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69735 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69737 #define CMDQ_INITIALIZE_FW_TQM_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69753 /* TIM page size. */
69755 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_SFT 4
69756 /* 4KB. */
69757 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
69758 /* 8KB. */
69759 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
69760 /* 64KB. */
69761 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
69763 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
69765 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
69767 #define CMDQ_INITIALIZE_FW_TIM_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
69771 * Log base 2 of DBR page size - 12. 0 for 4KB. HW supported values
69776 /* 4KB. */
69778 /* 8KB. */
69780 /* 16KB. */
69782 /* 32KB. */
69784 /* 64KB. */
69786 /* 128KB. */
69788 /* 256KB. */
69790 /* 512KB. */
69796 /* 4MB. */
69811 #define CMDQ_INITIALIZE_FW_RSVD_SFT 4
69812 /* Kernel notification queue page directory. */
69814 /* MRW page directory. */
69816 /* SRQ page directory. */
69818 /* CQ page directory. */
69820 /* TQM page directory. */
69822 /* TIM page directory. */
69948 /* De-initialize firmware command deinitializes the firmware. */
69951 /* Size of the command in 16-byte units. */
69957 /* Size of the response buffer in 16-byte units. */
69994 /* De-initialize firmware command response. */
70016 /* Size of the command in 16-byte units. */
70022 /* Size of the response buffer in 16-byte units. */
70109 * SQ page size.
70113 #define CMDQ_CREATE_QP_SQ_PG_SIZE_SFT 4
70114 /* 4KB. */
70115 #define CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
70116 /* 8KB. */
70117 #define CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
70118 /* 64KB. */
70119 #define CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
70121 #define CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
70123 #define CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
70125 #define CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
70145 * RQ page size.
70149 #define CMDQ_CREATE_QP_RQ_PG_SIZE_SFT 4
70150 /* 4KB. */
70151 #define CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
70152 /* 8KB. */
70153 #define CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
70154 /* 64KB. */
70155 #define CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
70157 #define CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
70159 #define CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
70161 #define CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
70164 /* Doorbell page index. */
70167 * When the SQ is configured to use variable-size WQE, 'sq_size'
70169 * to use fixed-size WQE, 'sq_size' denotes the max number of SQ WQEs.
70176 * Max send SGEs per SWQE. This is only applicable to fixed-size
70177 * WQE support. On variable-size WQE, this is ignored.
70182 * Offset of First WQE in the first SQ page, in 128 byte units.
70186 #define CMDQ_CREATE_QP_SQ_FWO_SFT 4
70190 * On chips with variable-size WQE support, a value of zero implies
70196 * Offset of First WQE in the first RQ page, in 128 byte units.
70200 #define CMDQ_CREATE_QP_RQ_FWO_SFT 4
70230 * xid to use for the non-QP1 QP.
70248 * When the SQ is configured to use variable-size WQEs, the SQ size is
70326 /* Size of the command in 16-byte units. */
70332 /* Size of the response buffer in 16-byte units. */
70395 /* Size of the command in 16-byte units. */
70408 /* Size of the response buffer in 16-byte units. */
70548 uint32_t dgid[4];
70578 #define CMDQ_MODIFY_QP_PATH_MTU_SFT 4
70580 #define CMDQ_MODIFY_QP_PATH_MTU_MTU_256 (UINT32_C(0x0) << 4)
70582 #define CMDQ_MODIFY_QP_PATH_MTU_MTU_512 (UINT32_C(0x1) << 4)
70584 #define CMDQ_MODIFY_QP_PATH_MTU_MTU_1024 (UINT32_C(0x2) << 4)
70586 #define CMDQ_MODIFY_QP_PATH_MTU_MTU_2048 (UINT32_C(0x3) << 4)
70588 #define CMDQ_MODIFY_QP_PATH_MTU_MTU_4096 (UINT32_C(0x4) << 4)
70590 #define CMDQ_MODIFY_QP_PATH_MTU_MTU_8192 (UINT32_C(0x5) << 4)
70634 /* VLAN DEI field - Drop Eligibility Indicator. */
70636 /* VLAN PCP field - Priority Code Point. */
70710 * index into the push page where the QP has been mapped.
70716 * for first push operation. 0 - ping buffer, 1 - pong buffer.
70737 /* Size of the command in 16-byte units. */
70743 /* Size of the response buffer in 16-byte units. */
70773 /* Side buffer size in 16-byte units */
70805 /* Size of the response buffer in 16-byte units. */
70857 uint32_t dgid[4];
70937 /* VLAN DEI field - Drop Eligibility Indicator. */
70939 /* VLAN PCP field - Priority Code Point. */
70960 /* Size of the command in 16-byte units. */
70966 /* Size of the response buffer in 16-byte units. */
71012 /* Side buffer size in 16-byte units */
71049 /* Size of the response buffer in 16-byte units. */
71075 #define CREQ_QUERY_QP_EXTEND_RESP_SB_UNUSED4_SFT 4
71094 uint32_t dgid[4];
71150 * Global TLV range: `0 - (63k-1)`
71152 * Local TLV range: `63k - (64k-1)`
71163 * including all tlvs and extension data in 16-byte units.
71178 /* Size of the response buffer in 16-byte units. */
71204 #define CREQ_QUERY_QP_EXTEND_RESP_SB_TLV_UNUSED4_SFT 4
71223 uint32_t dgid[4];
71245 /* Size of the command in 16-byte units. */
71253 /* Size of the response buffer in 16-byte units. */
71274 /* page size. */
71277 /* 4KB. */
71279 /* 8KB. */
71281 /* 64KB. */
71297 /* unused4 is 4 b */
71303 /* Offset of first WQE in the first page of SRQ, in 128 byte units */
71312 /* Doorbell page index. */
71375 /* Size of the command in 16-byte units. */
71381 /* Size of the response buffer in 16-byte units. */
71449 /* Size of the command in 16-byte units. */
71455 /* Size of the response buffer in 16-byte units. */
71485 /* Side buffer size in 16-byte units */
71517 /* Size of the response buffer in 16-byte units. */
71526 uint32_t data[4];
71542 /* Size of the command in 16-byte units. */
71565 * -cq_size field must be 1
71566 * -disable_cq_overflow_detection flag must be true.
71567 * -the CQ will never be armed.
71568 * -the consumer index of CQ will never be changed
71578 /* Size of the response buffer in 16-byte units. */
71599 /* page size. */
71602 /* 4KB. */
71604 /* 8KB. */
71606 /* 64KB. */
71622 /* Offset of first CQE in the first Page, in 32 byte units */
71625 /* Doorbell page index. */
71722 /* Size of the command in 16-byte units. */
71728 /* Size of the response buffer in 16-byte units. */
71783 * event for the CQ (including firmware-generated CQ error
71803 /* Size of the command in 16-byte units. */
71809 /* Size of the response buffer in 16-byte units. */
71830 /* page size. */
71833 /* 4KB. */
71835 /* 8KB. */
71837 /* 64KB. */
71851 /* Offset of first CQE in the first Page, in 32 byte units */
71906 /* Size of the command in 16-byte units. */
71923 /* Size of the response buffer in 16-byte units. */
71934 /* Offset of first CQE in the first page, in 32 byte units */
71936 /* Doorbell page index */
71950 /* Offset of first CQE in the first Page, in 32 byte units */
71953 /* Doorbell page index. */
72018 /* Size of the command in 16-byte units. */
72024 /* Size of the response buffer in 16-byte units. */
72112 * De-allocate key command frees a MR/MW entry associated with the
72117 /* Size of the command in 16-byte units. */
72123 /* Size of the response buffer in 16-byte units. */
72143 /* unused4 is 4 b */
72145 #define CMDQ_DEALLOCATE_KEY_UNUSED4_SFT 4
72183 /* De-allocate key command response. */
72190 * non-zero HWID of a region this window was bound to (without the
72191 * 8-bit key portion). The host may check if the region is lingering in
72215 /* Size of the command in 16-byte units. */
72236 /* Size of the response buffer in 16-byte units. */
72256 * Log base 2 of page size; 12 is the minimum for 4KB. HW supported
72261 /* 4KB. */
72263 /* 8KB. */
72265 /* 64KB. */
72267 /* 256KB. */
72273 /* 4MB. */
72296 * Log base 2 of PBL page size; 12 is the minimum for 4KB. HW
72301 /* 4KB. */
72303 /* 8KB. */
72305 /* 64KB. */
72307 /* 256KB. */
72313 /* 4MB. */
72328 /* Page table of the MR memory. */
72388 /* Deregister MR command de-registers memory from the specified MR. */
72391 /* Size of the command in 16-byte units. */
72397 /* Size of the response buffer in 16-byte units. */
72465 /* Size of the command in 16-byte units. */
72471 /* Size of the response buffer in 16-byte units. */
72477 uint32_t gid[4];
72523 * instead of per-function.
72579 /* Size of the command in 16-byte units. */
72585 /* Size of the response buffer in 16-byte units. */
72645 /* Size of the command in 16-byte units. */
72651 /* Size of the response buffer in 16-byte units. */
72657 uint32_t gid[4];
72701 * instead of per-function.
72757 /* Size of the command in 16-byte units. */
72763 /* Size of the response buffer in 16-byte units. */
72794 /* Side buffer size in 16-byte units */
72826 /* Size of the response buffer in 16-byte units. */
72830 uint32_t gid[4];
72885 /* Size of the command in 16-byte units. */
72891 /* Size of the response buffer in 16-byte units. */
72926 /* SQ page size. */
72928 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT 4
72929 /* 4KB. */
72930 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
72931 /* 8KB. */
72932 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
72933 /* 64KB. */
72934 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
72936 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
72938 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
72940 #define CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
72956 /* RQ page size. */
72958 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT 4
72959 /* 4KB. */
72960 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K (UINT32_C(0x0) << 4)
72961 /* 8KB. */
72962 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K (UINT32_C(0x1) << 4)
72963 /* 64KB. */
72964 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K (UINT32_C(0x2) << 4)
72966 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M (UINT32_C(0x3) << 4)
72968 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M (UINT32_C(0x4) << 4)
72970 #define CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G (UINT32_C(0x5) << 4)
72973 /* Doorbell page index. */
72983 /* Offset of First WQE in the first SQ page, in 128 byte units */
72985 #define CMDQ_CREATE_QP1_SQ_FWO_SFT 4
72990 /* Offset of First WQE in the first RQ page, in 128 byte units */
72992 #define CMDQ_CREATE_QP1_RQ_FWO_SFT 4
73057 /* Size of the command in 16-byte units. */
73063 /* Size of the response buffer in 16-byte units. */
73123 /* Size of the command in 16-byte units. */
73129 /* Size of the response buffer in 16-byte units. */
73137 uint32_t dgid[4];
73220 /* Size of the command in 16-byte units. */
73226 /* Size of the response buffer in 16-byte units. */
73286 /* Size of the command in 16-byte units. */
73306 /* Size of the response buffer in 16-byte units. */
73345 /* Side buffer size in 16-byte units */
73377 /* Size of the response buffer in 16-byte units. */
73487 /* Size of the command in 16-byte units. */
73507 /* Size of the response buffer in 16-byte units. */
73546 /* Side buffer size in 16-byte units */
73578 /* Size of the response buffer in 16-byte units. */
73649 /* Number of received ECN-marked RoCE packets. The counter is per port. */
73742 /* Size of the command in 16-byte units. */
73748 /* Size of the response buffer in 16-byte units. */
73775 /* Side buffer size in 16-byte units */
73807 /* Size of the response buffer in 16-byte units. */
73816 * -excludes the QP1 count.
73817 * -includes the count of QPs that can be migrated from the other PF
73864 * and are enabled on a per-QP basis via `create_qp`.
73898 * - QP context ID space is pseudo-static partitioned across PFs.
73899 * - An application can use a predetermined
73901 * - For 2-port adapters, the application can migrate the QP context
73909 * on-chip queue memory. The host driver should not allocate memory
73925 * Max SGEs per QP WQE supported. On chips with variable-size WQE
73954 * Max inline data supported. On chips with variable-size WQE support,
73967 * An array of 48 8-bit values to specify allocation multiplier for TQM
73971 * to page size) of physical memory for non-zero slots and map the
73973 * 3 non-zero values in this array, their values are 16, 16, 12.
73978 /* Max Doorbell page indices supported. */
73980 /* Max SGEs per QP WQE supported in the variable-size WQE mode. */
73997 * These contexts are assigned on a per-QP, per-group of QPs
73998 * or per-function basis via `create_qp`, `create_qp_batch`
74013 /* Max inline data supported in the variable-size WQE mode. */
74044 * relaxed-ordering enabled or disabled.
74049 #define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_SFT 4
74051 #define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_HOST_PSN_TABLE (UINT32_C(0x0) << 4)
74053 #define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_HOST_MSN_TABLE (UINT32_C(0x1) << 4)
74058 #define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_IQM_MSN_TABLE (UINT32_C(0x2) << 4)
74092 * - Max QP, CQ, MR+MW, SRQ per PF
74093 * - Max QP, CQ, MR+MW, SRQ per VF
74097 /* Size of the command in 16-byte units. */
74108 /* Size of the response buffer in 16-byte units. */
74228 /* Size of the command in 16-byte units. */
74234 /* Size of the response buffer in 16-byte units. */
74293 /* Size of the command in 16-byte units. */
74299 /* Size of the response buffer in 16-byte units. */
74316 * without a header), and resp_size should be set to 4 (64/16)
74326 * without a header), and resp_size should be set to 4 (64/16)
74386 /* Size of the command in 16-byte units. */
74392 /* Size of the response buffer in 16-byte units. */
74461 /* Size of the command in 16-byte units. */
74467 /* Size of the response buffer in 16-byte units. */
74494 /* Side buffer size in 16-byte units */
74526 /* Size of the response buffer in 16-byte units. */
74646 * Global TLV range: `0 - (63k-1)`
74648 * Local TLV range: `63k - (64k-1)`
74659 * including all tlvs and extension data in 16-byte units.
74674 /* Size of the response buffer in 16-byte units. */
74789 * Global TLV range: `0 - (63k-1)`
74791 * Local TLV range: `63k - (64k-1)`
74810 * is 0 - 1023.
74822 * 1-6: TR is updated if QPC. rtts_with_cnps <= tr_update_cycles
74866 * ECN-Capable Transport (ECT) codepoints supported include:
74872 /* ECN Capable Transport-1 */
74874 /* ECN Capable Transport-0 */
75041 * Global TLV range: `0 - (63k-1)`
75043 * Local TLV range: `63k - (64k-1)`
75089 /* Size of the command in 16-byte units. */
75095 /* Size of the response buffer in 16-byte units. */
75268 * Global TLV range: `0 - (63k-1)`
75270 * Local TLV range: `63k - (64k-1)`
75281 * extension data in 16-byte units.
75290 /* Size of the command in 16-byte units. */
75296 /* Size of the response buffer in 16-byte units. */
75466 * Global TLV range: `0 - (63k-1)`
75468 * Local TLV range: `63k - (64k-1)`
75640 * is 0 - 1023.
75652 * 1-6: TR is updated if QPC. rtts_with_cnps <= tr_update_cycles
75696 * ECN-Capable Transport (ECT) codepoints supported include:
75702 /* ECN Capable Transport-1 */
75704 /* ECN Capable Transport-0 */
75871 * Global TLV range: `0 - (63k-1)`
75873 * Local TLV range: `63k - (64k-1)`
75976 /* Size of the command in 16-byte units. */
75982 /* Size of the response buffer in 16-byte units. */
76009 /* rsvd2 is 4 b */
76011 #define CMDQ_SET_LINK_AGGR_MODE_RSVD2_SFT 4
76025 /* Stat context IDs for all 4 ports. */
76026 uint16_t stat_ctx_id[4];
76078 /* Size of the command in 16-byte units. */
76084 /* Size of the response buffer in 16-byte units. */
76092 * Command request length (up to 4K). An optional address of the extended
76111 /* Size of the command in 16-byte units. */
76117 /* Size of the response buffer in 16-byte units. */
76126 /* Length to read, up to 4K */
76144 /* Size of the command in 16-byte units. */
76150 /* Size of the response buffer in 16-byte units. */
76185 * support the pseudo-static QP allocation feature.
76189 /* Size of the command in 16-byte units. */
76195 /* Size of the response buffer in 16-byte units. */
76213 /* unused4 is 4 b */
76215 #define CMDQ_ORCHESTRATE_QID_MIGRATION_UNUSED4_SFT 4
76270 /* Size of the command in 16-byte units. */
76276 /* Size of the response buffer in 16-byte units. */
76289 * Host DMA address of the array of per-QP parameters.
76290 * Per-QP parameters are identical to those of the
76354 /* Size of the command in 16-byte units. */
76360 /* Size of the response buffer in 16-byte units. */
76434 /* Size of the command in 16-byte units. */
76440 /* Size of the response buffer in 16-byte units. */
76514 /* Size of the command in 16-byte units. */
76520 /* Size of the response buffer in 16-byte units. */
76585 /* Size of the command in 16-byte units. */
76591 /* Size of the response buffer in 16-byte units. */
76623 /* Side buffer size in 16-byte units */
76655 /* Size of the response buffer in 16-byte units. */
76726 /* Number of received ECN-marked packets. */
76902 /* De-allocate key command response. */
76926 /* De-initialize firmware command response. */
77028 * NAK arrival. When NAK code is 4, Invalid RD Request.
77070 * * Domain error MW - When QP's PD does not match MW PD.
77071 * * Domain error MR - When QP's PD does not match parent MR's
77079 * * A fast register request was performed on a non-
77084 * that does not have a page list allocated (has not been
77090 * * Domain error - when QP's PD does not match PMR PD.
77098 * * An invalidate was performed against a non-physical MR.
77179 * has priority over the non-error case that occurs when TWE
77560 * FR-PMR (Fast Register Physical Memory Region)
77572 * FR-PPMR (Fast Register Proxy Physical Memory Region)
77640 * FR-PMR (Fast Register Physical Memory Region) V3
77664 * In backward-compatible modes there can be 2, 4 or 6 SGEs (based on
77665 * the mode). In variable-sized WQE mode there can be 0-30 SGE
77689 * Size of SGE in bytes; Based on page size of the system the
77758 * For variable-size WQEs, this field indicates the starting
77760 * In backward-compatible mode, this is the starting WQE index.
77853 /* This field represents a 32-bit total data length, in bytes. */
77861 * When in the SQ of a non-UD QP, this field is reserved and
77869 * When in the SQ of a non-UD QP, this field is reserved and
77885 * This field specifies a 24-bit timestamp that can be passed
77989 /* This field represents a 32-bit total data length, in bytes. */
77997 * When in the SQ of a non-UD QP, this field is reserved and
78005 * When in the SQ of a non-UD QP, this field is reserved and
78021 * This field specifies a 24-bit timestamp that can be passed
78151 * This field represents a 32-bit total data length, in bytes.
78157 * This value is action meta-data that defines CFA edit operations
78199 * - meta[17:16] - TPID select value (0 = 0x8100).
78200 * - meta[15:12] - PRI/DE value.
78201 * - meta[11:0] - VID value.
78209 * This field specifies a 24-bit timestamp that can be passed
78348 * This field represents a 32-bit total data length, in bytes.
78354 * This value is action meta-data that defines CFA edit operations
78396 * - meta[17:16] - TPID select value (0 = 0x8100).
78397 * - meta[15:12] - PRI/DE value.
78398 * - meta[11:0] - VID value.
78406 * This field specifies a 24-bit timestamp that can be passed
78494 * Immediate data - valid for RDMA Write with immediate and
78511 * This field specifies a 24-bit timestamp that can be passed
78608 * Immediate data - valid for RDMA Write with immediate and
78625 * This field specifies a 24-bit timestamp that can be passed
78923 /* FR-PMR SQ WQE */
78930 * FR-PMR (Fast Register Physical Memory Region)
78986 /* Page size. 0 for 4KB page size, ... to 8TB. */
78989 /* Page size is 4KB. */
78991 /* Page size is 8KB. */
78993 /* Page size is 16KB. */
78995 /* Page size is 32KB. */
78997 /* Page size is 64KB. */
78999 /* Page size is 128KB. */
79001 /* Page size is 256KB. */
79003 /* Page size is 512KB. */
79005 /* Page size is 1MB. */
79007 /* Page size is 2MB. */
79009 /* Page size is 4MB. */
79011 /* Page size is 8MB. */
79013 /* Page size is 16MB. */
79015 /* Page size is 32MB. */
79017 /* Page size is 64MB. */
79019 /* Page size is 128MB. */
79021 /* Page size is 256MB. */
79023 /* Page size is 512MB. */
79025 /* Page size is 1GB. */
79027 /* Page size is 2GB. */
79029 /* Page size is 4GB. */
79031 /* Page size is 8GB. */
79033 /* Page size is 16GB. */
79035 /* Page size is 32GB. */
79037 /* Page size is 64GB. */
79039 /* Page size is 128GB. */
79041 /* Page size is 256GB. */
79043 /* Page size is 512GB. */
79045 /* Page size is 1TB. */
79047 /* Page size is 2TB. */
79049 /* Page size is 4TB. */
79051 /* Page size is 8TB. */
79067 /* PBL page size. 0 for 4KB page size, ... to 8TB. */
79070 /* Page size is 4KB. */
79072 /* Page size is 8KB. */
79074 /* Page size is 16KB. */
79076 /* Page size is 32KB. */
79078 /* Page size is 64KB. */
79080 /* Page size is 128KB. */
79082 /* Page size is 256KB. */
79084 /* Page size is 512KB. */
79086 /* Page size is 1MB. */
79088 /* Page size is 2MB. */
79090 /* Page size is 4MB. */
79092 /* Page size is 8MB. */
79094 /* Page size is 16MB. */
79096 /* Page size is 32MB. */
79098 /* Page size is 64MB. */
79100 /* Page size is 128MB. */
79102 /* Page size is 256MB. */
79104 /* Page size is 512MB. */
79106 /* Page size is 1GB. */
79108 /* Page size is 2GB. */
79110 /* Page size is 4GB. */
79112 /* Page size is 8GB. */
79114 /* Page size is 16GB. */
79116 /* Page size is 32GB. */
79118 /* Page size is 64GB. */
79120 /* Page size is 128GB. */
79122 /* Page size is 256GB. */
79124 /* Page size is 512GB. */
79126 /* Page size is 1TB. */
79128 /* Page size is 2TB. */
79130 /* Page size is 4TB. */
79132 /* Page size is 8TB. */
79145 * physical address. The PBL points to a physical page that
79151 * physical address. The PBL points to a physical page that
79162 /* The data field for FR-PMR is not used. */
79166 /* FR-PMR SQ WQE header. */
79173 * FR-PMR (Fast Register Physical Memory Region)
79229 /* Page size. 0 for 4KB page size, ... to 8TB. */
79232 /* Page size is 4KB. */
79234 /* Page size is 8KB. */
79236 /* Page size is 16KB. */
79238 /* Page size is 32KB. */
79240 /* Page size is 64KB. */
79242 /* Page size is 128KB. */
79244 /* Page size is 256KB. */
79246 /* Page size is 512KB. */
79248 /* Page size is 1MB. */
79250 /* Page size is 2MB. */
79252 /* Page size is 4MB. */
79254 /* Page size is 8MB. */
79256 /* Page size is 16MB. */
79258 /* Page size is 32MB. */
79260 /* Page size is 64MB. */
79262 /* Page size is 128MB. */
79264 /* Page size is 256MB. */
79266 /* Page size is 512MB. */
79268 /* Page size is 1GB. */
79270 /* Page size is 2GB. */
79272 /* Page size is 4GB. */
79274 /* Page size is 8GB. */
79276 /* Page size is 16GB. */
79278 /* Page size is 32GB. */
79280 /* Page size is 64GB. */
79282 /* Page size is 128GB. */
79284 /* Page size is 256GB. */
79286 /* Page size is 512GB. */
79288 /* Page size is 1TB. */
79290 /* Page size is 2TB. */
79292 /* Page size is 4TB. */
79294 /* Page size is 8TB. */
79310 /* PBL page size. 0 for 4KB page size, ... to 8TB. */
79313 /* Page size is 4KB. */
79315 /* Page size is 8KB. */
79317 /* Page size is 16KB. */
79319 /* Page size is 32KB. */
79321 /* Page size is 64KB. */
79323 /* Page size is 128KB. */
79325 /* Page size is 256KB. */
79327 /* Page size is 512KB. */
79329 /* Page size is 1MB. */
79331 /* Page size is 2MB. */
79333 /* Page size is 4MB. */
79335 /* Page size is 8MB. */
79337 /* Page size is 16MB. */
79339 /* Page size is 32MB. */
79341 /* Page size is 64MB. */
79343 /* Page size is 128MB. */
79345 /* Page size is 256MB. */
79347 /* Page size is 512MB. */
79349 /* Page size is 1GB. */
79351 /* Page size is 2GB. */
79353 /* Page size is 4GB. */
79355 /* Page size is 8GB. */
79357 /* Page size is 16GB. */
79359 /* Page size is 32GB. */
79361 /* Page size is 64GB. */
79363 /* Page size is 128GB. */
79365 /* Page size is 256GB. */
79367 /* Page size is 512GB. */
79369 /* Page size is 1TB. */
79371 /* Page size is 2TB. */
79373 /* Page size is 4TB. */
79375 /* Page size is 8TB. */
79388 * physical address. The PBL points to a physical page that
79394 * physical address. The PBL points to a physical page that
79407 /* FR-PPMR SQ WQE */
79414 * FR-PPMR (Fast Register Proxy Physical Memory Region)
79470 /* Page size. 0 for 4KB page size, ... to 8TB. */
79473 /* Page size is 4KB. */
79475 /* Page size is 8KB. */
79477 /* Page size is 16KB. */
79479 /* Page size is 32KB. */
79481 /* Page size is 64KB. */
79483 /* Page size is 128KB. */
79485 /* Page size is 256KB. */
79487 /* Page size is 512KB. */
79489 /* Page size is 1MB. */
79491 /* Page size is 2MB. */
79493 /* Page size is 4MB. */
79495 /* Page size is 8MB. */
79497 /* Page size is 16MB. */
79499 /* Page size is 32MB. */
79501 /* Page size is 64MB. */
79503 /* Page size is 128MB. */
79505 /* Page size is 256MB. */
79507 /* Page size is 512MB. */
79509 /* Page size is 1GB. */
79511 /* Page size is 2GB. */
79513 /* Page size is 4GB. */
79515 /* Page size is 8GB. */
79517 /* Page size is 16GB. */
79519 /* Page size is 32GB. */
79521 /* Page size is 64GB. */
79523 /* Page size is 128GB. */
79525 /* Page size is 256GB. */
79527 /* Page size is 512GB. */
79529 /* Page size is 1TB. */
79531 /* Page size is 2TB. */
79533 /* Page size is 4TB. */
79535 /* Page size is 8TB. */
79553 /* PBL page size. 0 for 4KB page size, ... to 8TB. */
79556 /* Page size is 4KB. */
79558 /* Page size is 8KB. */
79560 /* Page size is 16KB. */
79562 /* Page size is 32KB. */
79564 /* Page size is 64KB. */
79566 /* Page size is 128KB. */
79568 /* Page size is 256KB. */
79570 /* Page size is 512KB. */
79572 /* Page size is 1MB. */
79574 /* Page size is 2MB. */
79576 /* Page size is 4MB. */
79578 /* Page size is 8MB. */
79580 /* Page size is 16MB. */
79582 /* Page size is 32MB. */
79584 /* Page size is 64MB. */
79586 /* Page size is 128MB. */
79588 /* Page size is 256MB. */
79590 /* Page size is 512MB. */
79592 /* Page size is 1GB. */
79594 /* Page size is 2GB. */
79596 /* Page size is 4GB. */
79598 /* Page size is 8GB. */
79600 /* Page size is 16GB. */
79602 /* Page size is 32GB. */
79604 /* Page size is 64GB. */
79606 /* Page size is 128GB. */
79608 /* Page size is 256GB. */
79610 /* Page size is 512GB. */
79612 /* Page size is 1TB. */
79614 /* Page size is 2TB. */
79616 /* Page size is 4TB. */
79618 /* Page size is 8TB. */
79633 * physical address. The PBL points to a physical page that
79639 * physical address. The PBL points to a physical page that
79650 /* The data field for FR-PPMR is not used. */
79654 /* FR-PPMR SQ WQE header. */
79661 * FR-PPMR (Fast Register Proxy Physical Memory Region)
79717 /* Page size. 0 for 4KB page size, ... to 8TB. */
79720 /* Page size is 4KB. */
79722 /* Page size is 8KB. */
79724 /* Page size is 16KB. */
79726 /* Page size is 32KB. */
79728 /* Page size is 64KB. */
79730 /* Page size is 128KB. */
79732 /* Page size is 256KB. */
79734 /* Page size is 512KB. */
79736 /* Page size is 1MB. */
79738 /* Page size is 2MB. */
79740 /* Page size is 4MB. */
79742 /* Page size is 8MB. */
79744 /* Page size is 16MB. */
79746 /* Page size is 32MB. */
79748 /* Page size is 64MB. */
79750 /* Page size is 128MB. */
79752 /* Page size is 256MB. */
79754 /* Page size is 512MB. */
79756 /* Page size is 1GB. */
79758 /* Page size is 2GB. */
79760 /* Page size is 4GB. */
79762 /* Page size is 8GB. */
79764 /* Page size is 16GB. */
79766 /* Page size is 32GB. */
79768 /* Page size is 64GB. */
79770 /* Page size is 128GB. */
79772 /* Page size is 256GB. */
79774 /* Page size is 512GB. */
79776 /* Page size is 1TB. */
79778 /* Page size is 2TB. */
79780 /* Page size is 4TB. */
79782 /* Page size is 8TB. */
79800 /* PBL page size. 0 for 4KB page size, ... to 8TB. */
79803 /* Page size is 4KB. */
79805 /* Page size is 8KB. */
79807 /* Page size is 16KB. */
79809 /* Page size is 32KB. */
79811 /* Page size is 64KB. */
79813 /* Page size is 128KB. */
79815 /* Page size is 256KB. */
79817 /* Page size is 512KB. */
79819 /* Page size is 1MB. */
79821 /* Page size is 2MB. */
79823 /* Page size is 4MB. */
79825 /* Page size is 8MB. */
79827 /* Page size is 16MB. */
79829 /* Page size is 32MB. */
79831 /* Page size is 64MB. */
79833 /* Page size is 128MB. */
79835 /* Page size is 256MB. */
79837 /* Page size is 512MB. */
79839 /* Page size is 1GB. */
79841 /* Page size is 2GB. */
79843 /* Page size is 4GB. */
79845 /* Page size is 8GB. */
79847 /* Page size is 16GB. */
79849 /* Page size is 32GB. */
79851 /* Page size is 64GB. */
79853 /* Page size is 128GB. */
79855 /* Page size is 256GB. */
79857 /* Page size is 512GB. */
79859 /* Page size is 1TB. */
79861 /* Page size is 2TB. */
79863 /* Page size is 4TB. */
79865 /* Page size is 8TB. */
79880 * physical address. The PBL points to a physical page that
79886 * physical address. The PBL points to a physical page that
79999 * If this bit is set, then the newly-bound memory window will be
80000 * zero-based. If clear, then the newly-bound memory window will be
80001 * non-zero-based.
80155 * If this bit is set, then the newly-bound memory window will be
80156 * zero-based. If clear, then the newly-bound memory window will be
80157 * non-zero-based.
80224 * Start index. For variable-size WQEs, this field indicates the
80226 * backward-compatible mode, this is the starting WQE index.
80242 * present in the SQ between the previous wire-operation WQE
80337 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
80343 * Note that this field is not applicable for zero-length inline
80362 * This field specifies a 24-bit timestamp that can be passed
80467 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
80473 * Note that this field is not applicable for zero-length inline
80492 * This field specifies a 24-bit timestamp that can be passed
80576 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
80582 * Note that this field is not applicable for zero-length inline
80638 * If set to 1, The controller replaces the Outer-tunnel IP
80646 * - If outer UDP checksum is 0, then do not update it.
80647 * - If outer UDP checksum is non zero, then the hardware should
80683 * This value is action meta-data that defines CFA edit operations
80725 * - meta[17:16] - TPID select value (0 = 0x8100).
80726 * - meta[15:12] - PRI/DE value.
80727 * - meta[11:0] - VID value.
80733 * This field specifies a 24-bit timestamp that can be passed
80827 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
80833 * Note that this field is not applicable for zero-length inline
80889 * If set to 1, The controller replaces the Outer-tunnel IP
80897 * - If outer UDP checksum is 0, then do not update it.
80898 * - If outer UDP checksum is non zero, then the hardware should
80934 * This value is action meta-data that defines CFA edit operations
80976 * - meta[17:16] - TPID select value (0 = 0x8100).
80977 * - meta[15:12] - PRI/DE value.
80978 * - meta[11:0] - VID value.
80984 * This field specifies a 24-bit timestamp that can be passed
81077 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
81083 * Note that this field is not applicable for zero-length inline
81104 * When in the SQ of a non-UD QP, this field is reserved and
81112 * When in the SQ of a non-UD QP, this field is reserved and
81128 * This field specifies a 24-bit timestamp that can be passed
81229 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
81235 * Note that this field is not applicable for zero-length inline
81256 * When in the SQ of a non-UD QP, this field is reserved and
81264 * When in the SQ of a non-UD QP, this field is reserved and
81280 * This field specifies a 24-bit timestamp that can be passed
81374 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
81380 * Note that this field is not applicable for zero-length inline
81391 * Immediate data - valid for RDMA Write with immediate and
81406 * This field specifies a 24-bit timestamp that can be passed
81509 * `inline_size = ((wqe_size - 1) * 16) - data_offset_in_bytes +
81515 * Note that this field is not applicable for zero-length inline
81526 * Immediate data - valid for RDMA Write with immediate and
81541 * This field specifies a 24-bit timestamp that can be passed
81610 * For the Atomic WQE, this field will always have a value of 4.
81661 * Size of SGE in bytes; Based on page size of the system the chip
81730 * For the Atomic WQE, this field will always have a value of 4.
81921 * SQ FR-PMR WQE V3 for RC SQs.
81923 * The FR-PMR WQE must be padded to 3 slots (48 bytes) in the SQ, even
81932 * FR-PMR (Fast Register Physical Memory Region) V3
81982 * For the FR-PMR WQE, this field will always have a value of 3.
81987 * If this is set, the PMR will be zero-based. If clear, the PMR
81988 * will be non-zero-based.
82020 * This value controls the page size for leaf memory pages in
82021 * a PBL. While many page sizes are supported only the following
82022 * should be tested - 4k, 8k, 64k, 256k, 1m, 2m, 4m, 1g
82026 /* Page size is 4KB. */
82028 /* Page size is 8KB. */
82030 /* Page size is 16KB. */
82032 /* Page size is 32KB. */
82034 /* Page size is 64KB. */
82036 /* Page size is 128KB. */
82038 /* Page size is 256KB. */
82040 /* Page size is 512KB. */
82042 /* Page size is 1MB. */
82044 /* Page size is 2MB. */
82046 /* Page size is 4MB. */
82048 /* Page size is 8MB. */
82050 /* Page size is 16MB. */
82052 /* Page size is 32MB. */
82054 /* Page size is 64MB. */
82056 /* Page size is 128MB. */
82058 /* Page size is 256MB. */
82060 /* Page size is 512MB. */
82062 /* Page size is 1GB. */
82064 /* Page size is 2GB. */
82066 /* Page size is 4GB. */
82068 /* Page size is 8GB. */
82070 /* Page size is 16GB. */
82072 /* Page size is 32GB. */
82074 /* Page size is 64GB. */
82076 /* Page size is 128GB. */
82078 /* Page size is 256GB. */
82080 /* Page size is 512GB. */
82082 /* Page size is 1TB. */
82084 /* Page size is 2TB. */
82086 /* Page size is 4TB. */
82088 /* Page size is 8TB. */
82092 * This value controls the page size for page table elements
82093 * within a PBL. While many page sizes are supported only the
82094 * following should be tested - 4k, 8k, 64k, 256k, 1m, 2m, 4m, 1g
82098 /* Page size is 4KB. */
82100 /* Page size is 8KB. */
82102 /* Page size is 16KB. */
82104 /* Page size is 32KB. */
82106 /* Page size is 64KB. */
82108 /* Page size is 128KB. */
82110 /* Page size is 256KB. */
82112 /* Page size is 512KB. */
82114 /* Page size is 1MB. */
82116 /* Page size is 2MB. */
82118 /* Page size is 4MB. */
82120 /* Page size is 8MB. */
82122 /* Page size is 16MB. */
82124 /* Page size is 32MB. */
82126 /* Page size is 64MB. */
82128 /* Page size is 128MB. */
82130 /* Page size is 256MB. */
82132 /* Page size is 512MB. */
82134 /* Page size is 1GB. */
82136 /* Page size is 2GB. */
82138 /* Page size is 4GB. */
82140 /* Page size is 8GB. */
82142 /* Page size is 16GB. */
82144 /* Page size is 32GB. */
82146 /* Page size is 64GB. */
82148 /* Page size is 128GB. */
82150 /* Page size is 256GB. */
82152 /* Page size is 512GB. */
82154 /* Page size is 1TB. */
82156 /* Page size is 2TB. */
82158 /* Page size is 4TB. */
82160 /* Page size is 8TB. */
82173 * physical address. The PBL points to a physical page that
82180 * physical address. The PBL points to a physical page that
82196 /* SQ FR-PMR WQE V3 header for RC SQs. */
82203 * FR-PMR (Fast Register Physical Memory Region) V3
82253 * For the FR-PMR WQE, this field will always have a value of 3.
82258 * If this is set, the PMR will be zero-based. If clear, the PMR
82259 * will be non-zero-based.
82291 * This value controls the page size for leaf memory pages in
82292 * a PBL. While many page sizes are supported only the following
82293 * should be tested - 4k, 8k, 64k, 256k, 1m, 2m, 4m, 1g
82297 /* Page size is 4KB. */
82299 /* Page size is 8KB. */
82301 /* Page size is 16KB. */
82303 /* Page size is 32KB. */
82305 /* Page size is 64KB. */
82307 /* Page size is 128KB. */
82309 /* Page size is 256KB. */
82311 /* Page size is 512KB. */
82313 /* Page size is 1MB. */
82315 /* Page size is 2MB. */
82317 /* Page size is 4MB. */
82319 /* Page size is 8MB. */
82321 /* Page size is 16MB. */
82323 /* Page size is 32MB. */
82325 /* Page size is 64MB. */
82327 /* Page size is 128MB. */
82329 /* Page size is 256MB. */
82331 /* Page size is 512MB. */
82333 /* Page size is 1GB. */
82335 /* Page size is 2GB. */
82337 /* Page size is 4GB. */
82339 /* Page size is 8GB. */
82341 /* Page size is 16GB. */
82343 /* Page size is 32GB. */
82345 /* Page size is 64GB. */
82347 /* Page size is 128GB. */
82349 /* Page size is 256GB. */
82351 /* Page size is 512GB. */
82353 /* Page size is 1TB. */
82355 /* Page size is 2TB. */
82357 /* Page size is 4TB. */
82359 /* Page size is 8TB. */
82363 * This value controls the page size for page table elements
82364 * within a PBL. While many page sizes are supported only the
82365 * following should be tested - 4k, 8k, 64k, 256k, 1m, 2m, 4m, 1g
82369 /* Page size is 4KB. */
82371 /* Page size is 8KB. */
82373 /* Page size is 16KB. */
82375 /* Page size is 32KB. */
82377 /* Page size is 64KB. */
82379 /* Page size is 128KB. */
82381 /* Page size is 256KB. */
82383 /* Page size is 512KB. */
82385 /* Page size is 1MB. */
82387 /* Page size is 2MB. */
82389 /* Page size is 4MB. */
82391 /* Page size is 8MB. */
82393 /* Page size is 16MB. */
82395 /* Page size is 32MB. */
82397 /* Page size is 64MB. */
82399 /* Page size is 128MB. */
82401 /* Page size is 256MB. */
82403 /* Page size is 512MB. */
82405 /* Page size is 1GB. */
82407 /* Page size is 2GB. */
82409 /* Page size is 4GB. */
82411 /* Page size is 8GB. */
82413 /* Page size is 16GB. */
82415 /* Page size is 32GB. */
82417 /* Page size is 64GB. */
82419 /* Page size is 128GB. */
82421 /* Page size is 256GB. */
82423 /* Page size is 512GB. */
82425 /* Page size is 1TB. */
82427 /* Page size is 2TB. */
82429 /* Page size is 4TB. */
82431 /* Page size is 8TB. */
82444 * physical address. The PBL points to a physical page that
82451 * physical address. The PBL points to a physical page that
82532 * If this bit is set, then the newly-bound memory window will be
82533 * zero-based. If clear, then the newly-bound memory window will be
82534 * non-zero-based.
82693 * If this bit is set, then the newly-bound memory window will be
82694 * zero-based. If clear, then the newly-bound memory window will be
82695 * non-zero-based.
83034 * field is 32, representing a maximum-sized WQE of 512B.
83066 * field is 32, representing a maximum-sized WQE of 512B.
83083 * Indicate valid completion - written by the chip. The NIC
83092 * Requester completion - This is used for both RC and UD SQ
83097 * Responder RC Completion - This is used for both RQ and SRQ
83102 * Responder UD Completion - This is used for both RQ and SRQ
83107 * Responder RawEth and QP1 Completion - This is used for RQ
83118 * Requester completion V3 - This is used for both RC and UD SQ
83123 * Responder RC Completion V3 - This is used for both RQ and SRQ
83128 * Responder UD Completion V3 - This is used for both RQ and SRQ
83134 * Responder RawEth and QP1 Completion V3 - This is used for RQ and
83140 * Responder UD Completion with CFA V3 - This is used for both RQ
83147 * NO_OP completion - This is used to indicate that no
83152 * Terminal completion - This is used to indicate that no
83226 * SQ (fast-register, local invalidate, or bind).
83238 * back to the requester using a NAK-Invalid Request. For responder
83249 * back to the requester using a NAK-Remote Access Violation.
83259 * back to the requester using a NAK-Remote Operation Error.
83312 * SQ Consumer Index - points to the entry just past the last WQE
83315 * to (QPC.sq_size - 1)).
83323 * Indicate valid completion - written by the chip. Cumulus
83332 * Requester completion - This is used for both RC and UD SQ
83343 * This field is intended to be used for driver-generated push
83358 /* LOCAL_PROTECTION_ERR is 4 */
83399 * Opaque value - valid when inv_flag is set. Used by driver
83408 * Indicate valid completion - written by the chip. Cumulus
83417 * Responder RC Completion - This is used for both RQ and SRQ
83432 /* LOCAL_QP_OPERATION_ERR is 4 */
83514 * Indicate valid completion - written by the chip. Cumulus
83523 * Responder UD Completion - This is used for both RQ and SRQ
83552 /* LOCAL_QP_OPERATION_ERR is 4 */
83577 #define CQ_RES_UD_FLAGS_ROCE_IP_VER_SFT 4
83579 #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V1 (UINT32_C(0x0) << 4)
83581 #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV4 (UINT32_C(0x2) << 4)
83583 #define CQ_RES_UD_FLAGS_ROCE_IP_VER_V2IPV6 (UINT32_C(0x3) << 4)
83595 * - metadata[11:0] contains the vlan VID value.
83596 * - metadata[12] contains the vlan DE value.
83597 * - metadata[15:13] contains the vlan PRI value.
83604 * - VXLAN = VNI[23:0] -> VXLAN Network ID
83605 * - Geneve (NGE) = VNI[23:0] -> Virtual Network Identifier.
83606 * - NVGRE = TNI[23:0] -> Tenant Network ID
83607 * - GRE = KEY[31:0] -> key field with bit mask. zero if K = 0
83608 * - IPV4 = 0 (not populated)
83609 * - IPV6 = Flow Label[19:0]
83610 * - PPPoE = sessionID[15:0]
83611 * - MPLs = Outer label[19:0]
83612 * - UPAR = Selected[31:0] with bit mask
83623 * - metadata[8:0] contains the outer_l3_offset.
83624 * - metadata[15:9] contains the inner_l2_offset[6:0]
83684 * Indicate valid completion - written by the chip. Cumulus
83693 * Responder UD Completion - This is used for both RQ and SRQ
83722 /* LOCAL_QP_OPERATION_ERR is 4 */
83747 #define CQ_RES_UD_V2_FLAGS_ROCE_IP_VER_SFT 4
83749 #define CQ_RES_UD_V2_FLAGS_ROCE_IP_VER_V1 (UINT32_C(0x0) << 4)
83751 #define CQ_RES_UD_V2_FLAGS_ROCE_IP_VER_V2IPV4 (UINT32_C(0x2) << 4)
83753 #define CQ_RES_UD_V2_FLAGS_ROCE_IP_VER_V2IPV6 (UINT32_C(0x3) << 4)
83762 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
83764 * and action record pointer. - metadata2[25:0] contains the
83765 * action record pointer. - metadata2[31:26] contains the table
83772 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
83775 * - VXLAN = VNI[23:0] -> VXLAN Network ID
83776 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
83777 * - NVGRE = TNI[23:0] -> Tenant Network ID
83778 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
83779 * - IPv4 = 0 (not populated)
83780 * - IPv6 = Flow Label[19:0]
83781 * - PPPoE = sessionID[15:0]
83782 * - MPLs = Outer label[19:0]
83783 * - UPAR = Selected[31:0] with bit mask
83789 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
83797 * - metadata[8:0] contains the outer_l3_offset.
83798 * - metadata[15:9] contains the inner_l2_offset[6:0]
83886 * Indicate valid completion - written by the chip. Cumulus
83895 * Responder UD Completion with CFA - This is used for both RQ
83926 /* LOCAL_QP_OPERATION_ERR is 4 */
83951 #define CQ_RES_UD_CFA_FLAGS_ROCE_IP_VER_SFT 4
83953 #define CQ_RES_UD_CFA_FLAGS_ROCE_IP_VER_V1 (UINT32_C(0x0) << 4)
83955 #define CQ_RES_UD_CFA_FLAGS_ROCE_IP_VER_V2IPV4 (UINT32_C(0x2) << 4)
83957 #define CQ_RES_UD_CFA_FLAGS_ROCE_IP_VER_V2IPV6 (UINT32_C(0x3) << 4)
83973 * - metadata[11:0] contains the vlan VID value.
83974 * - metadata[12] contains the vlan DE value.
83975 * - metadata[15:13] contains the vlan PRI value.
83976 * - metadata[31:16] contains the vlan TPID value.
83982 * - VXLAN = VNI[23:0] -> VXLAN Network ID
83983 * - Geneve (NGE) = VNI[23:0] -> Virtual Network Identifier
83984 * - NVGRE = TNI[23:0] -> Tenant Network ID
83985 * - GRE = KEY[31:0] -> key field with bit mask. zero if K = 0
83986 * - IPV4 = 0 (not populated)
83987 * - IPV6 = Flow Label[19:0]
83988 * - PPPoE = sessionID[15:0]
83989 * - MPLs = Outer label[19:0]
83990 * - UPAR = Selected[31:0] with bit mask
84002 * - metadata[8:0] contains the outer_l3_offset.
84003 * - metadata[17:9] contains the inner_l2_offset.
84004 * - metadata[26:18] contains the inner_l3_offset.
84005 * - metadata[31:27] contains the inner_l4_size.
84062 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
84063 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
84065 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
84066 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
84067 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
84081 * Indicate valid completion - written by the chip. Cumulus
84090 * Responder UD Completion with CFA - This is used for both RQ
84121 /* LOCAL_QP_OPERATION_ERR is 4 */
84146 #define CQ_RES_UD_CFA_V2_FLAGS_ROCE_IP_VER_SFT 4
84148 #define CQ_RES_UD_CFA_V2_FLAGS_ROCE_IP_VER_V1 (UINT32_C(0x0) << 4)
84150 #define CQ_RES_UD_CFA_V2_FLAGS_ROCE_IP_VER_V2IPV4 (UINT32_C(0x2) << 4)
84152 #define CQ_RES_UD_CFA_V2_FLAGS_ROCE_IP_VER_V2IPV6 (UINT32_C(0x3) << 4)
84161 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
84163 * and action record pointer. - metadata2[25:0] contains the
84164 * action record pointer. - metadata2[31:26] contains the table
84171 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
84174 * - VXLAN = VNI[23:0] -> VXLAN Network ID
84175 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
84176 * - NVGRE = TNI[23:0] -> Tenant Network ID
84177 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
84178 * - IPv4 = 0 (not populated)
84179 * - IPv6 = Flow Label[19:0]
84180 * - PPPoE = sessionID[15:0]
84181 * - MPLs = Outer label[19:0]
84182 * - UPAR = Selected[31:0] with bit mask
84188 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
84196 * - metadata[8:0] contains the outer_l3_offset.
84197 * - metadata[15:9] contains the inner_l2_offset[6:0]
84348 * field is non-zero.
84397 * field is non-zero.
84489 #define CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_SFT 4
84491 #define CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
84495 * - raweth_qp1_metadata[11:0] contains the vlan VID value.
84496 * - raweth_qp1_metadata[12] contains the vlan DE value.
84497 * - raweth_qp1_metadata[15:13] contains the vlan PRI value.
84498 * - raweth_qp1_metadata[31:16] contains the vlan TPID value.
84500 #define CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
84505 * - VXLAN = VNI[23:0] -> VXLAN Network ID
84506 * - Geneve (NGE) = VNI[23:0] -> Virtual Network Identifier.
84507 * - NVGRE = TNI[23:0] -> Tenant Network ID
84508 * - GRE = KEY[31:0] -> key field with bit mask. zero if K = 0
84509 * - IPV4 = 0 (not populated)
84510 * - IPV6 = Flow Label[19:0]
84511 * - PPPoE = sessionID[15:0]
84512 * - MPLs = Outer label[19:0]
84513 * - UPAR = Selected[31:0] with bit mask
84515 #define CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
84520 #define CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
84524 * - metadata[8:0] contains the outer_l3_offset.
84525 * - metadata[15:9] contains the inner_l2_offset[6:0]
84527 #define CQ_RES_RAWETH_QP1_RAWETH_QP1_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
84530 * This field indicates the IP type for the inner-most IP header.
84575 * Indicate valid completion - written by the chip. Cumulus
84584 * Responder RawEth and QP1 Completion - This is used for RQ
84613 /* LOCAL_QP_OPERATION_ERR is 4 */
84765 * field is non-zero.
84814 * field is non-zero.
84884 * definition:- ip_cs_ok[2:0] = The number of header groups with a
84886 * outer-most header group to the inner-most header group, stopping
84887 * at the first error. - l4_cs_ok[5:3] = The number of header groups
84889 * the outer-most header group to the inner-most header group,
84891 * field has the following definition: - hdr_cnt[2:0] = The number of
84893 * delivered packet. - ip_cs_all_ok[3] =This bit will be '1' if all
84895 * - l4_cs_all_ok[4] = This bit will be '1' if all the parsed header
84901 #define CQ_RES_RAWETH_QP1_V2_RAWETH_QP1_FLAGS2_META_FORMAT_SFT 4
84903 #define CQ_RES_RAWETH_QP1_V2_RAWETH_QP1_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
84906 * information: - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],
84908 * and action record pointer. - metadata2[25:0] contains the
84909 * action record pointer. - metadata2[31:26] contains the table
84912 #define CQ_RES_RAWETH_QP1_V2_RAWETH_QP1_FLAGS2_META_FORMAT_ACT_REC_PTR (UINT32_C(0x1) << 4)
84916 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
84919 * - VXLAN = VNI[23:0] -> VXLAN Network ID
84920 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
84921 * - NVGRE = TNI[23:0] -> Tenant Network ID
84922 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
84923 * - IPv4 = 0 (not populated)
84924 * - IPv6 = Flow Label[19:0]
84925 * - PPPoE = sessionID[15:0]
84926 * - MPLs = Outer label[19:0]
84927 * - UPAR = Selected[31:0] with bit mask
84929 #define CQ_RES_RAWETH_QP1_V2_RAWETH_QP1_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
84933 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
84937 #define CQ_RES_RAWETH_QP1_V2_RAWETH_QP1_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
84941 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
84944 * - metadata2[8:0] contains the outer_l3_offset.
84945 * - metadata2[17:9] contains the inner_l2_offset.
84946 * - metadata2[26:18] contains the inner_l3_offset.
84947 * - metadata2[31:27] contains the inner_l4_size.
84949 #define CQ_RES_RAWETH_QP1_V2_RAWETH_QP1_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
84952 * This field indicates the IP type for the inner-most IP header.
84981 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
84982 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
84984 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
84985 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
84986 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
84993 * Indicate valid completion - written by the chip. Cumulus
85002 * Responder RawEth and QP1 Completion - This is used for RQ
85031 /* LOCAL_QP_OPERATION_ERR is 4 */
85116 * Indicate valid completion - written by the chip. Cumulus
85125 * Terminal completion - This is used to indicate that no
85148 * Indicate valid completion - written by the chip. The NIC
85184 /* No-Op CQE */
85193 * Indicate valid completion - written by the chip. The NIC
85202 * NO-OP completion - This is used to indicate that no operation
85232 * SQ Consumer Index - points to the entry just past the last WQE
85235 * (QPC.sq_size - 1)). The sq_cons_idx is in 16B units (as is
85249 * Indicate valid completion - written by the chip. The NIC
85258 * Requester completion V3 - This is used for both RC and UD SQ
85270 * Note: This field is intended to be used for driver-generated push
85322 * SQ (fast-register, local invalidate, or bind).
85334 * back to the requester using a NAK-Invalid Request. For responder
85345 * back to the requester using a NAK-Remote Access Violation.
85355 * back to the requester using a NAK-Remote Operation Error.
85397 * range for rq_prod/cons_idx is from 0 to QPC.rq_size-1. The
85425 * Opaque value - valid when inv_flag is set. Used by driver
85434 * Indicate valid completion - written by the chip. The NIC
85443 * Responder RC Completion - This is used for both RQ and SRQ
85502 * back to the requester using a NAK-Invalid Request. For responder
85557 * range for rq_prod/cons_idx is from 0 to QPC.rq_size-1. The
85595 * Indicate valid completion - written by the chip. The NIC
85604 * Responder UD Completion - This is used for both RQ and SRQ
85675 #define CQ_RES_UD_V3_FLAGS_ROCE_IP_VER_SFT 4
85677 #define CQ_RES_UD_V3_FLAGS_ROCE_IP_VER_V1 (UINT32_C(0x0) << 4)
85679 #define CQ_RES_UD_V3_FLAGS_ROCE_IP_VER_V2IPV4 (UINT32_C(0x2) << 4)
85681 #define CQ_RES_UD_V3_FLAGS_ROCE_IP_VER_V2IPV6 (UINT32_C(0x3) << 4)
85695 * range for rq_prod/cons_idx is from 0 to QPC.rq_size-1. The
85822 * field is non-zero.
85863 * claimed by the tunnel header length. Valid for GTPv1-U
85871 * field is non-zero.
85965 #define CQ_RES_RAWETH_QP1_V3_RAWETH_QP1_FLAGS2_META_FORMAT_SFT 4
85967 #define CQ_RES_RAWETH_QP1_V3_RAWETH_QP1_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
85972 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
85977 * - metadata2[25:0] contains the action record pointer.
85978 * - metadata2[31:26] contains the table scope.
85980 #define CQ_RES_RAWETH_QP1_V3_RAWETH_QP1_FLAGS2_META_FORMAT_ACT_REC_PTR (UINT32_C(0x1) << 4)
85985 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
85990 * - VXLAN = VNI[23:0] -> VXLAN Network ID
85991 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
85992 * - NVGRE = TNI[23:0] -> Tenant Network ID
85993 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
85994 * - IPv4 = 0 (not populated)
85995 * - IPv6 = Flow Label[19:0]
85996 * - PPPoE = sessionID[15:0]
85997 * - MPLs = Outer label[19:0]
85998 * - UPAR = Selected[31:0] with bit mask
86000 #define CQ_RES_RAWETH_QP1_V3_RAWETH_QP1_FLAGS2_META_FORMAT_TUNNEL_ID (UINT32_C(0x2) << 4)
86005 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
86010 #define CQ_RES_RAWETH_QP1_V3_RAWETH_QP1_FLAGS2_META_FORMAT_CHDR_DATA (UINT32_C(0x3) << 4)
86015 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
86020 * - metadata2[8:0] contains the outer_l3_offset.
86021 * - metadata2[17:9] contains the inner_l2_offset.
86022 * - metadata2[26:18] contains the inner_l3_offset.
86023 * - metadata2[31:27] contains the inner_l4_size.
86025 #define CQ_RES_RAWETH_QP1_V3_RAWETH_QP1_FLAGS2_META_FORMAT_HDR_OFFSET (UINT32_C(0x4) << 4)
86028 * This field indicates the IP type for the inner-most IP header.
86057 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
86058 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
86060 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
86061 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
86062 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
86067 * Indicate valid completion - written by the chip. The NIC
86076 * Responder RawEth and QP1 Completion - This is used for RQ and
86165 * range for rq_prod/cons_idx is from 0 to QPC.rq_size-1. The
86221 * - meta_format 0 - none - metadata2 = 0 - not valid/not stripped
86222 * - meta_format 1 - act_rec_ptr - metadata2 = {table_scope[5:0],
86224 * - meta_format 2 - tunnel_id - metadata2 = tunnel_id[31:0]
86225 * - meta_format 3 - chdr_data - metadata2 = updated_chdr_data[31:0]
86226 * - meta_format 4 - hdr_offsets - metadata2 = hdr_offsets[31:0]
86238 * Indicate valid completion - written by the chip. The NIC
86247 * Responder UD Completion with CFA - This is used for both RQ
86319 #define CQ_RES_UD_CFA_V3_FLAGS_ROCE_IP_VER_SFT 4
86321 #define CQ_RES_UD_CFA_V3_FLAGS_ROCE_IP_VER_V1 (UINT32_C(0x0) << 4)
86323 #define CQ_RES_UD_CFA_V3_FLAGS_ROCE_IP_VER_V2IPV4 (UINT32_C(0x2) << 4)
86325 #define CQ_RES_UD_CFA_V3_FLAGS_ROCE_IP_VER_V2IPV6 (UINT32_C(0x3) << 4)
86336 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
86341 * - metadata2[25:0] contains the action record pointer.
86342 * - metadata2[31:26] contains the table scope.
86349 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
86354 * - VXLAN = VNI[23:0] -> VXLAN Network ID
86355 * - Geneve (NGE) = VNI[23:0] a-> Virtual Network Identifier
86356 * - NVGRE = TNI[23:0] -> Tenant Network ID
86357 * - GRE = KEY[31:0] -> key field with bit mask. zero if K=0
86358 * - IPv4 = 0 (not populated)
86359 * - IPv6 = Flow Label[19:0]
86360 * - PPPoE = sessionID[15:0]
86361 * - MPLs = Outer label[19:0]
86362 * - UPAR = Selected[31:0] with bit mask
86369 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0],de, vid[11:0]}
86379 * - vtag[19:0] = {valid, tpid_sel[2:0], pri[2:0], de, vid[11:0]}
86384 * - metadata2[8:0] contains the outer_l3_offset.
86385 * - metadata2[17:9] contains the inner_l2_offset.
86386 * - metadata2[26:18] contains the inner_l3_offset.
86387 * - metadata2[31:27] contains the inner_l4_size.
86463 * re-arm this CQ. The toggle value should be copied into the
86512 * to re-arm this SRQ. The toggle value should be copied
86678 * result of receiving the read/atomic request. IRRQ.msn-1 will
86731 * A special case is a zero-length, zero-sge RDMA read request
86761 * It is assumed that WQE does not cross page boundaries!
86772 /* Page Table Entry (PTE) */
86779 * indicates that the page is not valid. A value of '1'
86780 * indicates that the page is valid. A reference to an
86781 * invalid page will return a PTU error.
86788 * that the page pointed to by this PTE is the last page in the
86797 * that this is the next-to-last page of the PBL.
86804 * This is the upper bits of the physical page controlled by
86805 * this PTE. If the page is larger than 4KB, then the unused
86806 * lower bits of the page address should be zero.
86812 /* Page Directory Entry (PDE) */
86819 * indicates that the page is not valid. A value of '1'
86820 * indicates that the page is valid. A reference to an
86821 * invalid page will return a PTU error.
86828 * This is the upper bits of the physical page controlled by
86829 * this PTE. If the page is larger than 4KB, then the unused
86830 * lower bits of the page address should be zero.
86838 * format directly to byte offset 0 of the appropriate doorbell page.
86869 * detect out-of-order doorbells and to ignore the older doorbells.
86870 * Out-of-order doorbells occur normally during dropped doorbell
86978 * doorbell page of a function.
86989 * doorbell page of a function.
87033 * format directly to byte offset 8 of the appropriate doorbell page.
87035 /* dbc_dbc32 (size:32b/4B) */
87089 * combine buffer) within doorbell page. WCB#0 = offset 16, WCB#1 =
87109 * are always 128B - so it always increments by eight 16B slots
87123 * This value is the PI index (lower 8bits) within 4K DPI
87124 * associated with push write. It is the doorbell page that
87138 * This value is the PI index (upper 4bits) within 4K DPI
87139 * associated with push write. It is the doorbell page that
87165 * buffer) within doorbell page. WCB#0 = offset 16, WCB#1 = offset 24,
87202 * This value is the PI index (lower 8bits) within 4K DPI
87203 * associated with push write. It is the doorbell page that
87217 * This value is the PI index (upper 4bits) within 4K DPI
87218 * associated with push write. It is the doorbell page that
87299 * doorbell page.
87307 /* dbc_absolute_db_32 (size:32b/4B) */
87348 * detect out-of-order doorbells and to ignore the older doorbells.
87349 * Out-of-order doorbells occur normally during dropped doorbell
87444 * will be accepted from user space (non-privileged doorbell page).
87448 * doorbell page of a function.
87459 * doorbell page of a function.
87496 * page.
87503 /* dbc_relative_db_32 (size:32b/4B) */
87584 * The kernel memory structure is per-type (SQ, RQ, SRQ/SRQ_ARM and
87601 /* This indicates it is entry for the next 4KB kernel memory pointer. */
87612 * is in the right-most half of the 64b space provided in the
87626 * an application page until a NULL doorbell is found or
87627 * the end of the 4K page is reached.
87633 * a NULL doorbell is found in the application page or
87634 * the end of the 4K page is reached.
87640 * a NULL doorbell is found in the application page or
87641 * the end of the 4K page is reached.
87651 /* 4*8B is read at the start of each stride. */
87662 * Page Index portion of DPI{VF_VALID,VFID,PI}. The pi needs to match
87673 * It is the application memory page(4KB) pointer when linked = 0.
87674 * It is the next kernel memory page(4KB) pointer when linked = 1.
87675 * The pointer doesn't have to be aligned to the page(4KB) but it
87684 * format directly to byte offset 0 of the appropriate doorbell page.
87721 * detect out-of-order doorbells and to ignore the older doorbells.
87722 * Out-of-order doorbells occur normally during dropped doorbell
87842 * message will be accepted from user space (non-privileged
87843 * doorbell page). The index and epoch for this doorbell type are
87847 * doorbell page of a function.
87858 * doorbell page of a function.
87938 * page. Express doorbells are used when the chip will be owning the
88004 /* fw_status_reg (size:32b/4B) */
88032 * > 0x81XX - 0xBFXX : 63 ASIC blocks
88088 * re-establish the communication.
88159 * is generally 4-byte aligned.
88191 * * 0x0-0xFFF8 - The function ID
88192 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88193 * * 0xFFFD - Reserved for user-space HWRM interface
88194 * * 0xFFFF - HWRM
88222 /* This field indicates which self-test is available to be run. */
88263 * A Value of 3 indicates that FW supports 1e-8, 1e-9, 1e-10, and
88264 * 1e-11.
88267 /* Eyescope supports a target BER of 1e-8 */
88269 /* Eyescope supports a target BER of 1e-9 */
88271 /* Eyescope supports a target BER of 1e-10 */
88273 /* Eyescope supports a target BER of 1e-11 */
88275 /* Eyescope supports a target BER of 1e-12 */
88312 * * 0x0-0xFFF8 - The function ID
88313 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88314 * * 0xFFFD - Reserved for user-space HWRM interface
88315 * * 0xFFFF - HWRM
88325 /* This field indicates which self-test is being requested to run. */
88437 * * 0x0-0xFFF8 - The function ID
88438 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88439 * * 0xFFFD - Reserved for user-space HWRM interface
88440 * * 0xFFFF - HWRM
88497 * * 0x0-0xFFF8 - The function ID
88498 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88499 * * 0xFFFD - Reserved for user-space HWRM interface
88500 * * 0xFFFF - HWRM
88550 #define HWRM_SELFTEST_RETRIEVE_SERDES_DATA_INPUT_OPTIONS_DIRECTION_HORIZONTAL (UINT32_C(0x0) << 4)
88552 #define HWRM_SELFTEST_RETRIEVE_SERDES_DATA_INPUT_OPTIONS_DIRECTION_VERTICAL (UINT32_C(0x1) << 4)
88576 /* When collecting an eyescope, measure with a target BER of 1e-8 */
88578 /* When collecting an eyescope, measure with a target BER of 1e-9 */
88580 /* When collecting an eyescope, measure with a target BER of 1e-10 */
88582 /* When collecting an eyescope, measure with a target BER of 1e-11 */
88584 /* When collecting an eyescope, measure with a target BER of 1e-12 */
88595 * a targetBER of 1e-8.
88709 * * 0x0-0xFFF8 - The function ID
88710 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88711 * * 0xFFFD - Reserved for user-space HWRM interface
88712 * * 0xFFFF - HWRM
88775 * * 0x0-0xFFF8 - The function ID
88776 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88777 * * 0xFFFD - Reserved for user-space HWRM interface
88778 * * 0xFFFF - HWRM
88854 * * 0x0-0xFFF8 - The function ID
88855 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88856 * * 0xFFFD - Reserved for user-space HWRM interface
88857 * * 0xFFFF - HWRM
88944 * * 0x0-0xFFF8 - The function ID
88945 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
88946 * * 0xFFFD - Reserved for user-space HWRM interface
88947 * * 0xFFFF - HWRM
89039 * * 0x0-0xFFF8 - The function ID
89040 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89041 * * 0xFFFD - Reserved for user-space HWRM interface
89042 * * 0xFFFF - HWRM
89123 * * 0x0-0xFFF8 - The function ID
89124 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89125 * * 0xFFFD - Reserved for user-space HWRM interface
89126 * * 0xFFFF - HWRM
89199 * * 0x0-0xFFF8 - The function ID
89200 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89201 * * 0xFFFD - Reserved for user-space HWRM interface
89202 * * 0xFFFF - HWRM
89279 * * 0x0-0xFFF8 - The function ID
89280 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89281 * * 0xFFFD - Reserved for user-space HWRM interface
89282 * * 0xFFFF - HWRM
89317 * location should be 4KB aligned.
89405 * * 0x0-0xFFF8 - The function ID
89406 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89407 * * 0xFFFD - Reserved for user-space HWRM interface
89408 * * 0xFFFF - HWRM
89501 * * 0x0-0xFFF8 - The function ID
89502 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89503 * * 0xFFFD - Reserved for user-space HWRM interface
89504 * * 0xFFFF - HWRM
89580 * * 0x0-0xFFF8 - The function ID
89581 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89582 * * 0xFFFD - Reserved for user-space HWRM interface
89583 * * 0xFFFF - HWRM
89657 * * 0x0-0xFFF8 - The function ID
89658 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89659 * * 0xFFFD - Reserved for user-space HWRM interface
89660 * * 0xFFFF - HWRM
89728 * * 0x0-0xFFF8 - The function ID
89729 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89730 * * 0xFFFD - Reserved for user-space HWRM interface
89731 * * 0xFFFF - HWRM
89742 * 64-bit Host destination address. This is the host address where
89746 /* Provisioning slot number. 0-indexed. */
89755 * request (CSR) from the security SoC non-volatile storage on
89773 /* Provisioning slot number. 0-indexed. */
89831 * * 0x0-0xFFF8 - The function ID
89832 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89833 * * 0xFFFD - Reserved for user-space HWRM interface
89834 * * 0xFFFF - HWRM
89845 * 64-bit Host source address. This is the host address where
89849 /* Provisioning slot number. 0-indexed. */
89857 * secure boot. If this bit is set, then import a HSM-signed
89858 * certificate chain to security SoC non-volatile storage on
89876 /* Provisioning slot number. 0-indexed. */
89911 /* Non-volatile storage is full or in error. */
89915 /* There is no self-signed device id certificate on device */
89944 * * 0x0-0xFFF8 - The function ID
89945 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
89946 * * 0xFFFD - Reserved for user-space HWRM interface
89947 * * 0xFFFF - HWRM
89987 * An 8-bit mask returning the provisioned state of the imported
89989 * Bit-N corresponding to slot N.
90039 * * 0x0-0xFFF8 - The function ID
90040 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90041 * * 0xFFFD - Reserved for user-space HWRM interface
90042 * * 0xFFFF - HWRM
90053 * 64-bit Host destination address. This is the host address where
90057 /* Provisioning slot number. 0-indexed. */
90066 * provisioned certificate from the security SoC non-volatile
90084 /* Provisioning slot number. 0-indexed. */
90151 * * 0x0-0xFFF8 - The function ID
90152 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90153 * * 0xFFFD - Reserved for user-space HWRM interface
90154 * * 0xFFFF - HWRM
90236 * * 0x0-0xFFF8 - The function ID
90237 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90238 * * 0xFFFD - Reserved for user-space HWRM interface
90239 * * 0xFFFF - HWRM
90327 * * 0x0-0xFFF8 - The function ID
90328 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90329 * * 0xFFFD - Reserved for user-space HWRM interface
90330 * * 0xFFFF - HWRM
90358 /* This field indicates which self-test is available to be run. */
90375 /* Can run memory test on Co-CPU peripheral */
90383 /* Can run pcie test on Co-CPU peripheral */
90425 * * 0x0-0xFFF8 - The function ID
90426 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90427 * * 0xFFFD - Reserved for user-space HWRM interface
90428 * * 0xFFFF - HWRM
90438 /* This field indicates which self-test is being requested to run. */
90451 /* Run memory test on Co-CPU peripheral */
90459 /* Run pcie test on Co-CPU peripheral */
90502 /* Co-CPU peripheral test requested */
90510 /* pcie test on Co-CPU peripheral test requested */
90524 /* Co-CPU peripheral test is successfully executed */
90532 /* pcie test on Co-CPU peripheral test is successfully executed */
90577 * * 0x0-0xFFF8 - The function ID
90578 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90579 * * 0xFFFD - Reserved for user-space HWRM interface
90580 * * 0xFFFF - HWRM
90671 * * 0x0-0xFFF8 - The function ID
90672 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90673 * * 0xFFFD - Reserved for user-space HWRM interface
90674 * * 0xFFFF - HWRM
90724 * * 0x0-0xFFF8 - The function ID
90725 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90726 * * 0xFFFD - Reserved for user-space HWRM interface
90727 * * 0xFFFF - HWRM
90818 * * 0x0-0xFFF8 - The function ID
90819 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90820 * * 0xFFFD - Reserved for user-space HWRM interface
90821 * * 0xFFFF - HWRM
90892 * * 0x0-0xFFF8 - The function ID
90893 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90894 * * 0xFFFD - Reserved for user-space HWRM interface
90895 * * 0xFFFF - HWRM
90954 * * 0x0-0xFFF8 - The function ID
90955 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
90956 * * 0xFFFD - Reserved for user-space HWRM interface
90957 * * 0xFFFF - HWRM
91056 * * 0x0-0xFFF8 - The function ID
91057 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
91058 * * 0xFFFD - Reserved for user-space HWRM interface
91059 * * 0xFFFF - HWRM
91101 * a 4 byte or 16 byte IP address, depending on whether the ip_type
91102 * specifies IPv4 or IPv6. For IPv4 addresses, the first 4 bytes of the
91105 uint32_t dest_ip[4];
91157 * * 0x0-0xFFF8 - The function ID
91158 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
91159 * * 0xFFFD - Reserved for user-space HWRM interface
91160 * * 0xFFFF - HWRM
91265 * * 0x0-0xFFF8 - The function ID
91266 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
91267 * * 0xFFFD - Reserved for user-space HWRM interface
91268 * * 0xFFFF - HWRM
91352 * * 0x0-0xFFF8 - The function ID
91353 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
91354 * * 0xFFFD - Reserved for user-space HWRM interface
91355 * * 0xFFFF - HWRM
91445 * * 0x0-0xFFF8 - The function ID
91446 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
91447 * * 0xFFFD - Reserved for user-space HWRM interface
91448 * * 0xFFFF - HWRM