Lines Matching +full:gpio +full:- +full:7 +full:- +full:segment
1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
19 * 4. Neither the name of the author nor the names of any co-contributors
43 * two on-board MIPS R4000 CPUs and can have as much as 16MB of external
48 * of value-added firmware updates. Unlike the Tigon I and Tigon II,
52 * The BCM5700 supports the PCI v2.2 and PCI-X v1.0 standards, and will
53 * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus.
55 * The BCM5701 is a single-chip solution incorporating both the BCM5700
60 * brand name, which is functionally similar but lacks PCI-X support.
119 #define ETHER_MIN_NOPAD (ETHER_MIN_LEN - ETHER_CRC_LEN) /* i.e., 60 */
363 #define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGE_FLAG_JUMBO)
364 #define BGE_IS_5700_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5700_FAMILY)
365 #define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5705_PLUS)
366 #define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5714_FAMILY)
367 #define BGE_IS_575X_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_575X_PLUS)
368 #define BGE_IS_5755_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5755_PLUS)
369 #define BGE_IS_5717_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5717_PLUS)
370 #define BGE_IS_57765_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_57765_PLUS)
491 * The BGE_REGISTER_DEBUG option is only for low-level debugging. It may
535 nitems(bge_devs) - 1);
557 if (sc->bge_asicrev == BGE_ASICREV_BCM5906 &&
561 dev = sc->bge_dev;
574 if (sc->bge_asicrev == BGE_ASICREV_BCM5906 &&
578 dev = sc->bge_dev;
591 dev = sc->bge_dev;
603 dev = sc->bge_dev;
618 if (sc->bge_asicrev == BGE_ASICREV_BCM5906)
619 off += BGE_LPMBX_IRQ0_HI - BGE_MBX_IRQ0_HI;
622 if ((sc->bge_flags & BGE_FLAG_MBOX_REORDER) != 0)
635 if (sc->bge_asicrev == BGE_ASICREV_BCM5761)
650 if (sc->bge_func_addr == 0)
653 bit = (1 << sc->bge_func_addr);
659 switch (sc->bge_func_addr) {
661 sc->bge_phy_ape_lock = BGE_APE_LOCK_PHY0;
664 sc->bge_phy_ape_lock = BGE_APE_LOCK_PHY1;
667 sc->bge_phy_ape_lock = BGE_APE_LOCK_PHY2;
670 sc->bge_phy_ape_lock = BGE_APE_LOCK_PHY3;
673 device_printf(sc->bge_dev,
690 sc->bge_mfw_flags &= ~ BGE_MFW_ON_APE;
697 device_printf(sc->bge_dev, "APE signature found "
702 sc->bge_mfw_flags |= BGE_MFW_ON_APE;
708 sc->bge_mfw_flags |= BGE_MFW_TYPE_NCSI;
711 sc->bge_mfw_flags |= BGE_MFW_TYPE_DASH;
717 device_printf(sc->bge_dev, "APE FW version: %s v%d.%d.%d.%d\n",
731 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0)
735 if (sc->bge_asicrev == BGE_ASICREV_BCM5761) {
747 /* Lock required when using GPIO. */
748 if (sc->bge_asicrev == BGE_ASICREV_BCM5761)
750 if (sc->bge_func_addr == 0)
753 bit = (1 << sc->bge_func_addr);
757 if (sc->bge_func_addr == 0)
760 bit = (1 << sc->bge_func_addr);
764 if (sc->bge_func_addr == 0)
767 bit = (1 << sc->bge_func_addr);
793 device_printf(sc->bge_dev, "APE lock %d request failed! "
811 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0)
814 if (sc->bge_asicrev == BGE_ASICREV_BCM5761)
823 if (sc->bge_asicrev == BGE_ASICREV_BCM5761)
825 if (sc->bge_func_addr == 0)
828 bit = (1 << sc->bge_func_addr);
831 if (sc->bge_func_addr == 0)
834 bit = (1 << sc->bge_func_addr);
837 if (sc->bge_func_addr == 0)
840 bit = (1 << sc->bge_func_addr);
865 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0)
869 for (i = 10; i > 0; i--) {
884 device_printf(sc->bge_dev, "APE event 0x%08x send timed out\n",
893 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0)
953 ctx->bge_busaddr = segs->ds_addr;
987 if_printf(sc->bge_ifp, "nvram read timed out\n");
1015 if (sc->bge_asicrev != BGE_ASICREV_BCM5906)
1062 device_printf(sc->bge_dev, "EEPROM read timed out\n");
1102 if (bge_ape_lock(sc, sc->bge_phy_ape_lock) != 0)
1106 if ((sc->bge_mi_mode & BGE_MIMODE_AUTOPOLL) != 0) {
1108 sc->bge_mi_mode & ~BGE_MIMODE_AUTOPOLL);
1127 device_printf(sc->bge_dev,
1134 if ((sc->bge_mi_mode & BGE_MIMODE_AUTOPOLL) != 0) {
1135 CSR_WRITE_4(sc, BGE_MI_MODE, sc->bge_mi_mode);
1139 bge_ape_unlock(sc, sc->bge_phy_ape_lock);
1155 if (sc->bge_asicrev == BGE_ASICREV_BCM5906 &&
1159 if (bge_ape_lock(sc, sc->bge_phy_ape_lock) != 0)
1163 if ((sc->bge_mi_mode & BGE_MIMODE_AUTOPOLL) != 0) {
1165 sc->bge_mi_mode & ~BGE_MIMODE_AUTOPOLL);
1182 if ((sc->bge_mi_mode & BGE_MIMODE_AUTOPOLL) != 0) {
1183 CSR_WRITE_4(sc, BGE_MI_MODE, sc->bge_mi_mode);
1187 bge_ape_unlock(sc, sc->bge_phy_ape_lock);
1190 device_printf(sc->bge_dev,
1205 if ((if_getdrvflags(sc->bge_ifp) & IFF_DRV_RUNNING) == 0)
1207 mii = device_get_softc(sc->bge_miibus);
1209 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
1211 switch (IFM_SUBTYPE(mii->mii_media_active)) {
1214 sc->bge_link = 1;
1219 if (sc->bge_asicrev != BGE_ASICREV_BCM5906)
1220 sc->bge_link = 1;
1222 sc->bge_link = 0;
1225 sc->bge_link = 0;
1229 sc->bge_link = 0;
1230 if (sc->bge_link == 0)
1245 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T ||
1246 IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX)
1254 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
1255 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
1257 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
1280 if (sc->bge_flags & BGE_FLAG_JUMBO_STD &&
1281 (if_getmtu(sc->bge_ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN +
1282 ETHER_VLAN_ENCAP_LEN > (MCLBYTES - ETHER_ALIGN))) {
1286 m->m_len = m->m_pkthdr.len = MJUM9BYTES;
1291 m->m_len = m->m_pkthdr.len = MCLBYTES;
1293 if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0)
1296 error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_rx_mtag,
1297 sc->bge_cdata.bge_rx_std_sparemap, m, segs, &nsegs, 0);
1302 if (sc->bge_cdata.bge_rx_std_chain[i] != NULL) {
1303 bus_dmamap_sync(sc->bge_cdata.bge_rx_mtag,
1304 sc->bge_cdata.bge_rx_std_dmamap[i], BUS_DMASYNC_POSTREAD);
1305 bus_dmamap_unload(sc->bge_cdata.bge_rx_mtag,
1306 sc->bge_cdata.bge_rx_std_dmamap[i]);
1308 map = sc->bge_cdata.bge_rx_std_dmamap[i];
1309 sc->bge_cdata.bge_rx_std_dmamap[i] = sc->bge_cdata.bge_rx_std_sparemap;
1310 sc->bge_cdata.bge_rx_std_sparemap = map;
1311 sc->bge_cdata.bge_rx_std_chain[i] = m;
1312 sc->bge_cdata.bge_rx_std_seglen[i] = segs[0].ds_len;
1313 r = &sc->bge_ldata.bge_rx_std_ring[sc->bge_std];
1314 r->bge_addr.bge_addr_lo = BGE_ADDR_LO(segs[0].ds_addr);
1315 r->bge_addr.bge_addr_hi = BGE_ADDR_HI(segs[0].ds_addr);
1316 r->bge_flags = BGE_RXBDFLAG_END;
1317 r->bge_len = segs[0].ds_len;
1318 r->bge_idx = i;
1320 bus_dmamap_sync(sc->bge_cdata.bge_rx_mtag,
1321 sc->bge_cdata.bge_rx_std_dmamap[i], BUS_DMASYNC_PREREAD);
1347 m->m_len = m->m_pkthdr.len = MJUM9BYTES;
1348 if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0)
1351 error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag_jumbo,
1352 sc->bge_cdata.bge_rx_jumbo_sparemap, m, segs, &nsegs, 0);
1358 if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) {
1359 bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo,
1360 sc->bge_cdata.bge_rx_jumbo_dmamap[i], BUS_DMASYNC_POSTREAD);
1361 bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo,
1362 sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
1364 map = sc->bge_cdata.bge_rx_jumbo_dmamap[i];
1365 sc->bge_cdata.bge_rx_jumbo_dmamap[i] =
1366 sc->bge_cdata.bge_rx_jumbo_sparemap;
1367 sc->bge_cdata.bge_rx_jumbo_sparemap = map;
1368 sc->bge_cdata.bge_rx_jumbo_chain[i] = m;
1369 sc->bge_cdata.bge_rx_jumbo_seglen[i][0] = 0;
1370 sc->bge_cdata.bge_rx_jumbo_seglen[i][1] = 0;
1371 sc->bge_cdata.bge_rx_jumbo_seglen[i][2] = 0;
1372 sc->bge_cdata.bge_rx_jumbo_seglen[i][3] = 0;
1377 r = &sc->bge_ldata.bge_rx_jumbo_ring[sc->bge_jumbo];
1378 r->bge_flags = BGE_RXBDFLAG_JUMBO_RING | BGE_RXBDFLAG_END;
1379 r->bge_idx = i;
1380 r->bge_len3 = r->bge_len2 = r->bge_len1 = 0;
1383 r->bge_addr3.bge_addr_lo = BGE_ADDR_LO(segs[3].ds_addr);
1384 r->bge_addr3.bge_addr_hi = BGE_ADDR_HI(segs[3].ds_addr);
1385 r->bge_len3 = segs[3].ds_len;
1386 sc->bge_cdata.bge_rx_jumbo_seglen[i][3] = segs[3].ds_len;
1388 r->bge_addr2.bge_addr_lo = BGE_ADDR_LO(segs[2].ds_addr);
1389 r->bge_addr2.bge_addr_hi = BGE_ADDR_HI(segs[2].ds_addr);
1390 r->bge_len2 = segs[2].ds_len;
1391 sc->bge_cdata.bge_rx_jumbo_seglen[i][2] = segs[2].ds_len;
1393 r->bge_addr1.bge_addr_lo = BGE_ADDR_LO(segs[1].ds_addr);
1394 r->bge_addr1.bge_addr_hi = BGE_ADDR_HI(segs[1].ds_addr);
1395 r->bge_len1 = segs[1].ds_len;
1396 sc->bge_cdata.bge_rx_jumbo_seglen[i][1] = segs[1].ds_len;
1398 r->bge_addr0.bge_addr_lo = BGE_ADDR_LO(segs[0].ds_addr);
1399 r->bge_addr0.bge_addr_hi = BGE_ADDR_HI(segs[0].ds_addr);
1400 r->bge_len0 = segs[0].ds_len;
1401 sc->bge_cdata.bge_rx_jumbo_seglen[i][0] = segs[0].ds_len;
1407 bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo,
1408 sc->bge_cdata.bge_rx_jumbo_dmamap[i], BUS_DMASYNC_PREREAD);
1418 bzero(sc->bge_ldata.bge_rx_std_ring, BGE_STD_RX_RING_SZ);
1419 sc->bge_std = 0;
1423 BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT);
1426 bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
1427 sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREWRITE);
1429 sc->bge_std = 0;
1430 bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, BGE_STD_RX_RING_CNT - 1);
1441 if (sc->bge_cdata.bge_rx_std_chain[i] != NULL) {
1442 bus_dmamap_sync(sc->bge_cdata.bge_rx_mtag,
1443 sc->bge_cdata.bge_rx_std_dmamap[i],
1445 bus_dmamap_unload(sc->bge_cdata.bge_rx_mtag,
1446 sc->bge_cdata.bge_rx_std_dmamap[i]);
1447 m_freem(sc->bge_cdata.bge_rx_std_chain[i]);
1448 sc->bge_cdata.bge_rx_std_chain[i] = NULL;
1450 bzero((char *)&sc->bge_ldata.bge_rx_std_ring[i],
1461 bzero(sc->bge_ldata.bge_rx_jumbo_ring, BGE_JUMBO_RX_RING_SZ);
1462 sc->bge_jumbo = 0;
1466 BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT);
1469 bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1470 sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_PREWRITE);
1472 sc->bge_jumbo = 0;
1475 rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb;
1476 rcb->bge_maxlen_flags =
1478 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
1480 bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, BGE_JUMBO_RX_RING_CNT - 1);
1491 if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) {
1492 bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo,
1493 sc->bge_cdata.bge_rx_jumbo_dmamap[i],
1495 bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo,
1496 sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
1497 m_freem(sc->bge_cdata.bge_rx_jumbo_chain[i]);
1498 sc->bge_cdata.bge_rx_jumbo_chain[i] = NULL;
1500 bzero((char *)&sc->bge_ldata.bge_rx_jumbo_ring[i],
1510 if (sc->bge_ldata.bge_tx_ring == NULL)
1514 if (sc->bge_cdata.bge_tx_chain[i] != NULL) {
1515 bus_dmamap_sync(sc->bge_cdata.bge_tx_mtag,
1516 sc->bge_cdata.bge_tx_dmamap[i],
1518 bus_dmamap_unload(sc->bge_cdata.bge_tx_mtag,
1519 sc->bge_cdata.bge_tx_dmamap[i]);
1520 m_freem(sc->bge_cdata.bge_tx_chain[i]);
1521 sc->bge_cdata.bge_tx_chain[i] = NULL;
1523 bzero((char *)&sc->bge_ldata.bge_tx_ring[i],
1531 sc->bge_txcnt = 0;
1532 sc->bge_tx_saved_considx = 0;
1534 bzero(sc->bge_ldata.bge_tx_ring, BGE_TX_RING_SZ);
1535 bus_dmamap_sync(sc->bge_cdata.bge_tx_ring_tag,
1536 sc->bge_cdata.bge_tx_ring_map, BUS_DMASYNC_PREWRITE);
1538 /* Initialize transmit producer index for host-memory send ring. */
1539 sc->bge_tx_prodidx = 0;
1540 bge_writembx(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx);
1543 if (sc->bge_chiprev == BGE_CHIPREV_5700_BX)
1544 bge_writembx(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx);
1546 /* NIC-memory send ring not used; initialize to zero. */
1549 if (sc->bge_chiprev == BGE_CHIPREV_5700_BX)
1562 ifp = sc->bge_ifp;
1592 ifp = sc->bge_ifp;
1617 ifp = sc->bge_ifp;
1633 if (sc->bge_asf_mode)
1636 if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) {
1661 if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) {
1682 if (sc->bge_asf_mode) {
1701 if (sc->bge_asf_mode) {
1738 /* Set endianness before we access any non-PCI registers. */
1740 if (sc->bge_flags & BGE_FLAG_TAGGED_STATUS)
1742 pci_write_config(sc->bge_dev, BGE_PCI_MISC_CTL, misc_ctl, 4);
1756 if (sc->bge_chiprev == BGE_CHIPREV_5704_BX) {
1758 * Fix data corruption caused by non-qword write with WB.
1762 val = pci_read_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, 2);
1764 pci_write_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, val, 2);
1767 if (sc->bge_asicrev == BGE_ASICREV_BCM57765 ||
1768 sc->bge_asicrev == BGE_ASICREV_BCM57766) {
1774 if (sc->bge_chiprev != BGE_CHIPREV_57765_AX) {
1785 BGE_PCIDMARWCTL_WR_CMD_SHIFT(7);
1786 if (sc->bge_flags & BGE_FLAG_PCIE) {
1787 if (sc->bge_mps >= 256)
1788 dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(7);
1791 } else if (sc->bge_flags & BGE_FLAG_PCIX) {
1796 dma_rw_ctl |= (sc->bge_asicrev == BGE_ASICREV_BCM5780) ?
1799 } else if (sc->bge_asicrev == BGE_ASICREV_BCM5703) {
1803 * memory read byte count of the PCI-X command
1808 } else if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
1810 dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) |
1818 if (sc->bge_asicrev == BGE_ASICREV_BCM5703 ||
1819 sc->bge_asicrev == BGE_ASICREV_BCM5704) {
1824 if (tmp == 6 || tmp == 7)
1828 /* Set PCI-X DMA write workaround. */
1833 dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) |
1834 BGE_PCIDMARWCTL_WR_WAT_SHIFT(7);
1836 if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1837 sc->bge_asicrev != BGE_ASICREV_BCM5750)
1840 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
1841 sc->bge_asicrev == BGE_ASICREV_BCM5701)
1844 if (sc->bge_asicrev == BGE_ASICREV_BCM5703 ||
1845 sc->bge_asicrev == BGE_ASICREV_BCM5704)
1849 if (sc->bge_chipid == BGE_CHIPID_BCM57765_A0)
1857 sc->bge_asicrev != BGE_ASICREV_BCM5717 &&
1858 sc->bge_asicrev != BGE_ASICREV_BCM5762)
1861 pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4);
1867 if (sc->bge_asicrev == BGE_ASICREV_BCM5720 ||
1868 sc->bge_asicrev == BGE_ASICREV_BCM5762) {
1869 /* Retain Host-2-BMC settings written by APE firmware. */
1880 * 64-bit DMA reads, which can be terminated early and then
1881 * completed later as 32-bit accesses, in combination with
1884 if (sc->bge_asicrev == BGE_ASICREV_BCM5701 &&
1885 sc->bge_chipid == BGE_CHIPID_BCM5701_B5)
1891 if (sc->bge_asf_mode & ASF_STACKUP)
1900 PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4);
1906 if (sc->bge_asicrev == BGE_ASICREV_BCM5906) {
1941 if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
1955 if (if_getmtu(sc->bge_ifp) > ETHERMTU) {
1966 } else if (sc->bge_asicrev == BGE_ASICREV_BCM5906) {
1984 * round-robin instead of priority based for BCM5719. When
1988 if (sc->bge_asicrev == BGE_ASICREV_BCM5719)
2000 device_printf(sc->bge_dev, "buffer manager failed to start\n");
2004 /* Enable flow-through queues */
2016 device_printf(sc->bge_dev, "flow-through queue init failed\n");
2024 * - This ring is used to feed receive buffers for "standard"
2028 * - This ring is used to feed receive buffers for jumbo sized
2033 * - This ring is used to feed receive buffers for "mini"
2035 * - This feature required external memory for the controller
2040 * - After the controller has placed an incoming frame into a
2047 * - This ring is used for outgoing frames. Many versions of
2052 rcb = &sc->bge_ldata.bge_info.bge_std_rx_rcb;
2053 rcb->bge_hostaddr.bge_addr_lo =
2054 BGE_ADDR_LO(sc->bge_ldata.bge_rx_std_ring_paddr);
2055 rcb->bge_hostaddr.bge_addr_hi =
2056 BGE_ADDR_HI(sc->bge_ldata.bge_rx_std_ring_paddr);
2057 bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
2058 sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREREAD);
2061 * Bits 31-16: Programmable ring size (2048, 1024, 512, .., 32)
2062 * Bits 15-2 : Maximum RX frame size
2066 rcb->bge_maxlen_flags =
2070 * Bits 31-16: Programmable ring size (512, 256, 128, 64, 32)
2071 * Bits 15-2 : Reserved (should be 0)
2075 rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0);
2079 * Bits 31-16: Maximum RX frame size
2080 * Bits 15-2 : Reserved (should be 0)
2084 rcb->bge_maxlen_flags =
2087 if (sc->bge_asicrev == BGE_ASICREV_BCM5717 ||
2088 sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
2089 sc->bge_asicrev == BGE_ASICREV_BCM5720)
2090 rcb->bge_nicaddr = BGE_STD_RX_RINGS_5717;
2092 rcb->bge_nicaddr = BGE_STD_RX_RINGS;
2094 CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi);
2095 CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo);
2096 CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
2097 CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr);
2110 rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb;
2112 rcb->bge_hostaddr.bge_addr_lo =
2113 BGE_ADDR_LO(sc->bge_ldata.bge_rx_jumbo_ring_paddr);
2114 rcb->bge_hostaddr.bge_addr_hi =
2115 BGE_ADDR_HI(sc->bge_ldata.bge_rx_jumbo_ring_paddr);
2116 bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2117 sc->bge_cdata.bge_rx_jumbo_ring_map,
2119 rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0,
2121 if (sc->bge_asicrev == BGE_ASICREV_BCM5717 ||
2122 sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
2123 sc->bge_asicrev == BGE_ASICREV_BCM5720)
2124 rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS_5717;
2126 rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS;
2128 rcb->bge_hostaddr.bge_addr_hi);
2130 rcb->bge_hostaddr.bge_addr_lo);
2133 rcb->bge_maxlen_flags);
2134 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr);
2141 rcb = &sc->bge_ldata.bge_info.bge_mini_rx_rcb;
2142 rcb->bge_maxlen_flags =
2145 rcb->bge_maxlen_flags);
2150 /* Choose de-pipeline mode for BCM5906 A0, A1 and A2. */
2151 if (sc->bge_asicrev == BGE_ASICREV_BCM5906) {
2152 if (sc->bge_chipid == BGE_CHIPID_BCM5906_A0 ||
2153 sc->bge_chipid == BGE_CHIPID_BCM5906_A1 ||
2154 sc->bge_chipid == BGE_CHIPID_BCM5906_A2)
2197 sc->bge_asicrev == BGE_ASICREV_BCM5762)
2213 BGE_HOSTADDR(taddr, sc->bge_ldata.bge_tx_ring_paddr);
2216 if (sc->bge_asicrev == BGE_ASICREV_BCM5717 ||
2217 sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
2218 sc->bge_asicrev == BGE_ASICREV_BCM5720)
2231 if (sc->bge_asicrev == BGE_ASICREV_BCM5717 ||
2232 sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
2233 sc->bge_asicrev == BGE_ASICREV_BCM5720) {
2238 else if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
2239 sc->bge_asicrev == BGE_ASICREV_BCM5762 ||
2263 BGE_HOSTADDR(taddr, sc->bge_ldata.bge_rx_return_ring_paddr);
2268 BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 0));
2270 lladdr = if_getlladdr(sc->bge_ifp);
2278 /* Set inter-packet gap */
2280 if (sc->bge_asicrev == BGE_ASICREV_BCM5720 ||
2281 sc->bge_asicrev == BGE_ASICREV_BCM5762)
2313 device_printf(sc->bge_dev,
2319 CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, sc->bge_rx_coal_ticks);
2320 CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks);
2321 CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds);
2322 CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds);
2333 BGE_ADDR_HI(sc->bge_ldata.bge_stats_paddr));
2335 BGE_ADDR_LO(sc->bge_ldata.bge_stats_paddr));
2338 CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks);
2343 BGE_ADDR_HI(sc->bge_ldata.bge_status_block_paddr));
2345 BGE_ADDR_LO(sc->bge_ldata.bge_status_block_paddr));
2348 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
2349 sc->bge_chipid != BGE_CHIPID_BCM5700_C0) {
2351 bzero(sc->bge_ldata.bge_status_block, BGE_STATUS_BLK_SZ);
2354 bzero(sc->bge_ldata.bge_status_block, 32);
2356 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
2357 sc->bge_cdata.bge_status_map,
2380 if (sc->bge_flags & BGE_FLAG_TBI)
2382 else if (sc->bge_flags & BGE_FLAG_MII_SERDES)
2388 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) != 0)
2398 /* Assert GPIO pins for PHY reset */
2416 if (sc->bge_asicrev == BGE_ASICREV_BCM5785)
2426 if (sc->bge_asicrev == BGE_ASICREV_BCM5717)
2429 if (sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
2430 sc->bge_asicrev == BGE_ASICREV_BCM5785 ||
2431 sc->bge_asicrev == BGE_ASICREV_BCM57780)
2435 if (sc->bge_flags & BGE_FLAG_PCIE)
2437 if (sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) {
2439 if (sc->bge_flags & BGE_FLAG_TSO3 ||
2440 sc->bge_asicrev == BGE_ASICREV_BCM5785 ||
2441 sc->bge_asicrev == BGE_ASICREV_BCM57780)
2445 if (sc->bge_asicrev == BGE_ASICREV_BCM5720 ||
2446 sc->bge_asicrev == BGE_ASICREV_BCM5762) {
2451 * non-LSO read DMA engine.
2456 if (sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
2457 sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
2458 sc->bge_asicrev == BGE_ASICREV_BCM5785 ||
2459 sc->bge_asicrev == BGE_ASICREV_BCM57780 ||
2461 if (sc->bge_asicrev == BGE_ASICREV_BCM5762)
2470 if (sc->bge_chipid == BGE_CHIPID_BCM5719_A0 ||
2471 sc->bge_asicrev == BGE_ASICREV_BCM5762) {
2488 if (sc->bge_asicrev == BGE_ASICREV_BCM5719) {
2493 } else if (sc->bge_asicrev == BGE_ASICREV_BCM5720) {
2495 * Allow 4KB burst length reads for non-LSO frames.
2502 } else if (sc->bge_asicrev == BGE_ASICREV_BCM5762) {
2512 if (sc->bge_flags & BGE_FLAG_RDMA_BUG) {
2522 if (sc->bge_asicrev == BGE_ASICREV_BCM5719)
2548 if (sc->bge_asicrev == BGE_ASICREV_BCM5761)
2553 if (sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3))
2579 if (sc->bge_flags & BGE_FLAG_TBI) {
2582 if (sc->bge_mi_mode & BGE_MIMODE_AUTOPOLL) {
2583 CSR_WRITE_4(sc, BGE_MI_MODE, sc->bge_mi_mode);
2586 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
2587 sc->bge_chipid != BGE_CHIPID_BCM5700_B2)
2595 * is cleared by bge_intr() -> bge_link_upd() sequence.
2596 * It's not necessary on newer BCM chips - perhaps enabling link
2614 for (br = bge_revisions; br->br_name != NULL; br++) {
2615 if (br->br_chipid == chipid)
2619 for (br = bge_majorrevs; br->br_name != NULL; br++) {
2620 if (br->br_chipid == BGE_ASICREV(chipid))
2632 for (v = bge_vendors; v->v_name != NULL; v++)
2633 if (v->v_id == vid)
2695 * of the compiled-in string. It guarantees we'll always announce the
2696 * right product name. We fall back to the compiled-in string when
2712 sc->bge_dev = dev;
2715 while(t->bge_vid != 0) {
2716 if ((vid == t->bge_vid) && (did == t->bge_did)) {
2725 v != NULL ? v->v_name : "Unknown",
2726 br != NULL ? br->br_name :
2746 if (sc->bge_cdata.bge_rx_std_dmamap[i])
2747 bus_dmamap_destroy(sc->bge_cdata.bge_rx_mtag,
2748 sc->bge_cdata.bge_rx_std_dmamap[i]);
2750 if (sc->bge_cdata.bge_rx_std_sparemap)
2751 bus_dmamap_destroy(sc->bge_cdata.bge_rx_mtag,
2752 sc->bge_cdata.bge_rx_std_sparemap);
2756 if (sc->bge_cdata.bge_rx_jumbo_dmamap[i])
2757 bus_dmamap_destroy(sc->bge_cdata.bge_mtag_jumbo,
2758 sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
2760 if (sc->bge_cdata.bge_rx_jumbo_sparemap)
2761 bus_dmamap_destroy(sc->bge_cdata.bge_mtag_jumbo,
2762 sc->bge_cdata.bge_rx_jumbo_sparemap);
2766 if (sc->bge_cdata.bge_tx_dmamap[i])
2767 bus_dmamap_destroy(sc->bge_cdata.bge_tx_mtag,
2768 sc->bge_cdata.bge_tx_dmamap[i]);
2771 if (sc->bge_cdata.bge_rx_mtag)
2772 bus_dma_tag_destroy(sc->bge_cdata.bge_rx_mtag);
2773 if (sc->bge_cdata.bge_mtag_jumbo)
2774 bus_dma_tag_destroy(sc->bge_cdata.bge_mtag_jumbo);
2775 if (sc->bge_cdata.bge_tx_mtag)
2776 bus_dma_tag_destroy(sc->bge_cdata.bge_tx_mtag);
2779 if (sc->bge_ldata.bge_rx_std_ring_paddr)
2780 bus_dmamap_unload(sc->bge_cdata.bge_rx_std_ring_tag,
2781 sc->bge_cdata.bge_rx_std_ring_map);
2782 if (sc->bge_ldata.bge_rx_std_ring)
2783 bus_dmamem_free(sc->bge_cdata.bge_rx_std_ring_tag,
2784 sc->bge_ldata.bge_rx_std_ring,
2785 sc->bge_cdata.bge_rx_std_ring_map);
2787 if (sc->bge_cdata.bge_rx_std_ring_tag)
2788 bus_dma_tag_destroy(sc->bge_cdata.bge_rx_std_ring_tag);
2791 if (sc->bge_ldata.bge_rx_jumbo_ring_paddr)
2792 bus_dmamap_unload(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2793 sc->bge_cdata.bge_rx_jumbo_ring_map);
2795 if (sc->bge_ldata.bge_rx_jumbo_ring)
2796 bus_dmamem_free(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2797 sc->bge_ldata.bge_rx_jumbo_ring,
2798 sc->bge_cdata.bge_rx_jumbo_ring_map);
2800 if (sc->bge_cdata.bge_rx_jumbo_ring_tag)
2801 bus_dma_tag_destroy(sc->bge_cdata.bge_rx_jumbo_ring_tag);
2804 if (sc->bge_ldata.bge_rx_return_ring_paddr)
2805 bus_dmamap_unload(sc->bge_cdata.bge_rx_return_ring_tag,
2806 sc->bge_cdata.bge_rx_return_ring_map);
2808 if (sc->bge_ldata.bge_rx_return_ring)
2809 bus_dmamem_free(sc->bge_cdata.bge_rx_return_ring_tag,
2810 sc->bge_ldata.bge_rx_return_ring,
2811 sc->bge_cdata.bge_rx_return_ring_map);
2813 if (sc->bge_cdata.bge_rx_return_ring_tag)
2814 bus_dma_tag_destroy(sc->bge_cdata.bge_rx_return_ring_tag);
2817 if (sc->bge_ldata.bge_tx_ring_paddr)
2818 bus_dmamap_unload(sc->bge_cdata.bge_tx_ring_tag,
2819 sc->bge_cdata.bge_tx_ring_map);
2821 if (sc->bge_ldata.bge_tx_ring)
2822 bus_dmamem_free(sc->bge_cdata.bge_tx_ring_tag,
2823 sc->bge_ldata.bge_tx_ring,
2824 sc->bge_cdata.bge_tx_ring_map);
2826 if (sc->bge_cdata.bge_tx_ring_tag)
2827 bus_dma_tag_destroy(sc->bge_cdata.bge_tx_ring_tag);
2830 if (sc->bge_ldata.bge_status_block_paddr)
2831 bus_dmamap_unload(sc->bge_cdata.bge_status_tag,
2832 sc->bge_cdata.bge_status_map);
2834 if (sc->bge_ldata.bge_status_block)
2835 bus_dmamem_free(sc->bge_cdata.bge_status_tag,
2836 sc->bge_ldata.bge_status_block,
2837 sc->bge_cdata.bge_status_map);
2839 if (sc->bge_cdata.bge_status_tag)
2840 bus_dma_tag_destroy(sc->bge_cdata.bge_status_tag);
2843 if (sc->bge_ldata.bge_stats_paddr)
2844 bus_dmamap_unload(sc->bge_cdata.bge_stats_tag,
2845 sc->bge_cdata.bge_stats_map);
2847 if (sc->bge_ldata.bge_stats)
2848 bus_dmamem_free(sc->bge_cdata.bge_stats_tag,
2849 sc->bge_ldata.bge_stats,
2850 sc->bge_cdata.bge_stats_map);
2852 if (sc->bge_cdata.bge_stats_tag)
2853 bus_dma_tag_destroy(sc->bge_cdata.bge_stats_tag);
2855 if (sc->bge_cdata.bge_buffer_tag)
2856 bus_dma_tag_destroy(sc->bge_cdata.bge_buffer_tag);
2859 if (sc->bge_cdata.bge_parent_tag)
2860 bus_dma_tag_destroy(sc->bge_cdata.bge_parent_tag);
2875 error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
2879 device_printf(sc->bge_dev,
2887 device_printf(sc->bge_dev,
2896 device_printf(sc->bge_dev,
2902 if ((sc->bge_flags & BGE_FLAG_4G_BNDRY_BUG) != 0 &&
2912 device_printf(sc->bge_dev, "4GB boundary crossed, "
2931 if ((sc->bge_flags & BGE_FLAG_40BIT_BUG) != 0)
2936 error = bus_dma_tag_create(bus_get_dma_tag(sc->bge_dev),
2939 0, NULL, NULL, &sc->bge_cdata.bge_parent_tag);
2941 device_printf(sc->bge_dev,
2948 &sc->bge_cdata.bge_rx_std_ring_tag,
2949 (uint8_t **)&sc->bge_ldata.bge_rx_std_ring,
2950 &sc->bge_cdata.bge_rx_std_ring_map,
2951 &sc->bge_ldata.bge_rx_std_ring_paddr, "RX ring");
2957 &sc->bge_cdata.bge_rx_return_ring_tag,
2958 (uint8_t **)&sc->bge_ldata.bge_rx_return_ring,
2959 &sc->bge_cdata.bge_rx_return_ring_map,
2960 &sc->bge_ldata.bge_rx_return_ring_paddr, "RX return ring");
2966 &sc->bge_cdata.bge_tx_ring_tag,
2967 (uint8_t **)&sc->bge_ldata.bge_tx_ring,
2968 &sc->bge_cdata.bge_tx_ring_map,
2969 &sc->bge_ldata.bge_tx_ring_paddr, "TX ring");
2980 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
2981 sc->bge_chipid != BGE_CHIPID_BCM5700_C0)
2986 &sc->bge_cdata.bge_status_tag,
2987 (uint8_t **)&sc->bge_ldata.bge_status_block,
2988 &sc->bge_cdata.bge_status_map,
2989 &sc->bge_ldata.bge_status_block_paddr, "status block");
2995 &sc->bge_cdata.bge_stats_tag,
2996 (uint8_t **)&sc->bge_ldata.bge_stats,
2997 &sc->bge_cdata.bge_stats_map,
2998 &sc->bge_ldata.bge_stats_paddr, "statistics block");
3005 &sc->bge_cdata.bge_rx_jumbo_ring_tag,
3006 (uint8_t **)&sc->bge_ldata.bge_rx_jumbo_ring,
3007 &sc->bge_cdata.bge_rx_jumbo_ring_map,
3008 &sc->bge_ldata.bge_rx_jumbo_ring_paddr, "jumbo RX ring");
3015 if ((sc->bge_flags & BGE_FLAG_4G_BNDRY_BUG) != 0) {
3020 * lives behind PCI-X bridge(e.g AMD 8131 PCI-X bridge).
3024 if (sc->bge_pcixcap != 0)
3027 error = bus_dma_tag_create(bus_get_dma_tag(sc->bge_dev),
3030 0, NULL, NULL, &sc->bge_cdata.bge_buffer_tag);
3032 device_printf(sc->bge_dev,
3037 if (sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) {
3044 error = bus_dma_tag_create(sc->bge_cdata.bge_buffer_tag, 1,
3047 &sc->bge_cdata.bge_tx_mtag);
3050 device_printf(sc->bge_dev, "could not allocate TX dma tag\n");
3055 if (sc->bge_flags & BGE_FLAG_JUMBO_STD)
3059 error = bus_dma_tag_create(sc->bge_cdata.bge_buffer_tag, 1, 0,
3061 rxmaxsegsz, 0, NULL, NULL, &sc->bge_cdata.bge_rx_mtag);
3064 device_printf(sc->bge_dev, "could not allocate RX dma tag\n");
3069 error = bus_dmamap_create(sc->bge_cdata.bge_rx_mtag, 0,
3070 &sc->bge_cdata.bge_rx_std_sparemap);
3072 device_printf(sc->bge_dev,
3077 error = bus_dmamap_create(sc->bge_cdata.bge_rx_mtag, 0,
3078 &sc->bge_cdata.bge_rx_std_dmamap[i]);
3080 device_printf(sc->bge_dev,
3088 error = bus_dmamap_create(sc->bge_cdata.bge_tx_mtag, 0,
3089 &sc->bge_cdata.bge_tx_dmamap[i]);
3091 device_printf(sc->bge_dev,
3099 error = bus_dma_tag_create(sc->bge_cdata.bge_buffer_tag,
3102 0, NULL, NULL, &sc->bge_cdata.bge_mtag_jumbo);
3104 device_printf(sc->bge_dev,
3109 error = bus_dmamap_create(sc->bge_cdata.bge_mtag_jumbo,
3110 0, &sc->bge_cdata.bge_rx_jumbo_sparemap);
3112 device_printf(sc->bge_dev,
3117 error = bus_dmamap_create(sc->bge_cdata.bge_mtag_jumbo,
3118 0, &sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
3120 device_printf(sc->bge_dev,
3136 device_t dev = sc->bge_dev;
3157 if (sc->bge_msi == 0)
3164 switch (sc->bge_asicrev) {
3169 * configured in single-port mode.
3175 if (sc->bge_chiprev != BGE_CHIPREV_5750_AX &&
3176 sc->bge_chiprev != BGE_CHIPREV_5750_BX)
3182 * in some MacBook Pro and make it work out-of-the-box.
3184 if (sc->bge_chiprev == BGE_CHIPREV_5784_AX)
3203 { 0x1022, 0x7450, "AMD-8131 PCI-X Bridge" },
3211 dev = sc->bge_dev;
3225 device_printf(sc->bge_dev,
3240 device_printf(sc->bge_dev,
3242 sc->bge_chipid, sc->bge_asicrev, sc->bge_chiprev);
3243 if (sc->bge_flags & BGE_FLAG_PCIE)
3244 printf("PCI-E\n");
3245 else if (sc->bge_flags & BGE_FLAG_PCIX) {
3246 printf("PCI-X ");
3265 case 7:
3272 if (sc->bge_pcixcap != 0)
3273 printf("PCI on PCI-X ");
3276 cfg = pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4);
3298 sc->bge_dev = dev;
3301 NET_TASK_INIT(&sc->bge_intr_task, 0, bge_intr_task, sc);
3302 callout_init_mtx(&sc->bge_stat_ch, &sc->bge_mtx, 0);
3310 sc->bge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
3313 if (sc->bge_res == NULL) {
3314 device_printf (sc->bge_dev, "couldn't map BAR0 memory\n");
3320 sc->bge_func_addr = pci_get_function(dev);
3321 sc->bge_chipid = bge_chipid(dev);
3322 sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid);
3323 sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);
3326 sc->bge_phy_addr = 1;
3331 * ---------+-------+-------+-------+-------+
3339 * ---------+-------+-------+-------+-------+
3349 if (sc->bge_asicrev == BGE_ASICREV_BCM5717 ||
3350 sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
3351 sc->bge_asicrev == BGE_ASICREV_BCM5720) {
3352 if (sc->bge_chipid != BGE_CHIPID_BCM5717_A0) {
3355 sc->bge_phy_addr = sc->bge_func_addr + 8;
3357 sc->bge_phy_addr = sc->bge_func_addr + 1;
3361 sc->bge_phy_addr = sc->bge_func_addr + 8;
3363 sc->bge_phy_addr = sc->bge_func_addr + 1;
3368 sc->bge_flags |= BGE_FLAG_EADDR;
3371 switch (sc->bge_asicrev) {
3375 sc->bge_flags |= BGE_FLAG_57765_PLUS;
3380 sc->bge_flags |= BGE_FLAG_5717_PLUS | BGE_FLAG_5755_PLUS |
3383 if (sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
3384 sc->bge_asicrev == BGE_ASICREV_BCM5720) {
3389 sc->bge_flags |= BGE_FLAG_RDMA_BUG;
3390 if (sc->bge_asicrev == BGE_ASICREV_BCM5719 &&
3391 sc->bge_chipid == BGE_CHIPID_BCM5719_A0) {
3393 sc->bge_flags &= ~BGE_FLAG_JUMBO;
3403 sc->bge_flags |= BGE_FLAG_5755_PLUS | BGE_FLAG_575X_PLUS |
3410 sc->bge_flags |= BGE_FLAG_5700_FAMILY | BGE_FLAG_JUMBO;
3415 sc->bge_flags |= BGE_FLAG_5714_FAMILY | BGE_FLAG_JUMBO_STD;
3420 sc->bge_flags |= BGE_FLAG_575X_PLUS;
3423 sc->bge_flags |= BGE_FLAG_5705_PLUS;
3428 switch (sc->bge_asicrev) {
3434 sc->bge_flags |= BGE_FLAG_APE;
3439 if ((sc->bge_flags & BGE_FLAG_APE) != 0) {
3441 sc->bge_res2 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
3443 if (sc->bge_res2 == NULL) {
3444 device_printf (sc->bge_dev,
3466 sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
3467 sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
3468 sc->bge_asicrev == BGE_ASICREV_BCM5785 ||
3469 sc->bge_asicrev == BGE_ASICREV_BCM57780)
3470 sc->bge_flags |= BGE_FLAG_CPMU_PRESENT;
3471 if ((sc->bge_flags & BGE_FLAG_CPMU_PRESENT) != 0)
3472 sc->bge_mi_mode = BGE_MIMODE_500KHZ_CONST;
3474 sc->bge_mi_mode = BGE_MIMODE_BASE;
3475 /* Enable auto polling for BCM570[0-5]. */
3476 if (BGE_IS_5700_FAMILY(sc) || sc->bge_asicrev == BGE_ASICREV_BCM5705)
3477 sc->bge_mi_mode |= BGE_MIMODE_AUTOPOLL;
3486 sc->bge_flags |= BGE_FLAG_4G_BNDRY_BUG;
3489 if (BGE_IS_5755_PLUS(sc) || sc->bge_asicrev == BGE_ASICREV_BCM5906)
3490 sc->bge_flags |= BGE_FLAG_SHORT_DMA_BUG;
3495 * segment size created in DMA tag is 4KB for TSO, so we
3498 if (sc->bge_asicrev == BGE_ASICREV_BCM5719)
3499 sc->bge_flags |= BGE_FLAG_4K_RDMA_BUG;
3502 if (sc->bge_asicrev == BGE_ASICREV_BCM5705) {
3505 sc->bge_flags |= BGE_FLAG_5788;
3509 if ((sc->bge_asicrev == BGE_ASICREV_BCM5703 &&
3511 (sc->bge_asicrev == BGE_ASICREV_BCM5705 &&
3523 sc->bge_asicrev == BGE_ASICREV_BCM5906) {
3526 sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
3543 sc->bge_flags |= BGE_FLAG_TSO3;
3544 if (sc->bge_asicrev == BGE_ASICREV_BCM5719 &&
3545 sc->bge_chipid == BGE_CHIPID_BCM5719_A0) {
3547 sc->bge_flags &= ~BGE_FLAG_TSO3;
3558 sc->bge_flags |= BGE_FLAG_TSO;
3562 * Check if this is a PCI-X or PCI Express device.
3569 sc->bge_flags |= BGE_FLAG_PCIE;
3570 sc->bge_expcap = reg;
3572 sc->bge_mps = pci_read_config(dev, sc->bge_expcap +
3574 sc->bge_mps = 128 << (sc->bge_mps & PCIEM_CAP_MAX_PAYLOAD);
3575 if (sc->bge_asicrev == BGE_ASICREV_BCM5719 ||
3576 sc->bge_asicrev == BGE_ASICREV_BCM5720)
3577 sc->bge_expmrq = 2048;
3579 sc->bge_expmrq = 4096;
3580 pci_set_max_read_req(dev, sc->bge_expmrq);
3583 * Check if the device is in PCI-X Mode.
3587 sc->bge_pcixcap = reg;
3590 sc->bge_flags |= BGE_FLAG_PCIX;
3596 * PCIe to PCI-X bridge in the device. Use 40bit DMA workaround.
3598 if (BGE_IS_5714_FAMILY(sc) && (sc->bge_flags & BGE_FLAG_PCIX))
3599 sc->bge_flags |= BGE_FLAG_40BIT_BUG;
3601 * Some PCI-X bridges are known to trigger write reordering to
3603 * caused by out-of-order TX completions. Enable workaround for
3604 * PCI-X devices that live behind these bridges.
3605 * Note, PCI-X controllers can run in PCI mode so we can't use
3606 * BGE_FLAG_PCIX flag to detect PCI-X controllers.
3608 if (sc->bge_pcixcap != 0 && bge_mbox_reorder(sc) != 0)
3609 sc->bge_flags |= BGE_FLAG_MBOX_REORDER;
3616 if (pci_find_cap(sc->bge_dev, PCIY_MSI, ®) == 0) {
3617 sc->bge_msicap = reg;
3621 sc->bge_flags |= BGE_FLAG_MSI;
3631 if (sc->bge_flags & BGE_FLAG_MSI && BGE_IS_5717_PLUS(sc))
3632 sc->bge_flags |= BGE_FLAG_TAGGED_STATUS;
3635 sc->bge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3638 if (sc->bge_irq == NULL) {
3639 device_printf(sc->bge_dev, "couldn't map interrupt\n");
3646 sc->bge_asf_mode = 0;
3648 if ((sc->bge_flags & BGE_FLAG_APE) == 0) {
3653 sc->bge_asf_mode |= ASF_ENABLE;
3654 sc->bge_asf_mode |= ASF_STACKUP;
3656 sc->bge_asf_mode |= ASF_NEW_HANDSHAKE;
3664 device_printf(sc->bge_dev, "chip reset failed\n");
3673 device_printf(sc->bge_dev, "chip initialization failed\n");
3680 device_printf(sc->bge_dev,
3688 sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
3690 sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
3692 sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
3695 device_printf(sc->bge_dev,
3702 sc->bge_stat_ticks = BGE_TICKS_PER_SEC;
3703 sc->bge_rx_coal_ticks = 150;
3704 sc->bge_tx_coal_ticks = 150;
3705 sc->bge_rx_max_coal_bds = 10;
3706 sc->bge_tx_max_coal_bds = 10;
3709 sc->bge_csum_features = BGE_CSUM_FEATURES;
3710 if (sc->bge_forced_udpcsum != 0)
3711 sc->bge_csum_features |= CSUM_UDP;
3714 ifp = sc->bge_ifp = if_alloc(IFT_ETHER);
3722 if_setsendqlen(ifp, BGE_TX_RING_CNT - 1);
3724 if_sethwassist(ifp, sc->bge_csum_features);
3727 if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) {
3743 if (sc->bge_chipid == BGE_CHIPID_BCM5700_B0) {
3756 * SK-9D41.
3760 else if ((sc->bge_flags & BGE_FLAG_EADDR) &&
3761 (sc->bge_asicrev != BGE_ASICREV_BCM5906)) {
3764 device_printf(sc->bge_dev, "failed to read EEPROM\n");
3771 /* The SysKonnect SK-9D41 is a 1000baseSX card. */
3775 sc->bge_flags |= BGE_FLAG_MII_SERDES;
3776 sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
3778 sc->bge_flags |= BGE_FLAG_TBI;
3782 if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 ||
3783 sc->bge_chipid == BGE_CHIPID_BCM5701_B0)
3784 sc->bge_phy_flags |= BGE_PHY_CRC_BUG;
3785 if (sc->bge_chiprev == BGE_CHIPREV_5703_AX ||
3786 sc->bge_chiprev == BGE_CHIPREV_5704_AX)
3787 sc->bge_phy_flags |= BGE_PHY_ADC_BUG;
3788 if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0)
3789 sc->bge_phy_flags |= BGE_PHY_5704_A0_BUG;
3791 sc->bge_phy_flags |= BGE_PHY_NO_3LED;
3793 sc->bge_asicrev != BGE_ASICREV_BCM5906 &&
3794 sc->bge_asicrev != BGE_ASICREV_BCM5785 &&
3795 sc->bge_asicrev != BGE_ASICREV_BCM57780 &&
3797 if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
3798 sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
3799 sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
3800 sc->bge_asicrev == BGE_ASICREV_BCM5787) {
3803 sc->bge_phy_flags |= BGE_PHY_JITTER_BUG;
3805 sc->bge_phy_flags |= BGE_PHY_ADJUST_TRIM;
3807 sc->bge_phy_flags |= BGE_PHY_BER_BUG;
3814 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
3815 (sc->bge_asicrev == BGE_ASICREV_BCM5705 &&
3816 (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
3817 sc->bge_chipid != BGE_CHIPID_BCM5705_A1)))
3818 sc->bge_phy_flags |= BGE_PHY_NO_WIRESPEED;
3820 if (sc->bge_flags & BGE_FLAG_TBI) {
3821 ifmedia_init(&sc->bge_ifmedia, IFM_IMASK, bge_ifmedia_upd,
3823 ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_1000_SX, 0, NULL);
3824 ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_1000_SX | IFM_FDX,
3826 ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL);
3827 ifmedia_set(&sc->bge_ifmedia, IFM_ETHER | IFM_AUTO);
3828 sc->bge_ifmedia.ifm_media = sc->bge_ifmedia.ifm_cur->ifm_media;
3842 error = mii_attach(dev, &sc->bge_miibus, ifp,
3844 (ifm_stat_cb_t)bge_ifmedia_sts, capmask, sc->bge_phy_addr,
3848 device_printf(sc->bge_dev, "Try again\n");
3849 bge_miibus_writereg(sc->bge_dev,
3850 sc->bge_phy_addr, MII_BMCR, BMCR_RESET);
3853 device_printf(sc->bge_dev, "attaching PHYs failed\n");
3860 if (sc->bge_asf_mode & ASF_STACKUP)
3865 * When using the BCM5701 in PCI-X mode, data corruption has
3872 if (sc->bge_asicrev == BGE_ASICREV_BCM5701 &&
3873 sc->bge_flags & BGE_FLAG_PCIX)
3874 sc->bge_flags |= BGE_FLAG_RX_ALIGNBUG;
3887 if (BGE_IS_5755_PLUS(sc) && sc->bge_flags & BGE_FLAG_MSI) {
3888 /* Take advantage of single-shot MSI. */
3891 sc->bge_tq = taskqueue_create_fast("bge_taskq", M_WAITOK,
3892 taskqueue_thread_enqueue, &sc->bge_tq);
3893 error = taskqueue_start_threads(&sc->bge_tq, 1, PI_NET,
3894 "%s taskq", device_get_nameunit(sc->bge_dev));
3900 error = bus_setup_intr(dev, sc->bge_irq,
3902 &sc->bge_intrhand);
3904 error = bus_setup_intr(dev, sc->bge_irq,
3906 &sc->bge_intrhand);
3910 device_printf(sc->bge_dev, "couldn't set up irq\n");
3930 ifp = sc->bge_ifp;
3942 callout_drain(&sc->bge_stat_ch);
3945 if (sc->bge_tq)
3946 taskqueue_drain(sc->bge_tq, &sc->bge_intr_task);
3948 if (sc->bge_flags & BGE_FLAG_TBI)
3949 ifmedia_removeall(&sc->bge_ifmedia);
3950 else if (sc->bge_miibus != NULL) {
3964 dev = sc->bge_dev;
3966 if (sc->bge_tq != NULL)
3967 taskqueue_free(sc->bge_tq);
3969 if (sc->bge_intrhand != NULL)
3970 bus_teardown_intr(dev, sc->bge_irq, sc->bge_intrhand);
3972 if (sc->bge_irq != NULL) {
3974 rman_get_rid(sc->bge_irq), sc->bge_irq);
3978 if (sc->bge_res != NULL)
3980 rman_get_rid(sc->bge_res), sc->bge_res);
3982 if (sc->bge_res2 != NULL)
3984 rman_get_rid(sc->bge_res2), sc->bge_res2);
3986 if (sc->bge_ifp != NULL)
3987 if_free(sc->bge_ifp);
3991 if (mtx_initialized(&sc->bge_mtx)) /* XXX */
4004 dev = sc->bge_dev;
4007 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) != 0)
4012 (sc->bge_asicrev != BGE_ASICREV_BCM5906)) {
4013 if (sc->bge_flags & BGE_FLAG_PCIE)
4020 if (sc->bge_asicrev != BGE_ASICREV_BCM5700 &&
4021 sc->bge_asicrev != BGE_ASICREV_BCM5701) {
4046 if (sc->bge_asicrev == BGE_ASICREV_BCM5752 ||
4063 if (sc->bge_flags & BGE_FLAG_PCIE) {
4064 if (sc->bge_asicrev != BGE_ASICREV_BCM5785 &&
4065 (sc->bge_flags & BGE_FLAG_5717_PLUS) == 0) {
4069 if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
4076 if (sc->bge_asicrev == BGE_ASICREV_BCM5906) {
4090 (sc->bge_flags & BGE_FLAG_CPMU_PRESENT) == 0)
4096 if (sc->bge_flags & BGE_FLAG_PCIE)
4102 if (sc->bge_flags & BGE_FLAG_PCIE) {
4103 if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) {
4109 sc->bge_expcap + PCIER_DEVICE_CTL, 2);
4113 pci_write_config(dev, sc->bge_expcap + PCIER_DEVICE_CTL,
4115 pci_set_max_read_req(dev, sc->bge_expmrq);
4117 pci_write_config(dev, sc->bge_expcap + PCIER_DEVICE_STA,
4128 if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0 &&
4129 (sc->bge_flags & BGE_FLAG_PCIX) != 0)
4131 if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) != 0)
4139 * Disable PCI-X relaxed ordering to ensure status block update
4143 if (sc->bge_flags & BGE_FLAG_PCIX) {
4145 sc->bge_pcixcap + PCIXR_COMMAND, 2);
4147 if (sc->bge_asicrev == BGE_ASICREV_BCM5703) {
4150 } else if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
4155 pci_write_config(dev, sc->bge_pcixcap + PCIXR_COMMAND,
4158 /* Re-enable MSI, if necessary, and enable the memory arbiter. */
4161 if (sc->bge_flags & BGE_FLAG_MSI) {
4163 sc->bge_msicap + PCIR_MSI_CTRL, 2);
4165 sc->bge_msicap + PCIR_MSI_CTRL,
4186 if (sc->bge_asicrev == BGE_ASICREV_BCM5906) {
4211 if ((sc->bge_flags & BGE_FLAG_EADDR) && i == BGE_TIMEOUT)
4216 if (sc->bge_chipid == BGE_CHIPID_BCM57765_A0)
4225 if (sc->bge_asicrev == BGE_ASICREV_BCM5704 &&
4226 sc->bge_flags & BGE_FLAG_TBI) {
4233 if (sc->bge_flags & BGE_FLAG_PCIE &&
4235 sc->bge_chipid != BGE_CHIPID_BCM5750_A0 &&
4236 sc->bge_asicrev != BGE_ASICREV_BCM5785) {
4242 if (sc->bge_asicrev == BGE_ASICREV_BCM5720)
4254 r = &sc->bge_ldata.bge_rx_std_ring[sc->bge_std];
4255 r->bge_flags = BGE_RXBDFLAG_END;
4256 r->bge_len = sc->bge_cdata.bge_rx_std_seglen[i];
4257 r->bge_idx = i;
4258 BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT);
4266 r = &sc->bge_ldata.bge_rx_jumbo_ring[sc->bge_jumbo];
4267 r->bge_flags = BGE_RXBDFLAG_JUMBO_RING | BGE_RXBDFLAG_END;
4268 r->bge_len0 = sc->bge_cdata.bge_rx_jumbo_seglen[i][0];
4269 r->bge_len1 = sc->bge_cdata.bge_rx_jumbo_seglen[i][1];
4270 r->bge_len2 = sc->bge_cdata.bge_rx_jumbo_seglen[i][2];
4271 r->bge_len3 = sc->bge_cdata.bge_rx_jumbo_seglen[i][3];
4272 r->bge_idx = i;
4273 BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT);
4292 rx_cons = sc->bge_rx_saved_considx;
4298 ifp = sc->bge_ifp;
4300 bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag,
4301 sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_POSTREAD);
4302 bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
4303 sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_POSTWRITE);
4306 ETHER_VLAN_ENCAP_LEN > (MCLBYTES - ETHER_ALIGN))
4307 bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
4308 sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_POSTWRITE);
4319 if (sc->rxcycles <= 0)
4321 sc->rxcycles--;
4325 cur_rx = &sc->bge_ldata.bge_rx_return_ring[rx_cons];
4327 rxidx = cur_rx->bge_idx;
4328 BGE_INC(rx_cons, sc->bge_return_ring_cnt);
4331 cur_rx->bge_flags & BGE_RXBDFLAG_VLAN_TAG) {
4333 vlan_tag = cur_rx->bge_vlan_tag;
4336 if (cur_rx->bge_flags & BGE_RXBDFLAG_JUMBO_RING) {
4338 m = sc->bge_cdata.bge_rx_jumbo_chain[rxidx];
4339 if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) {
4348 BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT);
4351 m = sc->bge_cdata.bge_rx_std_chain[rxidx];
4352 if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) {
4361 BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT);
4370 if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) {
4371 bcopy(m->m_data, m->m_data + ETHER_ALIGN,
4372 cur_rx->bge_len);
4373 m->m_data += ETHER_ALIGN;
4376 m->m_pkthdr.len = m->m_len = cur_rx->bge_len - ETHER_CRC_LEN;
4377 m->m_pkthdr.rcvif = ifp;
4387 m->m_pkthdr.ether_vtag = vlan_tag;
4388 m->m_flags |= M_VLANTAG;
4403 bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag,
4404 sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_PREREAD);
4406 bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
4407 sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREWRITE);
4410 bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
4411 sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_PREWRITE);
4413 sc->bge_rx_saved_considx = rx_cons;
4414 bge_writembx(sc, BGE_MBX_RX_CONS0_LO, sc->bge_rx_saved_considx);
4416 bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, (sc->bge_std +
4417 BGE_STD_RX_RING_CNT - 1) % BGE_STD_RX_RING_CNT);
4419 bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, (sc->bge_jumbo +
4420 BGE_JUMBO_RX_RING_CNT - 1) % BGE_JUMBO_RX_RING_CNT);
4437 if ((cur_rx->bge_flags & BGE_RXBDFLAG_IPV6) == 0) {
4438 if (cur_rx->bge_flags & BGE_RXBDFLAG_IP_CSUM) {
4439 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
4440 if ((cur_rx->bge_error_flag &
4442 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
4444 if (cur_rx->bge_flags & BGE_RXBDFLAG_TCP_UDP_CSUM) {
4445 m->m_pkthdr.csum_data =
4446 cur_rx->bge_tcp_udp_csum;
4447 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
4452 if (cur_rx->bge_flags & BGE_RXBDFLAG_IP_CSUM) {
4453 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
4454 if ((cur_rx->bge_ip_csum ^ 0xFFFF) == 0)
4455 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
4457 if (cur_rx->bge_flags & BGE_RXBDFLAG_TCP_UDP_CSUM &&
4458 m->m_pkthdr.len >= ETHER_MIN_NOPAD) {
4459 m->m_pkthdr.csum_data =
4460 cur_rx->bge_tcp_udp_csum;
4461 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
4476 if (sc->bge_tx_saved_considx == tx_cons)
4479 ifp = sc->bge_ifp;
4481 bus_dmamap_sync(sc->bge_cdata.bge_tx_ring_tag,
4482 sc->bge_cdata.bge_tx_ring_map, BUS_DMASYNC_POSTWRITE);
4487 while (sc->bge_tx_saved_considx != tx_cons) {
4490 idx = sc->bge_tx_saved_considx;
4491 cur_tx = &sc->bge_ldata.bge_tx_ring[idx];
4492 if (cur_tx->bge_flags & BGE_TXBDFLAG_END)
4494 if (sc->bge_cdata.bge_tx_chain[idx] != NULL) {
4495 bus_dmamap_sync(sc->bge_cdata.bge_tx_mtag,
4496 sc->bge_cdata.bge_tx_dmamap[idx],
4498 bus_dmamap_unload(sc->bge_cdata.bge_tx_mtag,
4499 sc->bge_cdata.bge_tx_dmamap[idx]);
4500 m_freem(sc->bge_cdata.bge_tx_chain[idx]);
4501 sc->bge_cdata.bge_tx_chain[idx] = NULL;
4503 sc->bge_txcnt--;
4504 BGE_INC(sc->bge_tx_saved_considx, BGE_TX_RING_CNT);
4508 if (sc->bge_txcnt == 0)
4509 sc->bge_timer = 0;
4527 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
4528 sc->bge_cdata.bge_status_map,
4531 rx_prod = sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx;
4532 tx_cons = sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx;
4534 statusword = sc->bge_ldata.bge_status_block->bge_status;
4536 sc->bge_ldata.bge_status_block->bge_status = 0;
4538 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
4539 sc->bge_cdata.bge_status_map,
4544 sc->bge_link_evt++;
4547 if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
4548 sc->bge_chipid != BGE_CHIPID_BCM5700_B2) ||
4549 sc->bge_link_evt || (sc->bge_flags & BGE_FLAG_TBI))
4552 sc->rxcycles = count;
4577 taskqueue_enqueue(sc->bge_tq, &sc->bge_intr_task);
4590 ifp = sc->bge_ifp;
4599 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
4600 sc->bge_cdata.bge_status_map,
4604 rx_prod = sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx;
4605 tx_cons = sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx;
4606 status = sc->bge_ldata.bge_status_block->bge_status;
4607 status_tag = sc->bge_ldata.bge_status_block->bge_status_tag << 24;
4609 sc->bge_ldata.bge_status_block->bge_status = 0;
4610 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
4611 sc->bge_cdata.bge_status_map,
4613 if ((sc->bge_flags & BGE_FLAG_TAGGED_STATUS) == 0)
4623 sc->bge_rx_saved_considx != rx_prod) {
4650 ifp = sc->bge_ifp;
4663 * pessimizations for re-enabling interrupts. We used to have races
4666 * running (by switching to the interrupt-mode coalescence
4687 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
4688 sc->bge_cdata.bge_status_map,
4690 rx_prod = sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx;
4691 tx_cons = sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx;
4692 sc->bge_ldata.bge_status_block->bge_status = 0;
4693 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
4694 sc->bge_cdata.bge_status_map,
4697 if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
4698 sc->bge_chipid != BGE_CHIPID_BCM5700_B2) ||
4699 statusword || sc->bge_link_evt)
4722 if (sc->bge_asf_mode & ASF_STACKUP) {
4724 if (sc->bge_asf_count)
4725 sc->bge_asf_count --;
4727 sc->bge_asf_count = 2;
4749 if (callout_pending(&sc->bge_stat_ch) ||
4750 !callout_active(&sc->bge_stat_ch))
4760 if ((sc->bge_flags & BGE_FLAG_TBI) == 0) {
4761 mii = device_get_softc(sc->bge_miibus);
4767 if (!sc->bge_link)
4771 * Since in TBI mode auto-polling can't be used we should poll
4777 if (!(if_getcapenable(sc->bge_ifp) & IFCAP_POLLING))
4780 sc->bge_link_evt++;
4781 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
4782 sc->bge_flags & BGE_FLAG_5788)
4792 callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc);
4801 stats = &sc->bge_mac_stats;
4803 stats->ifHCOutOctets +=
4805 stats->etherStatsCollisions +=
4807 stats->outXonSent +=
4809 stats->outXoffSent +=
4811 stats->dot3StatsInternalMacTransmitErrors +=
4813 stats->dot3StatsSingleCollisionFrames +=
4815 stats->dot3StatsMultipleCollisionFrames +=
4817 stats->dot3StatsDeferredTransmissions +=
4819 stats->dot3StatsExcessiveCollisions +=
4821 stats->dot3StatsLateCollisions +=
4823 stats->ifHCOutUcastPkts +=
4825 stats->ifHCOutMulticastPkts +=
4827 stats->ifHCOutBroadcastPkts +=
4830 stats->ifHCInOctets +=
4832 stats->etherStatsFragments +=
4834 stats->ifHCInUcastPkts +=
4836 stats->ifHCInMulticastPkts +=
4838 stats->ifHCInBroadcastPkts +=
4840 stats->dot3StatsFCSErrors +=
4842 stats->dot3StatsAlignmentErrors +=
4844 stats->xonPauseFramesReceived +=
4846 stats->xoffPauseFramesReceived +=
4848 stats->macControlFramesReceived +=
4850 stats->xoffStateEntered +=
4852 stats->dot3StatsFramesTooLong +=
4854 stats->etherStatsJabbers +=
4856 stats->etherStatsUndersizePkts +=
4859 stats->FramesDroppedDueToFilters +=
4861 stats->DmaWriteQueueFull +=
4863 stats->DmaWriteHighPriQueueFull +=
4865 stats->NoMoreRxBDs +=
4886 if (sc->bge_asicrev != BGE_ASICREV_BCM5717 &&
4887 sc->bge_chipid != BGE_CHIPID_BCM5719_A0 &&
4888 sc->bge_chipid != BGE_CHIPID_BCM5720_A0)
4889 stats->InputDiscards +=
4891 stats->InputErrors +=
4893 stats->RecvThresholdHit +=
4896 if (sc->bge_flags & BGE_FLAG_RDMA_BUG) {
4902 if (stats->ifHCOutUcastPkts + stats->ifHCOutMulticastPkts +
4903 stats->ifHCOutBroadcastPkts > BGE_NUM_RDMA_CHANNELS) {
4905 if (sc->bge_asicrev == BGE_ASICREV_BCM5719)
4910 sc->bge_flags &= ~BGE_FLAG_RDMA_BUG;
4964 ifp = sc->bge_ifp;
4972 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, cnt - sc->bge_tx_collisions);
4973 sc->bge_tx_collisions = cnt;
4976 if_inc_counter(ifp, IFCOUNTER_IERRORS, cnt - sc->bge_rx_nobds);
4977 sc->bge_rx_nobds = cnt;
4979 if_inc_counter(ifp, IFCOUNTER_IERRORS, cnt - sc->bge_rx_inerrs);
4980 sc->bge_rx_inerrs = cnt;
4982 if_inc_counter(ifp, IFCOUNTER_IERRORS, cnt - sc->bge_rx_discards);
4983 sc->bge_rx_discards = cnt;
4986 if_inc_counter(ifp, IFCOUNTER_OERRORS, cnt - sc->bge_tx_discards);
4987 sc->bge_tx_discards = cnt;
5003 int padlen = ETHER_MIN_NOPAD - m->m_pkthdr.len;
5006 /* If there's only the packet-header and we can pad there, use it. */
5007 if (m->m_pkthdr.len == m->m_len && M_WRITABLE(m) &&
5015 for (last = m; last->m_next != NULL; last = last->m_next);
5023 n->m_len = 0;
5024 last->m_next = n;
5029 /* Now zero the pad area, to avoid the bge cksum-assist bug. */
5030 memset(mtod(last, caddr_t) + last->m_len, 0, padlen);
5031 last->m_len += padlen;
5032 m->m_pkthdr.len += padlen;
5044 * If device receive two back-to-back send BDs with less than
5046 * back-to-back send BDs must in the same frame for this failure
5047 * to occur. Scan mbuf chains and see whether two back-to-back
5051 for (n = m, found = 0; n != NULL; n = n->m_next) {
5052 if (n->m_len < 8) {
5092 poff = sizeof(struct ether_header) + (ip->ip_hl << 2);
5097 m = m_pullup(m, poff + (tcp->th_off << 2));
5104 *mss = m->m_pkthdr.tso_segsz;
5106 ip->ip_sum = 0;
5107 ip->ip_len = htons(*mss + (ip->ip_hl << 2) + (tcp->th_off << 2));
5110 tcp->th_sum = 0;
5113 * TSO depending on ASIC revision. Due to TSO-capable firmware
5118 hlen = ((ip->ip_hl << 2) + (tcp->th_off << 2)) >> 2;
5119 if (sc->bge_flags & BGE_FLAG_TSO3) {
5129 *flags |= ((hlen & 0xF8) << 7) | ((hlen & 0x4) << 2);
5160 if ((sc->bge_flags & BGE_FLAG_SHORT_DMA_BUG) != 0 &&
5161 m->m_next != NULL) {
5167 if ((m->m_pkthdr.csum_flags & CSUM_TSO) != 0) {
5173 } else if ((m->m_pkthdr.csum_flags & sc->bge_csum_features) != 0) {
5174 if (m->m_pkthdr.csum_flags & CSUM_IP)
5176 if (m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) {
5178 if (m->m_pkthdr.len < ETHER_MIN_NOPAD &&
5187 if ((m->m_pkthdr.csum_flags & CSUM_TSO) == 0) {
5188 if (sc->bge_flags & BGE_FLAG_JUMBO_FRAME &&
5189 m->m_pkthdr.len > ETHER_MAX_LEN)
5191 if (sc->bge_forced_collapse > 0 &&
5192 (sc->bge_flags & BGE_FLAG_PCIE) != 0 && m->m_next != NULL) {
5198 if (sc->bge_forced_collapse == 1)
5202 sc->bge_forced_collapse);
5209 map = sc->bge_cdata.bge_tx_dmamap[idx];
5210 error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_tx_mtag, map, m, segs,
5220 error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_tx_mtag, map,
5231 if (sc->bge_txcnt + nsegs >= BGE_TX_RING_CNT) {
5232 bus_dmamap_unload(sc->bge_cdata.bge_tx_mtag, map);
5236 bus_dmamap_sync(sc->bge_cdata.bge_tx_mtag, map, BUS_DMASYNC_PREWRITE);
5238 if (m->m_flags & M_VLANTAG) {
5240 vlan_tag = m->m_pkthdr.ether_vtag;
5243 if (sc->bge_asicrev == BGE_ASICREV_BCM5762 &&
5244 (m->m_pkthdr.csum_flags & CSUM_TSO) != 0) {
5252 d = &sc->bge_ldata.bge_tx_ring[idx];
5253 d->bge_addr.bge_addr_lo = BGE_ADDR_LO(segs[i].ds_addr);
5254 d->bge_addr.bge_addr_hi = BGE_ADDR_HI(segs[i].ds_addr);
5255 d->bge_len = segs[i].ds_len;
5256 if (d->bge_addr.bge_addr_lo + segs[i].ds_len + mss <
5257 d->bge_addr.bge_addr_lo)
5259 d->bge_flags = csum_flags;
5260 d->bge_vlan_tag = vlan_tag;
5261 d->bge_mss = mss;
5262 if (i == nsegs - 1)
5266 if (i != nsegs - 1) {
5267 bus_dmamap_sync(sc->bge_cdata.bge_tx_mtag, map,
5269 bus_dmamap_unload(sc->bge_cdata.bge_tx_mtag, map);
5276 d = &sc->bge_ldata.bge_tx_ring[idx];
5277 d->bge_addr.bge_addr_lo = BGE_ADDR_LO(segs[i].ds_addr);
5278 d->bge_addr.bge_addr_hi = BGE_ADDR_HI(segs[i].ds_addr);
5279 d->bge_len = segs[i].ds_len;
5280 d->bge_flags = csum_flags;
5281 d->bge_vlan_tag = vlan_tag;
5282 d->bge_mss = mss;
5283 if (i == nsegs - 1)
5289 /* Mark the last segment as end of packet... */
5290 d->bge_flags |= BGE_TXBDFLAG_END;
5297 sc->bge_cdata.bge_tx_dmamap[*txidx] = sc->bge_cdata.bge_tx_dmamap[idx];
5298 sc->bge_cdata.bge_tx_dmamap[idx] = map;
5299 sc->bge_cdata.bge_tx_chain[idx] = m;
5300 sc->bge_txcnt += nsegs;
5323 if (!sc->bge_link ||
5328 prodidx = sc->bge_tx_prodidx;
5331 if (sc->bge_txcnt > BGE_TX_RING_CNT - 16) {
5368 bus_dmamap_sync(sc->bge_cdata.bge_tx_ring_tag,
5369 sc->bge_cdata.bge_tx_ring_map, BUS_DMASYNC_PREWRITE);
5373 if (sc->bge_chiprev == BGE_CHIPREV_5700_BX)
5376 sc->bge_tx_prodidx = prodidx;
5379 sc->bge_timer = BGE_TX_TIMEOUT;
5406 ifp = sc->bge_ifp;
5427 device_printf(sc->bge_dev, "initialization failure\n");
5431 ifp = sc->bge_ifp;
5439 m = (uint16_t *)if_getlladdr(sc->bge_ifp);
5453 if (sc->bge_forced_udpcsum == 0)
5454 sc->bge_csum_features &= ~CSUM_UDP;
5456 sc->bge_csum_features |= CSUM_UDP;
5460 if_sethwassistbits(ifp, sc->bge_csum_features, 0);
5465 device_printf(sc->bge_dev, "no memory for std Rx buffers.\n");
5475 if (sc->bge_chipid == BGE_CHIPID_BCM5705_A0) {
5480 if (v == (MCLBYTES - ETHER_ALIGN))
5484 device_printf (sc->bge_dev,
5491 ETHER_VLAN_ENCAP_LEN > (MCLBYTES - ETHER_ALIGN)) {
5493 device_printf(sc->bge_dev,
5501 sc->bge_rx_saved_considx = 0;
5504 sc->bge_rx_discards = sc->bge_tx_discards = sc->bge_tx_collisions = 0;
5511 if (BGE_IS_5755_PLUS(sc) || sc->bge_asicrev == BGE_ASICREV_BCM5906)
5513 if (sc->bge_asicrev == BGE_ASICREV_BCM5720 ||
5514 sc->bge_asicrev == BGE_ASICREV_BCM5762) {
5527 if (sc->bge_asicrev == BGE_ASICREV_BCM5762)
5571 callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc);
5610 ifm = &sc->bge_ifmedia;
5613 if (sc->bge_flags & BGE_FLAG_TBI) {
5614 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
5616 switch(IFM_SUBTYPE(ifm->ifm_media)) {
5623 if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
5640 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) {
5655 sc->bge_link_evt++;
5656 mii = device_get_softc(sc->bge_miibus);
5657 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
5673 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
5674 sc->bge_flags & BGE_FLAG_5788)
5697 if (sc->bge_flags & BGE_FLAG_TBI) {
5698 ifmr->ifm_status = IFM_AVALID;
5699 ifmr->ifm_active = IFM_ETHER;
5702 ifmr->ifm_status |= IFM_ACTIVE;
5704 ifmr->ifm_active |= IFM_NONE;
5708 ifmr->ifm_active |= IFM_1000_SX;
5710 ifmr->ifm_active |= IFM_HDX;
5712 ifmr->ifm_active |= IFM_FDX;
5717 mii = device_get_softc(sc->bge_miibus);
5719 ifmr->ifm_active = mii->mii_media_active;
5720 ifmr->ifm_status = mii->mii_media_status;
5736 (sc->bge_flags & BGE_FLAG_JUMBO_STD)) {
5737 if (ifr->ifr_mtu < ETHERMIN ||
5738 ifr->ifr_mtu > BGE_JUMBO_MTU) {
5742 } else if (ifr->ifr_mtu < ETHERMIN || ifr->ifr_mtu > ETHERMTU) {
5747 if (if_getmtu(ifp) != ifr->ifr_mtu) {
5748 if_setmtu(ifp, ifr->ifr_mtu);
5763 * a full re-init means reloading the firmware and
5768 flags = if_getflags(ifp) ^ sc->bge_if_flags;
5780 sc->bge_if_flags = if_getflags(ifp);
5795 if (sc->bge_flags & BGE_FLAG_TBI) {
5797 &sc->bge_ifmedia, command);
5799 mii = device_get_softc(sc->bge_miibus);
5801 &mii->mii_media, command);
5805 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
5808 if (ifr->ifr_reqcap & IFCAP_POLLING) {
5835 sc->bge_csum_features, 0);
5838 sc->bge_csum_features);
5892 if (sc->bge_timer == 0 || --sc->bge_timer)
5904 sc->bge_timer = BGE_TX_TIMEOUT;
5913 sc->bge_timer = BGE_TX_TIMEOUT;
5922 ifp = sc->bge_ifp;
5924 if_printf(ifp, "watchdog timeout -- resetting\n");
5957 ifp = sc->bge_ifp;
5959 callout_stop(&sc->bge_stat_ch);
6021 if (sc->bge_asf_mode & ASF_STACKUP)
6036 sc->bge_tx_saved_considx = BGE_TXCONS_UNSET;
6039 if (bootverbose && sc->bge_link)
6040 if_printf(sc->bge_ifp, "link DOWN\n");
6041 sc->bge_link = 0;
6084 ifp = sc->bge_ifp;
6104 sc->bge_link_evt = 0;
6121 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
6122 sc->bge_chipid != BGE_CHIPID_BCM5700_B2) {
6125 mii = device_get_softc(sc->bge_miibus);
6127 if (!sc->bge_link &&
6128 mii->mii_media_status & IFM_ACTIVE &&
6129 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
6130 sc->bge_link++;
6132 if_printf(sc->bge_ifp, "link UP\n");
6133 } else if (sc->bge_link &&
6134 (!(mii->mii_media_status & IFM_ACTIVE) ||
6135 IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) {
6136 sc->bge_link = 0;
6138 if_printf(sc->bge_ifp, "link DOWN\n");
6144 bge_miibus_readreg(sc->bge_dev, sc->bge_phy_addr,
6146 bge_miibus_writereg(sc->bge_dev, sc->bge_phy_addr,
6152 if (sc->bge_flags & BGE_FLAG_TBI) {
6155 if (!sc->bge_link) {
6156 sc->bge_link++;
6157 if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
6164 if_printf(sc->bge_ifp, "link UP\n");
6165 if_link_state_change(sc->bge_ifp,
6168 } else if (sc->bge_link) {
6169 sc->bge_link = 0;
6171 if_printf(sc->bge_ifp, "link DOWN\n");
6172 if_link_state_change(sc->bge_ifp, LINK_STATE_DOWN);
6174 } else if ((sc->bge_mi_mode & BGE_MIMODE_AUTOPOLL) != 0) {
6182 if (link != sc->bge_link ||
6183 sc->bge_asicrev == BGE_ASICREV_BCM5700) {
6184 mii = device_get_softc(sc->bge_miibus);
6186 if (!sc->bge_link &&
6187 mii->mii_media_status & IFM_ACTIVE &&
6188 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
6189 sc->bge_link++;
6191 if_printf(sc->bge_ifp, "link UP\n");
6192 } else if (sc->bge_link &&
6193 (!(mii->mii_media_status & IFM_ACTIVE) ||
6194 IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) {
6195 sc->bge_link = 0;
6197 if_printf(sc->bge_ifp, "link DOWN\n");
6205 mii = device_get_softc(sc->bge_miibus);
6207 bge_miibus_statchg(sc->bge_dev);
6222 ctx = device_get_sysctl_ctx(sc->bge_dev);
6223 children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->bge_dev));
6256 sc->bge_forced_collapse = 0;
6258 CTLFLAG_RWTUN, &sc->bge_forced_collapse, 0,
6262 sc->bge_msi = 1;
6264 CTLFLAG_RDTUN, &sc->bge_msi, 0, "Enable MSI");
6276 sc->bge_forced_udpcsum = 0;
6278 CTLFLAG_RWTUN, &sc->bge_forced_udpcsum, 0,
6430 stats = &sc->bge_mac_stats;
6435 &stats->FramesDroppedDueToFilters, "Frames Dropped Due to Filters");
6437 &stats->DmaWriteQueueFull, "NIC DMA Write Queue Full");
6439 &stats->DmaWriteHighPriQueueFull,
6442 &stats->NoMoreRxBDs, "NIC No More RX Buffer Descriptors");
6444 &stats->InputDiscards, "Discarded Input Frames");
6446 &stats->InputErrors, "Input Errors");
6448 &stats->RecvThresholdHit, "NIC Recv Threshold Hit");
6454 &stats->ifHCInOctets, "Inbound Octets");
6456 &stats->etherStatsFragments, "Fragments");
6458 &stats->ifHCInUcastPkts, "Inbound Unicast Packets");
6460 &stats->ifHCInMulticastPkts, "Inbound Multicast Packets");
6462 &stats->ifHCInBroadcastPkts, "Inbound Broadcast Packets");
6464 &stats->dot3StatsFCSErrors, "FCS Errors");
6466 &stats->dot3StatsAlignmentErrors, "Alignment Errors");
6468 &stats->xonPauseFramesReceived, "XON Pause Frames Received");
6470 &stats->xoffPauseFramesReceived, "XOFF Pause Frames Received");
6472 &stats->macControlFramesReceived, "MAC Control Frames Received");
6474 &stats->xoffStateEntered, "XOFF State Entered");
6476 &stats->dot3StatsFramesTooLong, "Frames Too Long");
6478 &stats->etherStatsJabbers, "Jabbers");
6480 &stats->etherStatsUndersizePkts, "Undersized Packets");
6486 &stats->ifHCOutOctets, "Outbound Octets");
6488 &stats->etherStatsCollisions, "TX Collisions");
6490 &stats->outXonSent, "XON Sent");
6492 &stats->outXoffSent, "XOFF Sent");
6494 &stats->dot3StatsInternalMacTransmitErrors,
6497 &stats->dot3StatsSingleCollisionFrames, "Single Collision Frames");
6499 &stats->dot3StatsMultipleCollisionFrames,
6502 &stats->dot3StatsDeferredTransmissions, "Deferred Transmissions");
6504 &stats->dot3StatsExcessiveCollisions, "Excessive Collisions");
6506 &stats->dot3StatsLateCollisions, "Late Collisions");
6508 &stats->ifHCOutUcastPkts, "Outbound Unicast Packets");
6510 &stats->ifHCOutMulticastPkts, "Outbound Multicast Packets");
6512 &stats->ifHCOutBroadcastPkts, "Outbound Broadcast Packets");
6540 result = -1;
6542 if (error || (req->newptr == NULL))
6548 if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
6549 sc->bge_chipid != BGE_CHIPID_BCM5700_C0)
6553 sbdata = (uint16_t *)sc->bge_ldata.bge_status_block;
6556 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
6557 sc->bge_cdata.bge_status_map,
6579 printf(" - 5717 Plus\n");
6581 printf(" - 5755 Plus\n");
6583 printf(" - 575X Plus\n");
6585 printf(" - 5705 Plus\n");
6587 printf(" - 5714 Family\n");
6589 printf(" - 5700 Family\n");
6590 if (sc->bge_flags & BGE_FLAG_JUMBO)
6591 printf(" - Supports Jumbo Frames\n");
6592 if (sc->bge_flags & BGE_FLAG_PCIX)
6593 printf(" - PCI-X Bus\n");
6594 if (sc->bge_flags & BGE_FLAG_PCIE)
6595 printf(" - PCI Express Bus\n");
6596 if (sc->bge_phy_flags & BGE_PHY_NO_3LED)
6597 printf(" - No 3 LEDs\n");
6598 if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG)
6599 printf(" - RX Alignment Bug\n");
6613 result = -1;
6615 if (error || (req->newptr == NULL))
6635 result = -1;
6637 if (error || (req->newptr == NULL))
6657 result = -1;
6659 if (error || (req->newptr == NULL))
6702 if (sc->bge_asicrev == BGE_ASICREV_BCM5906)
6713 if (sc->bge_asicrev == BGE_ASICREV_BCM5906)
6749 stats = &sc->bge_mac_stats;
6753 return (stats->NoMoreRxBDs + stats->InputDiscards +
6754 stats->InputErrors);
6756 return (stats->etherStatsCollisions);
6772 * by two actual rings, for cluster- and jumbo-sized mbufs.
6779 if ((sc->bge_flags & BGE_FLAG_JUMBO_STD) != 0 &&
6780 (if_getmtu(sc->bge_ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN +
6781 ETHER_VLAN_ENCAP_LEN > (MCLBYTES - ETHER_ALIGN)))
6805 prodidx = sc->bge_tx_prodidx;
6823 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
6824 sc->bge_cdata.bge_status_map,
6827 rx_prod = sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx;
6828 tx_cons = sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx;
6830 bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
6831 sc->bge_cdata.bge_status_map,