Lines Matching +full:pre +full:- +full:calibration
1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
85 .totalSizeDesired = { -55, -55, -55, -55, -62 }, in ar9287AniSetup()
86 .coarseHigh = { -14, -14, -14, -14, -12 }, in ar9287AniSetup()
87 .coarseLow = { -64, -64, -64, -64, -70 }, in ar9287AniSetup()
88 .firpwr = { -78, -78, -78, -78, -80 }, in ar9287AniSetup()
102 AH5416(ah)->ah_ani_function &= ~ HAL_ANI_NOISE_IMMUNITY_LEVEL; in ar9287AniSetup()
137 ah = &ahp->ah_priv.h; in ar9287Attach()
142 AH_PRIVATE(ah)->ah_eepromRead = ath_hal_EepromDataRead; in ar9287Attach()
143 AH_PRIVATE(ah)->ah_eepromWrite = NULL; in ar9287Attach()
144 ah->ah_eepromdata = eepromdata; in ar9287Attach()
149 AH5416(ah)->ah_initPLL = ar9280InitPLL; in ar9287Attach()
151 ah->ah_setAntennaSwitch = ar9287SetAntennaSwitch; in ar9287Attach()
152 ah->ah_configPCIE = ar9287ConfigPCIE; in ar9287Attach()
153 ah->ah_disablePCIE = ar9287DisablePCIE; in ar9287Attach()
155 AH5416(ah)->ah_cal.iqCalData.calData = &ar9287_iq_cal; in ar9287Attach()
156 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9287_adc_gain_cal; in ar9287Attach()
157 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9287_adc_dc_cal; in ar9287Attach()
158 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9287_adc_init_dc_cal; in ar9287Attach()
159 /* Better performance without ADC Gain Calibration */ in ar9287Attach()
160 AH5416(ah)->ah_cal.suppCals = ADC_DC_CAL | IQ_MISMATCH_CAL; in ar9287Attach()
162 AH5416(ah)->ah_spurMitigate = ar9280SpurMitigate; in ar9287Attach()
163 AH5416(ah)->ah_writeIni = ar9287WriteIni; in ar9287Attach()
165 ah->ah_setTxPower = ar9287SetTransmitPower; in ar9287Attach()
166 ah->ah_setBoardValues = ar9287SetBoardValues; in ar9287Attach()
168 AH5416(ah)->ah_olcInit = ar9287olcInit; in ar9287Attach()
169 AH5416(ah)->ah_olcTempCompensation = ar9287olcTemperatureCompensation; in ar9287Attach()
170 //AH5416(ah)->ah_setPowerCalTable = ar9287SetPowerCalTable; in ar9287Attach()
171 AH5416(ah)->ah_cal_initcal = ar9287InitCalHardware; in ar9287Attach()
172 AH5416(ah)->ah_cal_pacal = ar9287PACal; in ar9287Attach()
174 /* XXX NF calibration */ in ar9287Attach()
175 /* XXX Ini override? (IFS vars - since the kiwi mac clock is faster?) */ in ar9287Attach()
176 /* XXX what else is kiwi-specific in the radio/calibration pathway? */ in ar9287Attach()
178 AH5416(ah)->ah_rx_chainmask = AR9287_DEFAULT_RXCHAINMASK; in ar9287Attach()
179 AH5416(ah)->ah_tx_chainmask = AR9287_DEFAULT_TXCHAINMASK; in ar9287Attach()
201 /* NB: include chip type to differentiate from pre-Sowl versions */ in ar9287Attach()
202 AH_PRIVATE(ah)->ah_macVersion = in ar9287Attach()
204 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); in ar9287Attach()
205 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; in ar9287Attach()
207 /* Don't support Kiwi < 1.2; those are pre-release chips */ in ar9287Attach()
215 HAL_INI_INIT(&ahp->ah_ini_modes, ar9287Modes_9287_1_1, 6); in ar9287Attach()
216 HAL_INI_INIT(&ahp->ah_ini_common, ar9287Common_9287_1_1, 2); in ar9287Attach()
219 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, in ar9287Attach()
226 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, in ar9287Attach()
231 HAL_INI_INIT(&ahp9287->ah_ini_cckFirNormal, in ar9287Attach()
233 HAL_INI_INIT(&ahp9287->ah_ini_cckFirJapan2484, in ar9287Attach()
248 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); in ar9287Attach()
251 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", in ar9287Attach()
264 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); in ar9287Attach()
265 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { in ar9287Attach()
270 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { in ar9287Attach()
271 AH_PRIVATE(ah)->ah_analog5GhzRev = in ar9287Attach()
279 AH_PRIVATE(ah)->ah_analog5GhzRev); in ar9287Attach()
292 * We only implement open-loop TX power control in ar9287Attach()
296 ath_hal_printf(ah, "[ath] AR9287 w/ closed-loop TX power control" in ar9287Attach()
312 HAL_INI_INIT(&ahp9287->ah_ini_rxgain, ar9287Modes_rx_gain_9287_1_1, 6); in ar9287Attach()
315 HAL_INI_INIT(&ahp9287->ah_ini_txgain, ar9287Modes_tx_gain_9287_1_1, 6); in ar9287Attach()
325 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); in ar9287Attach()
333 AH_PRIVATE(ah)->ah_currentRD = in ar9287Attach()
335 AH_PRIVATE(ah)->ah_currentRDext = AR9287_RDEXT_DEFAULT; in ar9287Attach()
343 if (ahp->ah_miscMode != 0) in ar9287Attach()
344 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); in ar9287Attach()
349 AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ; in ar9287Attach()
350 AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ; in ar9287Attach()
351 AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9287_2GHZ; in ar9287Attach()
352 AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_5GHZ; in ar9287Attach()
353 AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_5GHZ; in ar9287Attach()
354 AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9287_5GHZ; in ar9287Attach()
356 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); in ar9287Attach()
363 ah->ah_detach(ah); in ar9287Attach()
372 if (AH_PRIVATE(ah)->ah_ispcie && !restore) { in ar9287ConfigPCIE()
373 ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0); in ar9287ConfigPCIE()
416 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, modesIndex, regWrites); in ar9287WriteIni()
417 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_rxgain, modesIndex, regWrites); in ar9287WriteIni()
418 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_txgain, modesIndex, regWrites); in ar9287WriteIni()
419 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common, 1, regWrites); in ar9287WriteIni()
430 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; in ar9287FillCapabilityInfo()
434 pCap->halNumGpioPins = 10; in ar9287FillCapabilityInfo()
435 pCap->halWowSupport = AH_TRUE; in ar9287FillCapabilityInfo()
436 pCap->halWowMatchPatternExact = AH_TRUE; in ar9287FillCapabilityInfo()
438 pCap->halWowMatchPatternDword = AH_TRUE; in ar9287FillCapabilityInfo()
441 pCap->halCSTSupport = AH_TRUE; in ar9287FillCapabilityInfo()
442 pCap->halRifsRxSupport = AH_TRUE; in ar9287FillCapabilityInfo()
443 pCap->halRifsTxSupport = AH_TRUE; in ar9287FillCapabilityInfo()
444 pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */ in ar9287FillCapabilityInfo()
445 pCap->halExtChanDfsSupport = AH_TRUE; in ar9287FillCapabilityInfo()
446 pCap->halUseCombinedRadarRssi = AH_TRUE; in ar9287FillCapabilityInfo()
449 pCap->halBtCoexSupport = AH_TRUE; in ar9287FillCapabilityInfo()
451 pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */ in ar9287FillCapabilityInfo()
452 pCap->hal4kbSplitTransSupport = AH_FALSE; in ar9287FillCapabilityInfo()
453 /* Disable this so Block-ACK works correctly */ in ar9287FillCapabilityInfo()
454 pCap->halHasRxSelfLinkedTail = AH_FALSE; in ar9287FillCapabilityInfo()
455 pCap->halPSPollBroken = AH_FALSE; in ar9287FillCapabilityInfo()
456 pCap->halSpectralScanSupport = AH_TRUE; in ar9287FillCapabilityInfo()
458 /* Hardware supports (at least) single-stream STBC TX/RX */ in ar9287FillCapabilityInfo()
459 pCap->halRxStbcSupport = 1; in ar9287FillCapabilityInfo()
460 pCap->halTxStbcSupport = 1; in ar9287FillCapabilityInfo()
462 /* Hardware supports short-GI w/ 20MHz */ in ar9287FillCapabilityInfo()
463 pCap->halHTSGI20Support = 1; in ar9287FillCapabilityInfo()
465 pCap->halEnhancedDfsSupport = AH_TRUE; in ar9287FillCapabilityInfo()
471 * This has been disabled - having the HAL flip chainmasks on/off
474 * for legacy and MCS0-15 when 11n is fully functioning.