Lines Matching +full:brr +full:- +full:mode
1 /*-
120 #define AL_ETH_MAC_TABLE_DROP_IDX (AL_ETH_FWD_MAC_NUM - 1)
121 #define AL_ETH_MAC_TABLE_BROADCAST_IDX (AL_ETH_MAC_TABLE_DROP_IDX - 1)
175 #define AL_RX_LOCK_INIT(_sc) mtx_init(&((_sc)->if_rx_lock), "ALRXL", "ALRXL", MTX_DEF)
176 #define AL_RX_LOCK(_sc) mtx_lock(&((_sc)->if_rx_lock))
177 #define AL_RX_UNLOCK(_sc) mtx_unlock(&((_sc)->if_rx_lock))
231 /* flag for napi-like mbuf processing, controlled from sysctl */
291 CTLFLAG_RW, &napi, 0, "Use pseudo-napi mechanism");
294 adapter->dev = dev;
295 adapter->board_type = ALPINE_INTEGRATED;
296 snprintf(adapter->name, AL_ETH_NAME_MAX_LEN, "%s",
303 adapter->udma_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
305 if (adapter->udma_res == NULL) {
306 device_printf(adapter->dev,
311 adapter->udma_base = al_bus_dma_to_va(rman_get_bustag(adapter->udma_res),
312 rman_get_bushandle(adapter->udma_res));
314 adapter->mac_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
316 if (adapter->mac_res == NULL) {
317 device_printf(adapter->dev,
322 adapter->mac_base = al_bus_dma_to_va(rman_get_bustag(adapter->mac_res),
323 rman_get_bushandle(adapter->mac_res));
326 adapter->ec_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &bar_ec,
328 if (adapter->ec_res == NULL) {
329 device_printf(adapter->dev,
334 adapter->ec_base = al_bus_dma_to_va(rman_get_bustag(adapter->ec_res),
335 rman_get_bushandle(adapter->ec_res));
337 adapter->netdev = ifp = if_alloc(IFT_ETHER);
351 adapter->if_flags = if_getflags(ifp);
361 adapter->id_number = g_adapters_count;
363 if (adapter->board_type == ALPINE_INTEGRATED) {
364 dev_id = pci_get_device(adapter->dev);
365 rev_id = pci_get_revid(adapter->dev);
367 al_eth_fpga_read_pci_config(adapter->internal_pcie_base,
369 al_eth_fpga_read_pci_config(adapter->internal_pcie_base,
373 adapter->dev_id = dev_id;
374 adapter->rev_id = rev_id;
377 adapter->tx_ring_count = AL_ETH_DEFAULT_TX_SW_DESCS;
378 adapter->tx_descs_count = AL_ETH_DEFAULT_TX_HW_DESCS;
379 adapter->rx_ring_count = AL_ETH_DEFAULT_RX_DESCS;
380 adapter->rx_descs_count = AL_ETH_DEFAULT_RX_DESCS;
382 adapter->num_tx_queues = AL_ETH_NUM_QUEUES;
383 adapter->num_rx_queues = AL_ETH_NUM_QUEUES;
385 adapter->small_copy_len = AL_ETH_DEFAULT_SMALL_PACKET_LEN;
386 adapter->link_poll_interval = AL_ETH_DEFAULT_LINK_POLL_INTERVAL;
387 adapter->max_rx_buff_alloc_size = AL_ETH_DEFAULT_MAX_RX_BUFF_ALLOC_SIZE;
389 al_eth_req_rx_buff_size(adapter, if_getmtu(adapter->netdev));
391 adapter->link_config.force_1000_base_x = AL_ETH_DEFAULT_FORCE_1000_BASEX;
397 if (adapter->mac_mode == AL_ETH_MAC_MODE_10GbE_Serial) {
398 ifmedia_init(&adapter->media, IFM_IMASK,
400 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_LX, 0, NULL);
401 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_LR, 0, NULL);
402 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
403 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
416 mtx_init(&adapter->stats_mtx, "AlStatsMtx", NULL, MTX_DEF);
417 mtx_init(&adapter->wd_mtx, "AlWdMtx", NULL, MTX_DEF);
418 callout_init_mtx(&adapter->stats_callout, &adapter->stats_mtx, 0);
419 callout_init_mtx(&adapter->wd_callout, &adapter->wd_mtx, 0);
421 ether_ifattach(ifp, adapter->mac_addr);
424 if (adapter->mac_mode == AL_ETH_MAC_MODE_RGMII) {
428 err = mii_attach(adapter->dev, &adapter->miibus, adapter->netdev,
432 device_printf(adapter->dev, "attaching PHYs failed\n");
436 adapter->mii = device_get_softc(adapter->miibus);
442 bus_release_resource(dev, SYS_RES_MEMORY, bar_ec, adapter->ec_res);
444 bus_release_resource(dev, SYS_RES_MEMORY, bar_mac, adapter->mac_res);
446 bus_release_resource(dev, SYS_RES_MEMORY, bar_udma, adapter->udma_res);
457 ether_ifdetach(adapter->netdev);
459 mtx_destroy(&adapter->stats_mtx);
460 mtx_destroy(&adapter->wd_mtx);
464 bus_release_resource(dev, SYS_RES_IRQ, 0, adapter->irq_res);
465 bus_release_resource(dev, SYS_RES_MEMORY, 0, adapter->ec_res);
466 bus_release_resource(dev, SYS_RES_MEMORY, 0, adapter->mac_res);
467 bus_release_resource(dev, SYS_RES_MEMORY, 0, adapter->udma_res);
528 adapter->serdes_init = false;
530 serdes_base = alpine_serdes_resource_get(adapter->serdes_grp);
532 device_printf(adapter->dev, "serdes_base get failed!\n");
538 al_serdes_handle_grp_init(serdes_base, adapter->serdes_grp,
539 &adapter->serdes_obj);
541 adapter->serdes_init = true;
550 *paddr = segs->ds_addr;
558 uint32_t maxsize = ((size - 1)/PAGE_SIZE + 1) * PAGE_SIZE;
603 memcpy(entry.addr, adapter->mac_addr, sizeof(adapter->mac_addr));
611 device_printf_dbg(adapter->dev,
615 al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
634 device_printf_dbg(adapter->dev,
638 al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
655 device_printf_dbg(adapter->dev,
659 al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
676 device_printf_dbg(adapter->dev, "%s: %s promiscuous mode\n",
679 al_eth_fwd_mac_table_set(&adapter->hal_adapter,
694 al_eth_thash_table_set(&adapter->hal_adapter, idx, udma, queue);
723 al_eth_fsm_table_set(&adapter->hal_adapter, i, val);
733 device_printf_dbg(adapter->dev, "%s: clear entry %d\n", __func__, idx);
735 al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
741 struct al_eth_adapter_params *params = &adapter->eth_hal_params;
744 /* params->dev_id = adapter->dev_id; */
745 params->rev_id = adapter->rev_id;
746 params->udma_id = 0;
747 params->enable_rx_parser = 1; /* enable rx epe parser*/
748 params->udma_regs_base = adapter->udma_base; /* UDMA register base address */
749 params->ec_regs_base = adapter->ec_base; /* Ethernet controller registers base address */
750 params->mac_regs_base = adapter->mac_base; /* Ethernet MAC registers base address */
751 params->name = adapter->name;
752 params->serdes_lane = adapter->serdes_lane;
754 rc = al_eth_adapter_init(&adapter->hal_adapter, params);
756 device_printf(adapter->dev, "%s failed at hal init!\n",
759 if ((adapter->board_type == ALPINE_NIC) ||
760 (adapter->board_type == ALPINE_FPGA_NIC)) {
761 /* in pcie NIC mode, force eth UDMA to access PCIE0 using the vmid */
772 al_udma_gen_tgtid_conf_set(adapter->udma_base, &conf);
783 params.adapter = &adapter->hal_adapter;
784 params.serdes_obj = &adapter->serdes_obj;
785 params.lane = adapter->serdes_lane;
786 params.sfp_detection = adapter->sfp_detection_needed;
787 if (adapter->sfp_detection_needed == true) {
788 params.sfp_bus_id = adapter->i2c_adapter_id;
792 if (adapter->sfp_detection_needed == false) {
793 switch (adapter->mac_mode) {
795 if ((adapter->lt_en != 0) && (adapter->an_en != 0))
809 params.link_training = adapter->lt_en;
811 params.static_values = !adapter->dont_override_serdes;
815 params.retimer_exist = adapter->retimer.exist;
816 params.retimer_bus_id = adapter->retimer.bus_id;
817 params.retimer_i2c_addr = adapter->retimer.i2c_addr;
818 params.retimer_channel = adapter->retimer.channel;
820 al_eth_lm_init(&adapter->lm_context, ¶ms);
827 if (adapter->board_type == ALPINE_NIC) {
828 adapter->mac_mode = AL_ETH_MAC_MODE_10GbE_Serial;
829 adapter->sfp_detection_needed = false;
830 adapter->phy_exist = false;
831 adapter->an_en = false;
832 adapter->lt_en = false;
833 adapter->ref_clk_freq = AL_ETH_REF_FREQ_375_MHZ;
834 adapter->mdio_freq = AL_ETH_DEFAULT_MDIO_FREQ_KHZ;
835 } else if (adapter->board_type == ALPINE_FPGA_NIC) {
836 adapter->mac_mode = AL_ETH_MAC_MODE_SGMII;
837 adapter->sfp_detection_needed = false;
838 adapter->phy_exist = false;
839 adapter->an_en = false;
840 adapter->lt_en = false;
841 adapter->ref_clk_freq = AL_ETH_REF_FREQ_375_MHZ;
842 adapter->mdio_freq = AL_ETH_DEFAULT_MDIO_FREQ_KHZ;
847 adapter->auto_speed = false;
849 rc = al_eth_board_params_get(adapter->mac_base, ¶ms);
851 device_printf(adapter->dev,
853 return (-1);
856 adapter->phy_exist = params.phy_exist == true;
857 adapter->phy_addr = params.phy_mdio_addr;
858 adapter->an_en = params.autoneg_enable;
859 adapter->lt_en = params.kr_lt_enable;
860 adapter->serdes_grp = params.serdes_grp;
861 adapter->serdes_lane = params.serdes_lane;
862 adapter->sfp_detection_needed = params.sfp_plus_module_exist;
863 adapter->i2c_adapter_id = params.i2c_adapter_id;
864 adapter->ref_clk_freq = params.ref_clk_freq;
865 adapter->dont_override_serdes = params.dont_override_serdes;
866 adapter->link_config.active_duplex = !params.half_duplex;
867 adapter->link_config.autoneg = !params.an_disable;
868 adapter->link_config.force_1000_base_x = params.force_1000_base_x;
869 adapter->retimer.exist = params.retimer_exist;
870 adapter->retimer.bus_id = params.retimer_bus_id;
871 adapter->retimer.i2c_addr = params.retimer_i2c_addr;
872 adapter->retimer.channel = params.retimer_channel;
876 device_printf(adapter->dev,
879 adapter->link_config.active_speed = 1000;
882 adapter->link_config.active_speed = 100;
885 adapter->link_config.active_speed = 10;
891 device_printf(adapter->dev,
895 adapter->mdio_freq = AL_ETH_DEFAULT_MDIO_FREQ_KHZ;
898 adapter->mdio_freq = AL_ETH_MDIO_FREQ_1000_KHZ;
906 adapter->mac_mode = AL_ETH_MAC_MODE_SGMII;
908 adapter->mac_mode = AL_ETH_MAC_MODE_RGMII;
910 adapter->use_lm = false;
913 adapter->mac_mode = AL_ETH_MAC_MODE_SGMII;
914 adapter->use_lm = true;
917 adapter->mac_mode = AL_ETH_MAC_MODE_10GbE_Serial;
918 adapter->use_lm = true;
921 adapter->sfp_detection_needed = true;
922 adapter->auto_speed = false;
923 adapter->use_lm = true;
926 adapter->sfp_detection_needed = true;
927 adapter->auto_speed = true;
928 adapter->mac_mode_set = false;
929 adapter->use_lm = true;
931 adapter->mac_mode = AL_ETH_MAC_MODE_10GbE_Serial;
934 device_printf(adapter->dev,
937 return (-1);
940 device_printf(adapter->dev,
944 params.phy_mdio_addr, adapter->mdio_freq,
949 al_eth_mac_addr_read(adapter->ec_base, 0, adapter->mac_addr);
961 al_eth_board_params_get(adapter->mac_base, ¶ms);
962 al_eth_mac_addr_read(adapter->ec_base, 0, adapter->mac_addr);
963 if (adapter->board_type == ALPINE_INTEGRATED)
966 adapter->dev, adapter->mac_base);
970 adapter->internal_pcie_base, adapter->mac_base);
973 al_eth_board_params_set(adapter->mac_base, ¶ms);
974 al_eth_mac_addr_store(adapter->ec_base, 0, adapter->mac_addr);
984 for (i = 0; i < adapter->num_tx_queues; i++) {
985 struct al_eth_ring *ring = &adapter->tx_ring[i];
987 ring->ring_id = i;
988 ring->dev = adapter->dev;
989 ring->adapter = adapter;
990 ring->netdev = adapter->netdev;
991 al_udma_q_handle_get(&adapter->hal_adapter.tx_udma, i,
992 &ring->dma_q);
993 ring->sw_count = adapter->tx_ring_count;
994 ring->hw_count = adapter->tx_descs_count;
995 ring->unmask_reg_offset = al_udma_iofic_unmask_offset_get((struct unit_regs *)adapter->udma_base, AL_UDMA_IOFIC_LEVEL_PRIMARY, AL_INT_GROUP_C);
996 ring->unmask_val = ~(1 << i);
999 for (i = 0; i < adapter->num_rx_queues; i++) {
1000 struct al_eth_ring *ring = &adapter->rx_ring[i];
1002 ring->ring_id = i;
1003 ring->dev = adapter->dev;
1004 ring->adapter = adapter;
1005 ring->netdev = adapter->netdev;
1006 al_udma_q_handle_get(&adapter->hal_adapter.rx_udma, i, &ring->dma_q);
1007 ring->sw_count = adapter->rx_ring_count;
1008 ring->hw_count = adapter->rx_descs_count;
1009 ring->unmask_reg_offset = al_udma_iofic_unmask_offset_get(
1010 (struct unit_regs *)adapter->udma_base,
1012 ring->unmask_val = ~(1 << i);
1020 if_t ifp = adapter->netdev;
1049 if (rx_info->m != NULL)
1052 rx_info->data_size = adapter->rx_mbuf_sz;
1057 rx_info->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1058 rx_info->data_size);
1061 if (rx_info->m == NULL)
1064 rx_info->m->m_pkthdr.len = rx_info->m->m_len = adapter->rx_mbuf_sz;
1067 error = bus_dmamap_load_mbuf_sg(rx_ring->dma_buf_tag, rx_info->dma_map,
1068 rx_info->m, segs, &nsegs, BUS_DMA_NOWAIT);
1070 device_printf(rx_ring->dev, "failed to map mbuf, error = %d\n",
1072 m_freem(rx_info->m);
1073 rx_info->m = NULL;
1077 al_buf = &rx_info->al_buf;
1078 al_buf->addr = segs[0].ds_addr + AL_IP_ALIGNMENT_OFFSET;
1079 al_buf->len = rx_info->data_size - AL_IP_ALIGNMENT_OFFSET;
1088 struct al_eth_ring *rx_ring = &adapter->rx_ring[qid];
1092 next_to_use = rx_ring->next_to_use;
1097 &rx_ring->rx_buffer_info[next_to_use];
1101 device_printf(adapter->dev,
1106 rc = al_eth_rx_buffer_add(rx_ring->dma_q,
1107 &rx_info->al_buf, AL_ETH_RX_FLAGS_INT, NULL);
1109 device_printf(adapter->dev,
1118 device_printf(adapter->dev,
1119 "refilled rx queue %d with %d pages only - available %d\n",
1120 qid, i, al_udma_available_get(rx_ring->dma_q));
1123 al_eth_rx_buffer_action(rx_ring->dma_q, i);
1125 rx_ring->next_to_use = next_to_use;
1131 * al_eth_refill_all_rx_bufs - allocate all queues Rx buffers
1139 for (i = 0; i < adapter->num_rx_queues; i++)
1140 al_eth_refill_rx_bufs(adapter, i, AL_ETH_DEFAULT_RX_DESCS - 1);
1148 int qid = tx_ring->ring_id;
1150 total_done = al_eth_comp_tx_get(tx_ring->dma_q);
1151 device_printf_dbg(tx_ring->dev,
1153 next_to_clean = tx_ring->next_to_clean;
1159 tx_info = &tx_ring->tx_buffer_info[next_to_clean];
1161 if (tx_info->tx_descs > total_done)
1164 mbuf = tx_info->m;
1166 tx_info->m = NULL;
1168 device_printf_dbg(tx_ring->dev,
1172 bus_dmamap_unload(tx_ring->dma_buf_tag, tx_info->dma_map);
1175 total_done -= tx_info->tx_descs;
1179 tx_ring->next_to_clean = next_to_clean;
1181 device_printf_dbg(tx_ring->dev, "tx_poll: q %d done next to clean %x\n",
1195 uint32_t mss = m->m_pkthdr.tso_segsz;
1212 if ((m->m_pkthdr.csum_flags & CSUM_TSO) != 0)
1215 if ((m->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0)
1219 struct al_eth_meta_data *meta = &tx_ring->hal_meta;
1222 hal_pkt->flags |= (AL_ETH_TX_FLAGS_TSO |
1225 hal_pkt->flags |= (AL_ETH_TX_FLAGS_L4_CSUM |
1234 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
1235 etype = ntohs(eh->evl_proto);
1238 etype = ntohs(eh->evl_encap_proto);
1245 ip = (struct ip *)(m->m_data + ehdrlen);
1246 ip_hlen = ip->ip_hl << 2;
1247 ipproto = ip->ip_p;
1248 hal_pkt->l3_proto_idx = AL_ETH_PROTO_ID_IPv4;
1251 hal_pkt->flags |= AL_ETH_TX_FLAGS_IPV4_L3_CSUM;
1253 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_TCP;
1255 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_UDP;
1260 ip6 = (struct ip6_hdr *)(m->m_data + ehdrlen);
1261 hal_pkt->l3_proto_idx = AL_ETH_PROTO_ID_IPv6;
1264 ipproto = ip6->ip6_nxt;
1266 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_TCP;
1268 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_UDP;
1275 meta->words_valid = 4;
1276 meta->l3_header_len = ip_hlen;
1277 meta->l3_header_offset = ehdrlen;
1279 meta->l4_header_len = th->th_off; /* this param needed only for TSO */
1280 meta->mss_idx_sel = 0; /* check how to select MSS */
1281 meta->mss_val = mss;
1282 hal_pkt->meta = meta;
1284 hal_pkt->meta = NULL;
1302 if (unlikely(tx_ring->stall) != 0) {
1304 if (al_udma_available_get(tx_ring->dma_q) >=
1305 (AL_ETH_DEFAULT_TX_HW_DESCS -
1307 tx_ring->stall = 0;
1313 device_printf(tx_ring->dev,
1315 tx_ring->ring_id);
1318 device_printf_dbg(tx_ring->dev,
1319 "queue %d is ready!\n", tx_ring->ring_id);
1323 next_to_use = tx_ring->next_to_use;
1324 tx_info = &tx_ring->tx_buffer_info[next_to_use];
1325 tx_info->m = m;
1326 hal_pkt = &tx_info->hal_pkt;
1329 device_printf(tx_ring->dev, "mbuf is NULL\n");
1336 error = bus_dmamap_load_mbuf_sg(tx_ring->dma_buf_tag, tx_info->dma_map,
1342 /* Try it again? - one try */
1347 device_printf(tx_ring->dev,
1354 device_printf(tx_ring->dev,
1359 device_printf(tx_ring->dev,
1366 hal_pkt->flags = AL_ETH_TX_FLAGS_INT;
1369 al_buf = hal_pkt->bufs;
1371 al_buf->addr = segs[a].ds_addr;
1372 al_buf->len = segs[a].ds_len;
1377 hal_pkt->num_of_bufs = nsegs;
1380 tx_info->tx_descs = al_eth_tx_pkt_prepare(tx_ring->dma_q, hal_pkt);
1382 if (tx_info->tx_descs == 0)
1389 if (unlikely(al_udma_available_get(tx_ring->dma_q) <
1391 tx_ring->stall = 1;
1392 device_printf_dbg(tx_ring->dev, "stall, stopping queue %d...\n",
1393 tx_ring->ring_id);
1397 tx_ring->next_to_use = AL_ETH_TX_RING_IDX_NEXT(tx_ring, next_to_use);
1400 al_eth_tx_dma_action(tx_ring->dma_q, tx_info->tx_descs);
1413 tx_ring->cmpl_is_running = 1;
1420 tx_ring->cmpl_is_running = 0;
1424 al_eth_irq_config(tx_ring->unmask_reg_offset, tx_ring->unmask_val);
1432 /* Interrupt should be auto-masked upon arrival */
1434 device_printf_dbg(tx_ring->dev, "%s for ring ID = %d\n", __func__,
1435 tx_ring->ring_id);
1439 * for casual (non-napi) packet handling.
1441 if ((napi == 0) || (napi && tx_ring->cmpl_is_running == 0))
1442 taskqueue_enqueue(tx_ring->cmpl_tq, &tx_ring->cmpl_task);
1453 /* Interrupt should be auto-masked upon arrival */
1455 device_printf_dbg(rx_ring->dev, "%s for ring ID = %d\n", __func__,
1456 rx_ring->ring_id);
1460 * for casual (non-napi) packet handling.
1462 if ((napi == 0) || (napi && rx_ring->enqueue_is_running == 0))
1463 taskqueue_enqueue(rx_ring->enqueue_tq, &rx_ring->enqueue_task);
1470 * al_eth_rx_checksum - indicate in mbuf if hw indicated a good cksum
1481 if (unlikely((if_getcapenable(adapter->netdev) & IFCAP_RXCSUM) &&
1482 (hal_pkt->l3_proto_idx == AL_ETH_PROTO_ID_IPv4) &&
1483 (hal_pkt->flags & AL_ETH_RX_FLAGS_L3_CSUM_ERR))) {
1484 device_printf(adapter->dev,"rx ipv4 header checksum error\n");
1489 if (unlikely((if_getcapenable(adapter->netdev) & IFCAP_RXCSUM_IPV6) &&
1490 (hal_pkt->l3_proto_idx == AL_ETH_PROTO_ID_IPv6) &&
1491 (hal_pkt->flags & AL_ETH_RX_FLAGS_L3_CSUM_ERR))) {
1492 device_printf(adapter->dev,"rx ipv6 header checksum error\n");
1497 if (likely((hal_pkt->l4_proto_idx == AL_ETH_PROTO_ID_TCP) ||
1498 (hal_pkt->l4_proto_idx == AL_ETH_PROTO_ID_UDP))) {
1499 if (unlikely(hal_pkt->flags & AL_ETH_RX_FLAGS_L4_CSUM_ERR)) {
1500 device_printf_dbg(adapter->dev, "rx L4 checksum error\n");
1503 mbuf->m_pkthdr.csum_flags = 0;
1505 device_printf_dbg(adapter->dev, "rx checksum correct\n");
1508 mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1509 mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1521 &rx_ring->rx_buffer_info[*next_to_clean];
1524 len = hal_pkt->bufs[0].len;
1525 device_printf_dbg(adapter->dev, "rx_info %p data %p\n", rx_info,
1526 rx_info->m);
1528 if (rx_info->m == NULL) {
1534 mbuf = rx_info->m;
1535 mbuf->m_pkthdr.len = len;
1536 mbuf->m_len = len;
1537 mbuf->m_pkthdr.rcvif = rx_ring->netdev;
1538 mbuf->m_flags |= M_PKTHDR;
1540 if (len <= adapter->small_copy_len) {
1542 device_printf_dbg(adapter->dev, "rx small packet. len %d\n", len);
1548 device_printf(adapter->dev, "smbuf is NULL\n");
1552 smbuf->m_data = smbuf->m_data + AL_IP_ALIGNMENT_OFFSET;
1553 memcpy(smbuf->m_data, mbuf->m_data + AL_IP_ALIGNMENT_OFFSET, len);
1555 smbuf->m_len = len;
1556 smbuf->m_pkthdr.rcvif = rx_ring->netdev;
1558 /* first desc of a non-ps chain */
1559 smbuf->m_flags |= M_PKTHDR;
1560 smbuf->m_pkthdr.len = smbuf->m_len;
1567 mbuf->m_data = mbuf->m_data + AL_IP_ALIGNMENT_OFFSET;
1570 bus_dmamap_unload(rx_ring->dma_buf_tag, rx_info->dma_map);
1572 rx_info->m = NULL;
1583 unsigned int qid = rx_ring->ring_id;
1584 struct al_eth_pkt *hal_pkt = &rx_ring->hal_pkt;
1585 uint16_t next_to_clean = rx_ring->next_to_clean;
1591 rx_ring->enqueue_is_running = 1;
1598 descs = al_eth_pkt_rx(rx_ring->dma_q, hal_pkt);
1602 device_printf_dbg(rx_ring->dev, "rx_poll: q %d got packet "
1604 device_printf_dbg(rx_ring->dev, "rx_poll: q %d flags %x. "
1605 "l3 proto %d l4 proto %d\n", qid, hal_pkt->flags,
1606 hal_pkt->l3_proto_idx, hal_pkt->l4_proto_idx);
1609 if ((hal_pkt->flags & (AL_ETH_RX_ERROR |
1611 device_printf(rx_ring->dev, "receive packet with error. "
1612 "flags = 0x%x\n", hal_pkt->flags);
1619 mbuf = al_eth_rx_mbuf(rx_ring->adapter, rx_ring, hal_pkt, descs,
1629 if (__predict_true(if_getcapenable(rx_ring->netdev) & IFCAP_RXCSUM ||
1630 if_getcapenable(rx_ring->netdev) & IFCAP_RXCSUM_IPV6)) {
1631 al_eth_rx_checksum(rx_ring->adapter, hal_pkt, mbuf);
1634 mbuf->m_pkthdr.flowid = qid;
1642 if ((rx_ring->lro_enabled != 0) &&
1643 ((mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) != 0) &&
1644 hal_pkt->l4_proto_idx == AL_ETH_PROTO_ID_TCP) {
1647 * - LRO not enabled, or
1648 * - no LRO resources, or
1649 * - lro enqueue fails
1651 if (rx_ring->lro.lro_cnt != 0) {
1652 if (tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0)
1658 if_input(rx_ring->netdev, mbuf);
1662 rx_ring->next_to_clean = next_to_clean;
1664 refill_required = al_udma_available_get(rx_ring->dma_q);
1665 refill_actual = al_eth_refill_rx_bufs(rx_ring->adapter, qid,
1669 device_printf_dbg(rx_ring->dev,
1673 tcp_lro_flush_all(&rx_ring->lro);
1676 rx_ring->enqueue_is_running = 0;
1680 al_eth_irq_config(rx_ring->unmask_reg_offset, rx_ring->unmask_val);
1690 tx_ring->enqueue_is_running = 1;
1695 mtx_lock(&tx_ring->br_mtx);
1696 mbuf = drbr_dequeue(NULL, tx_ring->br);
1697 mtx_unlock(&tx_ring->br_mtx);
1706 tx_ring->enqueue_is_running = 0;
1709 mtx_lock(&tx_ring->br_mtx);
1710 mbuf = drbr_dequeue(NULL, tx_ring->br);
1711 mtx_unlock(&tx_ring->br_mtx);
1729 i = m->m_pkthdr.flowid % adapter->num_tx_queues;
1731 i = curcpu % adapter->num_tx_queues;
1738 tx_ring = &adapter->tx_ring[i];
1740 device_printf_dbg(adapter->dev, "dgb start() - assuming link is active, "
1743 ret = drbr_enqueue(ifp, tx_ring->br, m);
1747 * for casual (non-napi) packet handling.
1749 if ((napi == 0) || ((napi != 0) && (tx_ring->enqueue_is_running == 0)))
1750 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
1770 adapter->link_config.flow_ctrl_supported = default_flow_ctrl;
1777 uint8_t active = adapter->link_config.flow_ctrl_active;
1780 flow_ctrl_params = &adapter->flow_ctrl_params;
1782 flow_ctrl_params->type = AL_ETH_FLOW_CONTROL_TYPE_LINK_PAUSE;
1783 flow_ctrl_params->obay_enable =
1785 flow_ctrl_params->gen_enable =
1788 flow_ctrl_params->rx_fifo_th_high = AL_ETH_FLOW_CTRL_RX_FIFO_TH_HIGH;
1789 flow_ctrl_params->rx_fifo_th_low = AL_ETH_FLOW_CTRL_RX_FIFO_TH_LOW;
1790 flow_ctrl_params->quanta = AL_ETH_FLOW_CTRL_QUANTA;
1791 flow_ctrl_params->quanta_th = AL_ETH_FLOW_CTRL_QUANTA_TH;
1795 flow_ctrl_params->prio_q_map[0][i] = 1 << (i >> 1);
1797 al_eth_flow_control_config(&adapter->hal_adapter, flow_ctrl_params);
1810 adapter->link_config.flow_ctrl_active =
1811 adapter->link_config.flow_ctrl_supported;
1820 adapter->link_config.flow_ctrl_active = 0;
1833 rc = al_eth_mac_config(&adapter->hal_adapter, adapter->mac_mode);
1835 device_printf(adapter->dev, "%s failed to configure mac!\n",
1840 if ((adapter->mac_mode == AL_ETH_MAC_MODE_SGMII) ||
1841 (adapter->mac_mode == AL_ETH_MAC_MODE_RGMII &&
1842 adapter->phy_exist == false)) {
1843 rc = al_eth_mac_link_config(&adapter->hal_adapter,
1844 adapter->link_config.force_1000_base_x,
1845 adapter->link_config.autoneg,
1846 adapter->link_config.active_speed,
1847 adapter->link_config.active_duplex);
1849 device_printf(adapter->dev,
1856 rc = al_eth_mdio_config(&adapter->hal_adapter,
1858 adapter->ref_clk_freq, adapter->mdio_freq);
1860 device_printf(adapter->dev, "%s failed at mdio config!\n",
1874 al_eth_mac_stop(&adapter->hal_adapter);
1883 al_eth_adapter_stop(&adapter->hal_adapter);
1885 adapter->flags |= AL_ETH_FLAG_RESET_REQUESTED;
1894 * al_eth_intr_intx_all - Legacy Interrupt Handler for all interrupts
1904 (struct unit_regs __iomem *)adapter->udma_base;
1910 device_printf_dbg(adapter->dev, "%s group A cause %x\n",
1919 ®s_base->gen.interrupt_regs.secondary_iofic_ctrl[0];
1921 device_printf_dbg(adapter->dev,
1926 device_printf(adapter->dev,
1932 device_printf_dbg(adapter->dev,
1940 device_printf_dbg(adapter->dev, "secondary B cause %x\n",
1942 for (qid = 0; qid < adapter->num_rx_queues; qid++) {
1946 (struct unit_regs __iomem *)adapter->udma_base,
1956 device_printf_dbg(adapter->dev, "secondary C cause %x\n", cause_c);
1957 for (qid = 0; qid < adapter->num_tx_queues; qid++) {
1960 (struct unit_regs __iomem *)adapter->udma_base,
1967 al_eth_tx_cmlp_irq_filter(adapter->tx_ring);
1977 device_printf_dbg(adapter->dev, "%s\n", __func__);
1986 device_printf_dbg(adapter->dev, "%s\n", __func__);
1995 device_printf_dbg(adapter->dev, "%s\n", __func__);
1996 msix_vecs = 1 + adapter->num_rx_queues + adapter->num_tx_queues;
1998 device_printf_dbg(adapter->dev,
2001 adapter->msix_entries = malloc(msix_vecs*sizeof(*adapter->msix_entries),
2004 adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].entry = 2;
2005 adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].vector = 0;
2008 for (i = 0; i < adapter->num_rx_queues; i++) {
2011 adapter->msix_entries[irq_idx].entry = 3 + i;
2012 adapter->msix_entries[irq_idx].vector = 0;
2015 for (i = 0; i < adapter->num_tx_queues; i++) {
2018 adapter->msix_entries[irq_idx].entry = 3 +
2020 adapter->msix_entries[irq_idx].vector = 0;
2024 rc = pci_alloc_msix(adapter->dev, &count);
2027 device_printf_dbg(adapter->dev, "failed to allocate MSIX "
2029 device_printf_dbg(adapter->dev, "ret = %d\n", rc);
2034 device_printf_dbg(adapter->dev, "failed to allocate all MSIX "
2041 adapter->msix_entries[i].vector = 2 + 1 + i;
2043 device_printf_dbg(adapter->dev, "successfully enabled MSIX,"
2046 adapter->msix_vecs = msix_vecs;
2047 adapter->flags |= AL_ETH_FLAG_MSIX_ENABLED;
2051 adapter->msix_vecs = 0;
2052 free(adapter->msix_entries, M_IFAL);
2053 adapter->msix_entries = NULL;
2066 device_printf(adapter->dev, "Failed to enable MSIX mode.\n");
2070 adapter->irq_vecs = max(1, adapter->msix_vecs);
2071 /* single INTX mode */
2072 if (adapter->msix_vecs == 0) {
2073 snprintf(adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].name,
2074 AL_ETH_IRQNAME_SIZE, "al-eth-intx-all@pci:%s",
2075 device_get_name(adapter->dev));
2076 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].handler =
2079 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector = 0;
2080 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].data = adapter;
2082 device_printf(adapter->dev, "%s and vector %d \n", __func__,
2083 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector);
2087 /* single MSI-X mode */
2088 if (adapter->msix_vecs == 1) {
2089 snprintf(adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].name,
2090 AL_ETH_IRQNAME_SIZE, "al-eth-msix-all@pci:%s",
2091 device_get_name(adapter->dev));
2092 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].handler =
2094 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector =
2095 adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].vector;
2096 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].data = adapter;
2100 /* MSI-X per queue */
2101 snprintf(adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].name, AL_ETH_IRQNAME_SIZE,
2102 "al-eth-msix-mgmt@pci:%s", device_get_name(adapter->dev));
2103 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].handler = al_eth_intr_msix_mgmt;
2105 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].data = adapter;
2106 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector =
2107 adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].vector;
2109 for (i = 0; i < adapter->num_rx_queues; i++) {
2112 snprintf(adapter->irq_tbl[irq_idx].name, AL_ETH_IRQNAME_SIZE,
2113 "al-eth-rx-comp-%d@pci:%s", i,
2114 device_get_name(adapter->dev));
2115 adapter->irq_tbl[irq_idx].handler = al_eth_rx_recv_irq_filter;
2116 adapter->irq_tbl[irq_idx].data = &adapter->rx_ring[i];
2117 adapter->irq_tbl[irq_idx].vector =
2118 adapter->msix_entries[irq_idx].vector;
2121 for (i = 0; i < adapter->num_tx_queues; i++) {
2124 snprintf(adapter->irq_tbl[irq_idx].name,
2125 AL_ETH_IRQNAME_SIZE, "al-eth-tx-comp-%d@pci:%s", i,
2126 device_get_name(adapter->dev));
2127 adapter->irq_tbl[irq_idx].handler = al_eth_tx_cmlp_irq_filter;
2128 adapter->irq_tbl[irq_idx].data = &adapter->tx_ring[i];
2129 adapter->irq_tbl[irq_idx].vector =
2130 adapter->msix_entries[irq_idx].vector;
2142 for (i = 0; i < adapter->irq_vecs; i++) {
2143 irq = &adapter->irq_tbl[i];
2144 if (irq->requested != 0) {
2145 device_printf_dbg(adapter->dev, "tear down irq: %d\n",
2146 irq->vector);
2147 rc = bus_teardown_intr(adapter->dev, irq->res,
2148 irq->cookie);
2150 device_printf(adapter->dev, "failed to tear "
2151 "down irq: %d\n", irq->vector);
2153 irq->requested = 0;
2163 if (adapter->msix_vecs >= 1) {
2164 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2165 adapter->netdev->rx_cpu_rmap = NULL;
2171 for (i = 0; i < adapter->irq_vecs; i++) {
2172 irq = &adapter->irq_tbl[i];
2173 if (irq->res == NULL)
2175 device_printf_dbg(adapter->dev, "release resource irq: %d\n",
2176 irq->vector);
2177 rc = bus_release_resource(adapter->dev, SYS_RES_IRQ, irq->vector,
2178 irq->res);
2179 irq->res = NULL;
2181 device_printf(adapter->dev, "dev has no parent while "
2182 "releasing res for irq: %d\n", irq->vector);
2185 pci_release_msi(adapter->dev);
2187 adapter->flags &= ~AL_ETH_FLAG_MSIX_ENABLED;
2189 adapter->msix_vecs = 0;
2190 free(adapter->msix_entries, M_IFAL);
2191 adapter->msix_entries = NULL;
2201 if ((adapter->flags & AL_ETH_FLAG_MSIX_ENABLED) != 0)
2206 for (i = 0; i < adapter->irq_vecs; i++) {
2207 irq = &adapter->irq_tbl[i];
2209 if (irq->requested != 0)
2212 irq->res = bus_alloc_resource_any(adapter->dev, SYS_RES_IRQ,
2213 &irq->vector, flags);
2214 if (irq->res == NULL) {
2215 device_printf(adapter->dev, "could not allocate "
2216 "irq vector=%d\n", irq->vector);
2221 if ((rc = bus_setup_intr(adapter->dev, irq->res,
2222 INTR_TYPE_NET | INTR_MPSAFE, irq->handler,
2223 NULL, irq->data, &irq->cookie)) != 0) {
2224 device_printf(adapter->dev, "failed to register "
2226 (uintmax_t)rman_get_start(irq->res), rc);
2229 irq->requested = 1;
2234 v = i - 1; /* -1 because we omit the operation that failed */
2235 while (v-- >= 0) {
2237 irq = &adapter->irq_tbl[v];
2238 bti = bus_teardown_intr(adapter->dev, irq->res, irq->cookie);
2240 device_printf(adapter->dev, "failed to tear "
2241 "down irq: %d\n", irq->vector);
2244 irq->requested = 0;
2245 device_printf_dbg(adapter->dev, "exit_intr: releasing irq %d\n",
2246 irq->vector);
2250 v = i - 1; /* -1 because we omit the operation that failed */
2251 while (v-- >= 0) {
2252 int brr;
2253 irq = &adapter->irq_tbl[v];
2254 device_printf_dbg(adapter->dev, "exit_res: releasing resource"
2255 " for irq %d\n", irq->vector);
2256 brr = bus_release_resource(adapter->dev, SYS_RES_IRQ,
2257 irq->vector, irq->res);
2258 if (brr != 0)
2259 device_printf(adapter->dev, "dev has no parent while "
2260 "releasing res for irq: %d\n", irq->vector);
2261 irq->res = NULL;
2269 * al_eth_setup_tx_resources - allocate Tx resources (Descriptors)
2278 struct al_eth_ring *tx_ring = &adapter->tx_ring[qid];
2279 device_t dev = tx_ring->dev;
2280 struct al_udma_q_params *q_params = &tx_ring->q_params;
2284 if (adapter->up)
2287 size = sizeof(struct al_eth_tx_buffer) * tx_ring->sw_count;
2289 tx_ring->tx_buffer_info = malloc(size, M_IFAL, M_ZERO | M_WAITOK);
2290 tx_ring->descs_size = tx_ring->hw_count * sizeof(union al_udma_desc);
2291 q_params->size = tx_ring->hw_count;
2293 ret = al_dma_alloc_coherent(dev, &q_params->desc_phy_base_tag,
2294 (bus_dmamap_t *)&q_params->desc_phy_base_map,
2295 (bus_addr_t *)&q_params->desc_phy_base,
2296 (void**)&q_params->desc_base, tx_ring->descs_size);
2303 if (q_params->desc_base == NULL)
2309 mtx_init(&tx_ring->br_mtx, "AlRingMtx", NULL, MTX_DEF);
2310 tx_ring->br = buf_ring_alloc(AL_BR_SIZE, M_DEVBUF, M_WAITOK,
2311 &tx_ring->br_mtx);
2314 TASK_INIT(&tx_ring->enqueue_task, 0, al_eth_start_xmit, tx_ring);
2315 tx_ring->enqueue_tq = taskqueue_create_fast("al_tx_enque", M_NOWAIT,
2316 taskqueue_thread_enqueue, &tx_ring->enqueue_tq);
2317 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, "%s txeq",
2318 device_get_nameunit(adapter->dev));
2319 TASK_INIT(&tx_ring->cmpl_task, 0, al_eth_tx_cmpl_work, tx_ring);
2320 tx_ring->cmpl_tq = taskqueue_create_fast("al_tx_cmpl", M_NOWAIT,
2321 taskqueue_thread_enqueue, &tx_ring->cmpl_tq);
2322 taskqueue_start_threads(&tx_ring->cmpl_tq, 1, PI_REALTIME, "%s txcq",
2323 device_get_nameunit(adapter->dev));
2337 &tx_ring->dma_buf_tag);
2345 for (size = 0; size < tx_ring->sw_count; size++) {
2346 ret = bus_dmamap_create(tx_ring->dma_buf_tag, 0,
2347 &tx_ring->tx_buffer_info[size].dma_map);
2356 q_params->cdesc_base = NULL;
2358 q_params->cdesc_size = 8;
2359 tx_ring->next_to_use = 0;
2360 tx_ring->next_to_clean = 0;
2366 * al_eth_free_tx_resources - Free Tx Resources per Queue
2375 struct al_eth_ring *tx_ring = &adapter->tx_ring[qid];
2376 struct al_udma_q_params *q_params = &tx_ring->q_params;
2380 while (taskqueue_cancel(tx_ring->cmpl_tq, &tx_ring->cmpl_task, NULL))
2381 taskqueue_drain(tx_ring->cmpl_tq, &tx_ring->cmpl_task);
2383 taskqueue_free(tx_ring->cmpl_tq);
2384 while (taskqueue_cancel(tx_ring->enqueue_tq,
2385 &tx_ring->enqueue_task, NULL)) {
2386 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
2389 taskqueue_free(tx_ring->enqueue_tq);
2391 if (tx_ring->br != NULL) {
2392 drbr_flush(adapter->netdev, tx_ring->br);
2393 buf_ring_free(tx_ring->br, M_DEVBUF);
2396 for (size = 0; size < tx_ring->sw_count; size++) {
2397 m_freem(tx_ring->tx_buffer_info[size].m);
2398 tx_ring->tx_buffer_info[size].m = NULL;
2400 bus_dmamap_unload(tx_ring->dma_buf_tag,
2401 tx_ring->tx_buffer_info[size].dma_map);
2402 bus_dmamap_destroy(tx_ring->dma_buf_tag,
2403 tx_ring->tx_buffer_info[size].dma_map);
2405 bus_dma_tag_destroy(tx_ring->dma_buf_tag);
2407 free(tx_ring->tx_buffer_info, M_IFAL);
2408 tx_ring->tx_buffer_info = NULL;
2410 mtx_destroy(&tx_ring->br_mtx);
2413 if (q_params->desc_base == NULL)
2416 al_dma_free_coherent(q_params->desc_phy_base_tag,
2417 q_params->desc_phy_base_map, q_params->desc_base);
2419 q_params->desc_base = NULL;
2423 * al_eth_free_all_tx_resources - Free Tx Resources for All Queues
2433 for (i = 0; i < adapter->num_tx_queues; i++)
2434 if (adapter->tx_ring[i].q_params.desc_base)
2439 * al_eth_setup_rx_resources - allocate Rx resources (Descriptors)
2448 struct al_eth_ring *rx_ring = &adapter->rx_ring[qid];
2449 device_t dev = rx_ring->dev;
2450 struct al_udma_q_params *q_params = &rx_ring->q_params;
2454 size = sizeof(struct al_eth_rx_buffer) * rx_ring->sw_count;
2459 rx_ring->rx_buffer_info = malloc(size, M_IFAL, M_ZERO | M_WAITOK);
2460 rx_ring->descs_size = rx_ring->hw_count * sizeof(union al_udma_desc);
2461 q_params->size = rx_ring->hw_count;
2463 ret = al_dma_alloc_coherent(dev, &q_params->desc_phy_base_tag,
2464 &q_params->desc_phy_base_map,
2465 (bus_addr_t *)&q_params->desc_phy_base,
2466 (void**)&q_params->desc_base, rx_ring->descs_size);
2468 if ((q_params->desc_base == NULL) || (ret != 0))
2472 q_params->cdesc_size = 16;
2473 rx_ring->cdescs_size = rx_ring->hw_count * q_params->cdesc_size;
2474 ret = al_dma_alloc_coherent(dev, &q_params->cdesc_phy_base_tag,
2475 &q_params->cdesc_phy_base_map,
2476 (bus_addr_t *)&q_params->cdesc_phy_base,
2477 (void**)&q_params->cdesc_base, rx_ring->cdescs_size);
2479 if ((q_params->cdesc_base == NULL) || (ret != 0))
2483 NET_TASK_INIT(&rx_ring->enqueue_task, 0, al_eth_rx_recv_work, rx_ring);
2484 rx_ring->enqueue_tq = taskqueue_create_fast("al_rx_enque", M_NOWAIT,
2485 taskqueue_thread_enqueue, &rx_ring->enqueue_tq);
2486 taskqueue_start_threads(&rx_ring->enqueue_tq, 1, PI_NET, "%s rxeq",
2487 device_get_nameunit(adapter->dev));
2501 &rx_ring->dma_buf_tag);
2508 for (size = 0; size < rx_ring->sw_count; size++) {
2509 ret = bus_dmamap_create(rx_ring->dma_buf_tag, 0,
2510 &rx_ring->rx_buffer_info[size].dma_map);
2518 memset(q_params->cdesc_base, 0, rx_ring->cdescs_size);
2521 if ((if_getcapenable(adapter->netdev) & IFCAP_LRO) != 0) {
2522 int err = tcp_lro_init(&rx_ring->lro);
2524 device_printf(adapter->dev,
2527 device_printf_dbg(adapter->dev,
2529 rx_ring->lro_enabled = true;
2530 rx_ring->lro.ifp = adapter->netdev;
2534 rx_ring->next_to_clean = 0;
2535 rx_ring->next_to_use = 0;
2541 * al_eth_free_rx_resources - Free Rx Resources
2550 struct al_eth_ring *rx_ring = &adapter->rx_ring[qid];
2551 struct al_udma_q_params *q_params = &rx_ring->q_params;
2555 while (taskqueue_cancel(rx_ring->enqueue_tq,
2556 &rx_ring->enqueue_task, NULL)) {
2557 taskqueue_drain(rx_ring->enqueue_tq, &rx_ring->enqueue_task);
2560 taskqueue_free(rx_ring->enqueue_tq);
2562 for (size = 0; size < rx_ring->sw_count; size++) {
2563 m_freem(rx_ring->rx_buffer_info[size].m);
2564 rx_ring->rx_buffer_info[size].m = NULL;
2565 bus_dmamap_unload(rx_ring->dma_buf_tag,
2566 rx_ring->rx_buffer_info[size].dma_map);
2567 bus_dmamap_destroy(rx_ring->dma_buf_tag,
2568 rx_ring->rx_buffer_info[size].dma_map);
2570 bus_dma_tag_destroy(rx_ring->dma_buf_tag);
2572 free(rx_ring->rx_buffer_info, M_IFAL);
2573 rx_ring->rx_buffer_info = NULL;
2576 if (q_params->desc_base == NULL)
2579 al_dma_free_coherent(q_params->desc_phy_base_tag,
2580 q_params->desc_phy_base_map, q_params->desc_base);
2582 q_params->desc_base = NULL;
2585 if (q_params->cdesc_base == NULL)
2588 al_dma_free_coherent(q_params->cdesc_phy_base_tag,
2589 q_params->cdesc_phy_base_map, q_params->cdesc_base);
2591 q_params->cdesc_phy_base = 0;
2594 tcp_lro_free(&rx_ring->lro);
2598 * al_eth_free_all_rx_resources - Free Rx Resources for All Queues
2608 for (i = 0; i < adapter->num_rx_queues; i++)
2609 if (adapter->rx_ring[i].q_params.desc_base != 0)
2614 * al_eth_setup_all_rx_resources - allocate all queues Rx resources
2624 for (i = 0; i < adapter->num_rx_queues; i++) {
2629 device_printf(adapter->dev, "Allocation for Rx Queue %u failed\n", i);
2636 while (i--)
2642 * al_eth_setup_all_tx_resources - allocate all queues Tx resources
2652 for (i = 0; i < adapter->num_tx_queues; i++) {
2657 device_printf(adapter->dev,
2666 while (i--)
2677 if ((adapter->board_type == ALPINE_FPGA_NIC) ||
2678 (adapter->board_type == ALPINE_NIC)) {
2679 al_eth_forward_int_config((uint32_t*)adapter->internal_pcie_base +
2691 uint32_t group_b_mask = (1 << adapter->num_rx_queues) - 1;/* bit per Rx q*/
2692 uint32_t group_c_mask = (1 << adapter->num_tx_queues) - 1;/* bit per Tx q*/
2695 (struct unit_regs __iomem *)adapter->udma_base;
2697 if (adapter->int_mode == AL_IOFIC_MODE_LEGACY)
2716 (struct unit_regs __iomem *)adapter->udma_base;
2738 /* single INTX mode */
2739 if (adapter->msix_vecs == 0)
2741 else if (adapter->msix_vecs > 1)
2744 device_printf(adapter->dev,
2745 "udma doesn't support single MSI-X mode yet.\n");
2749 if (adapter->board_type != ALPINE_INTEGRATED) {
2756 if (al_udma_iofic_config((struct unit_regs __iomem *)adapter->udma_base,
2759 device_printf(adapter->dev,
2763 adapter->int_mode = int_mode;
2764 device_printf_dbg(adapter->dev, "using %s interrupt mode\n",
2766 int_mode == AL_IOFIC_MODE_MSIX_PER_Q ? "MSI-X per Queue" : "Unknown");
2768 al_iofic_moder_res_config(&((struct unit_regs *)(adapter->udma_base))->gen.interrupt_regs.main_iofic, AL_INT_GROUP_B, 15);
2769 al_iofic_moder_res_config(&((struct unit_regs *)(adapter->udma_base))->gen.interrupt_regs.main_iofic, AL_INT_GROUP_C, 15);
2771 adapter->tx_usecs = 0;
2772 adapter->rx_usecs = 0;
2778 * ethtool_rxfh_indir_default - get default value for RX flow hash indirection
2794 struct al_eth_mac_stats *mac_stats = &adapter->mac_stats;
2796 if (adapter->up == 0)
2799 al_eth_mac_stats_get(&adapter->hal_adapter, mac_stats);
2812 mac_stats = &adapter->mac_stats;
2816 return (mac_stats->aFramesReceivedOK); /* including pause frames */
2818 return (mac_stats->aFramesTransmittedOK);
2820 return (mac_stats->aOctetsReceivedOK);
2822 return (mac_stats->aOctetsTransmittedOK);
2824 return (mac_stats->ifInMulticastPkts);
2826 return (mac_stats->ifOutMulticastPkts);
2830 return (mac_stats->etherStatsDropEvents);
2832 rv = mac_stats->ifInErrors +
2833 mac_stats->etherStatsUndersizePkts + /* good but short */
2834 mac_stats->etherStatsFragments + /* short and bad*/
2835 mac_stats->etherStatsJabbers + /* with crc errors */
2836 mac_stats->etherStatsOversizePkts +
2837 mac_stats->aFrameCheckSequenceErrors +
2838 mac_stats->aAlignmentErrors;
2841 return (mac_stats->ifOutErrors);
2872 * Unicast, Multicast and Promiscuous mode set
2877 * promiscuous mode, and all-multi behavior.
2882 if_t ifp = adapter->netdev;
2894 /* This interface is in all-multicasts mode (used by multicast routers). */
2911 * entries in the mac table - set promiscuous
2939 al_eth_fwd_pbits_table_set(&adapter->hal_adapter, i, i);
2943 al_eth_fwd_priority_table_set(&adapter->hal_adapter, i, i >> 1);
2951 al_eth_ctrl_table_def_set(&adapter->hal_adapter, AL_FALSE, &entry);
2963 for (i = 0; i < sizeof(adapter->toeplitz_hash_key); i++)
2964 *((uint8_t*)adapter->toeplitz_hash_key + i) = (uint8_t)random();
2967 al_eth_hash_key_set(&adapter->hal_adapter, i,
2968 htonl(adapter->toeplitz_hash_key[i]));
2971 adapter->rss_ind_tbl[i] = ethtool_rxfh_indir_default(i,
2974 adapter->rss_ind_tbl[i]);
2989 adapter->rx_mbuf_sz = MCLBYTES;
2991 if (adapter->max_rx_buff_alloc_size > 2048)
2992 adapter->rx_mbuf_sz = MJUMPAGESIZE;
2997 if (adapter->max_rx_buff_alloc_size > 4096)
2998 adapter->rx_mbuf_sz = MJUM9BYTES;
3003 if (adapter->max_rx_buff_alloc_size > 9216)
3004 adapter->rx_mbuf_sz = MJUM16BYTES;
3018 device_printf_dbg(adapter->dev, "set MTU to %d\n", new_mtu);
3019 al_eth_rx_pkt_limit_config(&adapter->hal_adapter,
3022 al_eth_tso_mss_config(&adapter->hal_adapter, 0, new_mtu - 100);
3049 q_params = &adapter->tx_ring[qid].q_params;
3051 q_params = &adapter->rx_ring[qid].q_params;
3053 rc = al_eth_queue_config(&adapter->hal_adapter, type, qid, q_params);
3055 device_printf(adapter->dev, "config %s queue %u failed\n", name,
3067 for (i = 0; i < adapter->num_tx_queues; i++)
3070 for (i = 0; i < adapter->num_rx_queues; i++)
3082 al_eth_change_mtu(adapter, if_getmtu(adapter->netdev));
3088 if ((adapter->board_type == ALPINE_FPGA_NIC) ||
3089 (adapter->board_type == ALPINE_NIC)) {
3090 al_eth_forward_int_config((uint32_t*)adapter->internal_pcie_base +
3096 mtx_lock(&adapter->stats_mtx);
3097 callout_reset(&adapter->stats_callout, hz, al_tick_stats, (void*)adapter);
3098 mtx_unlock(&adapter->stats_mtx);
3100 al_eth_mac_start(&adapter->hal_adapter);
3109 mii_mediachg(adapter->mii);
3120 if (sc->mii == NULL) {
3121 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
3122 ifmr->ifm_status = 0;
3127 mii = sc->mii;
3130 ifmr->ifm_active = mii->mii_media_active;
3131 ifmr->ifm_status = mii->mii_media_status;
3139 mii_tick(adapter->mii);
3142 callout_schedule(&adapter->wd_callout, hz);
3152 callout_schedule(&adapter->stats_callout, hz);
3158 if_t ifp = adapter->netdev;
3161 if (adapter->up)
3164 if ((adapter->flags & AL_ETH_FLAG_RESET_REQUESTED) != 0) {
3166 adapter->flags &= ~AL_ETH_FLAG_RESET_REQUESTED;
3185 device_printf(adapter->dev,
3186 "%s failed at setup interrupt mode!\n", __func__);
3206 adapter->up = true;
3208 if (adapter->mac_mode == AL_ETH_MAC_MODE_10GbE_Serial)
3209 if_link_state_change(adapter->netdev, LINK_STATE_UP);
3211 if (adapter->mac_mode == AL_ETH_MAC_MODE_RGMII) {
3212 mii_mediachg(adapter->mii);
3215 mtx_lock(&adapter->wd_mtx);
3216 callout_reset(&adapter->wd_callout, hz, al_tick, adapter);
3217 mtx_unlock(&adapter->wd_mtx);
3219 mii_pollstat(adapter->mii);
3252 device_printf_dbg(adapter->dev, "al_eth_down: begin\n");
3254 adapter->up = false;
3256 mtx_lock(&adapter->wd_mtx);
3257 callout_stop(&adapter->wd_callout);
3258 mtx_unlock(&adapter->wd_mtx);
3262 mtx_lock(&adapter->stats_mtx);
3263 callout_stop(&adapter->stats_callout);
3264 mtx_unlock(&adapter->stats_mtx);
3283 error = al_eth_check_mtu(adapter, ifr->ifr_mtu);
3285 device_printf(adapter->dev, "ioctl wrong mtu %u\n",
3286 if_getmtu(adapter->netdev));
3291 if_setmtu(adapter->netdev, ifr->ifr_mtu);
3298 if (((if_getflags(ifp) ^ adapter->if_flags) &
3300 device_printf_dbg(adapter->dev,
3316 adapter->if_flags = if_getflags(ifp);
3322 device_printf_dbg(adapter->dev,
3332 if (adapter->mii != NULL)
3334 &adapter->mii->mii_media, command);
3337 &adapter->media, command);
3344 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
3347 if ((ifr->ifr_reqcap & IFCAP_POLLING) != 0) {
3428 rc = al_eth_mdio_read(&adapter->hal_adapter, adapter->phy_addr,
3429 -1, reg, &value);
3434 device_printf_dbg(adapter->dev,
3437 timeout -= MDIO_PAUSE_MSEC;
3442 device_printf(adapter->dev, "MDIO read failed on timeout\n");
3455 rc = al_eth_mdio_write(&adapter->hal_adapter, adapter->phy_addr,
3456 -1, reg, value);
3461 device_printf(adapter->dev,
3464 timeout -= MDIO_PAUSE_MSEC;
3469 device_printf(adapter->dev, "MDIO write failed on timeout\n");
3479 device_printf_dbg(adapter->dev,
3481 device_printf_dbg(adapter->dev,
3483 adapter->mii->mii_media_active, adapter->mii->mii_media_status);
3485 if (adapter->up == 0)
3488 if ((adapter->mii->mii_media_status & IFM_AVALID) != 0) {
3489 if (adapter->mii->mii_media_status & IFM_ACTIVE) {
3490 device_printf(adapter->dev, "link is UP\n");
3491 if_link_state_change(adapter->netdev, LINK_STATE_UP);
3493 device_printf(adapter->dev, "link is DOWN\n");
3494 if_link_state_change(adapter->netdev, LINK_STATE_DOWN);
3506 if (adapter->mii == NULL)
3509 if ((if_getflags(adapter->netdev) & IFF_UP) == 0)
3513 if ((adapter->mii->mii_media_status & (IFM_AVALID | IFM_ACTIVE)) !=
3518 if ((adapter->mii->mii_media_active & IFM_FDX) != 0)
3521 speed = IFM_SUBTYPE(adapter->mii->mii_media_active);
3524 al_eth_mac_link_config(&adapter->hal_adapter, 0, 1,
3530 al_eth_mac_link_config(&adapter->hal_adapter, 0, 1,
3536 al_eth_mac_link_config(&adapter->hal_adapter, 0, 1,
3541 device_printf(adapter->dev, "ERROR: unknown MII media active 0x%08x\n",
3542 adapter->mii->mii_media_active);