Lines Matching defs:gcc
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
373 gcc: clock-controller@80000 {
374 compatible = "qcom,qdu1000-gcc";
390 <&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
391 <&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
392 <&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
393 <&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
394 <&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
395 <&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
424 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
425 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
440 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
451 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
467 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
477 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
493 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
503 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
519 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
529 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
545 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
555 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
571 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
581 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
597 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
607 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
640 clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
641 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
652 clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
665 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
681 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
691 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
707 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
717 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
733 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
743 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
759 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
769 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
782 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
798 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
808 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
824 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
834 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
850 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
881 clocks = <&gcc GCC_SDCC5_AHB_CLK>,
882 <&gcc GCC_SDCC5_APPS_CLK>,
888 resets = <&gcc GCC_SDCC5_BCR>;
924 clocks =<&gcc GCC_USB2_CLKREF_EN>;
927 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
936 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
937 <&gcc GCC_USB2_CLKREF_EN>,
938 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
939 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
945 resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
946 <&gcc GCC_USB3PHY_PHY_PRIM_BCR>;
965 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
966 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
967 <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
968 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
974 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
975 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
989 power-domains = <&gcc USB30_PRIM_GDSC>;
992 resets = <&gcc GCC_USB30_PRIM_BCR>;
1569 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;