Lines Matching +full:0 +full:x10
17 reg = <0x10000000 0x40000000>;
41 gpio = <&gpio3 22 0>;
51 pinctrl-0 = <&pinctrl_can_xcvr>;
58 pinctrl-0 = <&pinctrl_wlan_vmmc>;
70 pinctrl-0 = <&pinctrl_usbh1>;
81 pinctrl-0 = <&pinctrl_gpio_keys>;
137 pwms = <&pwm1 0 5000000 0>;
138 brightness-levels = <0 4 8 16 32 64 128 255>;
146 pwms = <&pwm4 0 5000000 0>;
147 brightness-levels = <0 4 8 16 32 64 128 255>;
156 #size-cells = <0>;
159 pinctrl-0 = <&pinctrl_j15>;
162 port@0 {
163 reg = <0>;
204 pinctrl-0 = <&pinctrl_audmux>;
210 pinctrl-0 = <&pinctrl_can1>;
225 pinctrl-0 = <&pinctrl_ecspi1>;
228 flash: flash@0 {
231 reg = <0>;
235 partition@0 {
237 reg = <0x0 0xc0000>;
242 reg = <0xc0000 0x2000>;
247 reg = <0xc2000 0x13e000>;
254 pinctrl-0 = <&pinctrl_enet>;
260 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
266 #size-cells = <0>;
270 txen-skew-ps = <0>;
272 rxdv-skew-ps = <0>;
274 rxd0-skew-ps = <0>;
275 rxd1-skew-ps = <0>;
276 rxd2-skew-ps = <0>;
277 rxd3-skew-ps = <0>;
278 txd0-skew-ps = <0>;
279 txd1-skew-ps = <0>;
280 txd2-skew-ps = <0>;
281 txd3-skew-ps = <0>;
294 pinctrl-0 = <&pinctrl_i2c1>;
299 reg = <0x0a>;
300 #sound-dai-cells = <0>;
308 reg = <0x6f>;
315 pinctrl-0 = <&pinctrl_i2c2>;
322 pinctrl-0 = <&pinctrl_i2c3>;
327 reg = <0x04>;
335 reg = <0x38>;
344 pinctrl-0 = <&pinctrl_hog>;
350 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
351 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
357 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
358 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
359 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
360 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
366 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
367 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
374 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
380 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
381 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
382 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
383 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
389 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
390 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
391 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
392 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
393 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
394 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
395 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
396 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
397 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
398 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
399 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
400 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
401 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
402 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
403 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
405 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
406 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
413 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
415 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
417 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
419 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
421 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
423 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
429 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
430 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
436 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
437 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
443 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
444 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
450 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
451 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
452 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
453 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
454 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
455 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
456 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
457 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
458 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
459 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
460 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
461 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
462 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
463 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
464 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
465 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
466 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
467 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
468 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
469 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
470 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
471 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
472 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
473 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
474 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
475 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
476 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
477 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
483 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
489 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
495 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
501 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
502 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
508 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
509 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
515 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
521 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
522 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
524 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
530 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
531 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
532 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
533 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
534 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
535 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
541 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
542 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
543 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
544 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
545 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
546 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
547 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
553 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
554 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
555 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
556 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
557 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
558 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
559 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
565 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
566 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
567 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
568 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
581 lvds-channel@0 {
600 pinctrl-0 = <&pinctrl_pwm1>;
606 pinctrl-0 = <&pinctrl_pwm3>;
612 pinctrl-0 = <&pinctrl_pwm4>;
622 pinctrl-0 = <&pinctrl_uart1>;
628 pinctrl-0 = <&pinctrl_uart2>;
640 pinctrl-0 = <&pinctrl_usbotg>;
647 pinctrl-0 = <&pinctrl_usdhc2>;
656 #size-cells = <0>;
668 pinctrl-0 = <&pinctrl_usdhc3>;
669 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
676 pinctrl-0 = <&pinctrl_usdhc4>;