Lines Matching +full:0 +full:x7
6 #define PDO_TYPE_FIXED 0
12 #define PDO_TYPE_MASK 0x3
16 #define PDO_VOLT_MASK 0x3ff
17 #define PDO_CURR_MASK 0x3ff
18 #define PDO_PWR_MASK 0x3ff
27 #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
40 #define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
52 #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
62 #define APDO_TYPE_PPS 0
64 #define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
65 #define PDO_APDO_TYPE_MASK 0x3
71 #define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
73 #define PDO_PPS_APDO_VOLT_MASK 0xff
74 #define PDO_PPS_APDO_CURR_MASK 0x7f
107 * <15:0> :: USB-IF assigned VID for this cable vendor
110 /* PD Rev2.0 definition */
111 #define IDH_PTYPE_UNDEF 0
114 #define IDH_PTYPE_NOT_UFP 0
121 #define IDH_PTYPE_NOT_CABLE 0
127 #define IDH_PTYPE_NOT_DFP 0
133 ((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \
134 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \
135 | ((vid) & 0xffff))
140 * <31:0> : USB-IF assigned XID for this cable
142 #define VDO_CERT(xid) ((xid) & 0xffffffff)
148 * <15:0> : USB bcdDevice
150 #define VDO_PRODUCT(pid, bcd) (((pid) & 0xffff) << 16 | ((bcd) & 0xffff))
161 * <7> :: Vconn required (AMA only, 0b == no, 1b == yes)
162 * <6> :: Vbus required (AMA only, 0b == yes, 1b == no)
164 * <2:0> :: USB highest speed
170 #define DEV_USB2_CAPABLE (1 << 0)
180 #define AMA_VCONN_PWR_1W 0
189 #define AMA_VCONN_NOT_REQ 0
193 #define AMA_VBUS_REQ 0
197 #define UFP_ALTMODE_NOT_SUPP 0
198 #define UFP_ALTMODE_TBT3 (1 << 0)
203 #define UFP_USB2_ONLY 0
209 (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \
210 | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \
211 | ((spd) & 0x7))
221 * <4:0> :: Port number
224 #define HOST_USB2_CAPABLE (1 << 0)
231 (((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \
232 | ((pnum) & 0x1f))
235 * Cable VDO (for both Passive and Active Cable VDO in PD Rev2.0)
244 * <10> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
249 * <4> :: Vbus through cable (0b == no, 1b == yes)
250 * <3> :: SOP" controller present? (0b == no, 1b == yes)
251 * <2:0> :: USB SS Signaling support
253 * Passive Cable VDO (PD Rev3.0+)
267 * <2:0> :: USB highest speed
269 * Active Cable VDO 1 (PD Rev3.0+)
280 * <8> :: SBU supported (0b == supported, 1b == not supported)
281 * <7> :: SBU type (0b == passive, 1b == active)
283 * <4> :: Vbus through cable (0b == no, 1b == yes)
284 * <3> :: SOP" controller present? (0b == no, 1b == yes)
285 * <2:0> :: USB highest speed
288 #define CABLE_VDO_VER1_0 0
291 /* Connector Type (_ATYPE and _BTYPE are for PD Rev2.0 only) */
292 #define CABLE_ATYPE 0
308 #define PCABLE_VCONN_NOT_REQ 0
314 #define CABLE_MAX_VBUS_20V 0
320 #define ACABLE_SBU_SUPP 0
322 #define ACABLE_SBU_PASSIVE 0
326 #define CABLE_CURR_DEF 0
330 /* USB SuperSpeed Signaling Support (PD Rev2.0) */
331 #define CABLE_USBSS_U2_ONLY 0
336 #define CABLE_USB2_ONLY 0
342 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18 \
343 | ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 | (tx1d) << 10 \
344 | (tx2d) << 9 | (rx1d) << 8 | (rx2d) << 7 | ((cur) & 0x3) << 5 \
345 | (vps) << 4 | (sopp) << 3 | ((usbss) & 0x7))
347 (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \
348 | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \
349 | ((vbm) & 0x3) << 9 | ((cur) & 0x3) << 5 | ((spd) & 0x7))
351 (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \
352 | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \
353 | ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5 \
354 | (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7))
363 * <11> :: U3 to U0 transition mode (0b == direct, 1b == through U3S)
364 * <10> :: Physical connection (0b == copper, 1b == optical)
365 * <9> :: Active element (0b == redriver, 1b == retimer)
366 * <8> :: USB4 supported (0b == yes, 1b == no)
368 * <5> :: USB2 supported (0b == yes, 1b == no)
369 * <4> :: USB3.2 supported (0b == yes, 1b == no)
370 * <3> :: USB lanes supported (0b == one lane, 1b == two lanes)
371 * <2> :: Optically isolated active cable (0b == no, 1b == yes)
373 * <0> :: USB gen (0b == gen1, 1b == gen2+)
376 #define ACAB2_U3_CLD_10MW_PLUS 0
385 #define ACAB2_U3U0_DIRECT 0
387 #define ACAB2_PHY_COPPER 0
389 #define ACAB2_REDRIVER 0
391 #define ACAB2_USB4_SUPP 0
393 #define ACAB2_USB2_SUPP 0
395 #define ACAB2_USB32_SUPP 0
397 #define ACAB2_LANES_ONE 0
399 #define ACAB2_OPT_ISO_NO 0
401 #define ACAB2_GEN_1 0
405 (((mtemp) & 0xff) << 24 | ((stemp) & 0xff) << 16 | ((u3p) & 0x7) << 12 \
407 | ((hops) & 0x3) << 6 | (u2) << 5 | (u32) << 4 | (lane) << 3 \
411 * AMA VDO (PD Rev2.0)
416 * <11> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
423 * <2:0> :: USB SS Signaling support
426 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 \
428 | ((vcpwr) & 0x7) << 5 | (vcr) << 4 | (vbr) << 3 \
429 | ((usbss) & 0x7))
434 #define AMA_USBSS_U2_ONLY 0
447 * <14> :: Charge through current support (0b == 3A, 1b == 5A)
451 * <0> :: Charge through support (0b == no, 1b == yes)
453 #define VPD_VDO_VER1_0 0
454 #define VPD_MAX_VBUS_20V 0
458 #define VPDCT_CURR_3A 0
460 #define VPDCT_NOT_SUPP 0
464 (((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \
465 | ((vbm) & 0x3) << 15 | (curr) << 14 | ((vbi) & 0x3f) << 7 \
466 | ((gi) & 0x3f) << 1 | (ct))