Lines Matching defs:val32
1632 u32 val32;
1650 val32 = FIELD_PREP(BDRAM_SIDX_MASK, bd_ram->start_idx) |
1654 rtw89_write32(rtwdev, addr_bdram, val32);
1848 u32 addr32, val32, shift;
1865 val32 = rtw89_pci_ops_read32_cmac(rtwdev, addr32);
1866 return val32 >> shift;
1872 u32 addr32, val32, shift;
1889 val32 = rtw89_pci_ops_read32_cmac(rtwdev, addr32);
1890 return val32 >> shift;
2651 u32 val32;
2657 val32 = FIELD_PREP(B_AX_PCIE_WDT_TIMER_M1_MASK,
2659 rtw89_write32(rtwdev, R_AX_PCIE_WDT_TIMER_M1, val32);
2660 rtw89_write32(rtwdev, R_AX_PCIE_WDT_TIMER_M2, val32);
2661 rtw89_write32(rtwdev, R_AX_PCIE_WDT_TIMER_E0, val32);
2794 u32 val32;
2832 val32 = rtw89_read32(rtwdev, R_AX_PCIE_INIT_CFG1) &
2834 rtw89_write32(rtwdev, R_AX_PCIE_INIT_CFG1, val32);
2836 val32 = rtw89_read32(rtwdev, R_AX_PCIE_INIT_CFG1) |
2838 rtw89_write32(rtwdev, R_AX_PCIE_INIT_CFG1, val32);
2999 u32 val32;
3001 val32 = rtw89_read32(rtwdev, R_AX_LTR_CTRL_0);
3002 if (rtw89_pci_ltr_is_err_reg_val(val32))
3004 val32 = rtw89_read32(rtwdev, R_AX_LTR_CTRL_1);
3005 if (rtw89_pci_ltr_is_err_reg_val(val32))
3010 val32 = rtw89_read32(rtwdev, R_AX_LTR_LATENCY_IDX3);
3011 if (rtw89_pci_ltr_is_err_reg_val(val32))
3013 val32 = rtw89_read32(rtwdev, R_AX_LTR_LATENCY_IDX0);
3014 if (rtw89_pci_ltr_is_err_reg_val(val32))