Lines Matching defs:phy_offset

30 						  u32 *phy_offset)
43 		*phy_offset = R_RAC_DIRECT_OFFSET_G1;
45 		*phy_offset = R_RAC_DIRECT_OFFSET_G2;
2437 	u32 phy_offset;
2454 	ret = rtw89_pci_get_phy_offset_by_link_speed(rtwdev, &phy_offset);
2458 	rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT, BAC_RX_TEST_EN);
2459 	rtw89_write16(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT, ADDR_SEL_PINOUT_DIS_VAL);
2460 	rtw89_write16_set(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT, B_PCIE_BIT_RD_SEL);
2462 	oobs_val = rtw89_read16_mask(rtwdev, phy_offset + RAC_ANA1F * RAC_MULT,
2481 	u32 phy_offset;
2486 	phy_offset = R_RAC_DIRECT_OFFSET_G1;
2487 	rtw89_write16(rtwdev, phy_offset + RAC_ANA1E * RAC_MULT, RAC_ANA1E_G1_VAL);
2488 	rtw89_write16(rtwdev, phy_offset + RAC_ANA2E * RAC_MULT, RAC_ANA2E_VAL);
2490 	phy_offset = R_RAC_DIRECT_OFFSET_G2;
2491 	rtw89_write16(rtwdev, phy_offset + RAC_ANA1E * RAC_MULT, RAC_ANA1E_G2_VAL);
2492 	rtw89_write16(rtwdev, phy_offset + RAC_ANA2E * RAC_MULT, RAC_ANA2E_VAL);
3830 	u32 val, phy_offset;
3846 		phy_offset = R_RAC_DIRECT_OFFSET_G1;
3848 		phy_offset = R_RAC_DIRECT_OFFSET_G2;
3849 		val16 = rtw89_read16(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT);
3850 		rtw89_write16_set(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT,
3852 		rtw89_write16_set(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT,
3856 					  phy_offset + RAC_ANA1F * RAC_MULT,
3859 		filter_out_val = rtw89_read16(rtwdev, phy_offset + RAC_ANA24 *
3864 		rtw89_write16(rtwdev, phy_offset + RAC_ANA24 * RAC_MULT,
3866 		rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0A * RAC_MULT,
3874 	rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0C * RAC_MULT,