Lines Matching +full:max +full:- +full:bitrate
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
157 { .bitrate = 10, .hw_value = 0x00, },
158 { .bitrate = 20, .hw_value = 0x01, },
159 { .bitrate = 55, .hw_value = 0x02, },
160 { .bitrate = 110, .hw_value = 0x03, },
161 { .bitrate = 60, .hw_value = 0x04, },
162 { .bitrate = 90, .hw_value = 0x05, },
163 { .bitrate = 120, .hw_value = 0x06, },
164 { .bitrate = 180, .hw_value = 0x07, },
165 { .bitrate = 240, .hw_value = 0x08, },
166 { .bitrate = 360, .hw_value = 0x09, },
167 { .bitrate = 480, .hw_value = 0x0a, },
168 { .bitrate = 540, .hw_value = 0x0b, },
173 .max = 1,
177 .max = 1,
186 .max = 1,
190 .max = 1,
211 bool rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate, u16 *bitrate)
221 *bitrate = rate.bitrate;
243 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
255 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
262 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
264 if (tx && ieee80211_is_assoc_req(hdr->frame_control))
267 if (!ieee80211_is_data(hdr->frame_control))
270 if (is_broadcast_ether_addr(hdr->addr1) ||
271 is_multicast_ether_addr(hdr->addr1))
275 stats->tx_cnt++;
276 stats->tx_unicast += skb->len;
278 stats->rx_cnt++;
279 stats->rx_unicast += skb->len;
292 struct ieee80211_channel *channel = chandef->chan;
293 enum nl80211_chan_width width = chandef->width;
300 center_chan = channel->hw_value;
301 primary_freq = channel->center_freq;
302 center_freq = chandef->center_freq1;
312 center_chan -= 2;
321 offset = (primary_freq - center_freq - 10) / 20;
322 center_chan -= 2 + offset * 4;
324 offset = (center_freq - primary_freq - 10) / 20;
333 switch (channel->band) {
346 rtw89_chan_create(chan, center_chan, channel->hw_value, band, bandwidth);
351 struct rtw89_hal *hal = &rtwdev->hal;
352 const struct rtw89_chip_info *chip = rtwdev->chip;
378 roc_idx = atomic_read(&hal->roc_entity_idx);
384 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
389 struct rtw89_hal *hal = &rtwdev->hal;
390 const struct rtw89_chip_info *chip = rtwdev->chip;
414 return -EINVAL;
417 roc_idx = atomic_read(&hal->roc_entity_idx);
429 chip->ops->set_channel(rtwdev, chan, mac_idx, phy_idx);
431 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
435 if (!entity_active || chan_rcd->band_changed) {
436 rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan->band_type);
449 chandef = rtw89_chandef_get(rtwdev, rtwvif->sub_entity_idx);
457 struct ieee80211_hdr *hdr = (void *)skb->data;
458 __le16 fc = hdr->frame_control;
471 struct ieee80211_sta *sta = tx_req->sta;
472 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
473 struct sk_buff *skb = tx_req->skb;
479 desc_info->bk = true;
483 if (!(IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU))
491 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
492 rtwsta = (struct rtw89_sta *)sta->drv_priv;
494 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
495 rtwsta->ampdu_params[tid].agg_num :
496 4 << sta->deflink.ht_cap.ampdu_factor) - 1);
498 desc_info->agg_en = true;
499 desc_info->ampdu_density = sta->deflink.ht_cap.ampdu_density;
500 desc_info->ampdu_num = ampdu_num;
507 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
508 const struct rtw89_chip_info *chip = rtwdev->chip;
512 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
513 struct sk_buff *skb = tx_req->skb;
519 key = info->control.hw_key;
520 sec_cam_idx = key->hw_key_idx;
521 sec_cam = cam_info->sec_entries[sec_cam_idx];
527 switch (key->cipher) {
550 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
554 desc_info->sec_en = true;
555 desc_info->sec_keyid = key->keyidx;
556 desc_info->sec_type = sec_type;
557 desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
559 if (!chip->hw_sec_hdr)
562 pn64 = atomic64_inc_return(&key->tx_pn);
563 desc_info->sec_seq[0] = pn64;
564 desc_info->sec_seq[1] = pn64 >> 8;
565 desc_info->sec_seq[2] = pn64 >> 16;
566 desc_info->sec_seq[3] = pn64 >> 24;
567 desc_info->sec_seq[4] = pn64 >> 32;
568 desc_info->sec_seq[5] = pn64 >> 40;
569 desc_info->wp_offset = 1; /* in unit of 8 bytes for security header */
576 struct sk_buff *skb = tx_req->skb;
578 struct ieee80211_vif *vif = tx_info->control.vif;
581 if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE ||
582 (vif && vif->p2p))
584 else if (chan->band_type == RTW89_BAND_2G)
589 if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta)
592 return __ffs(vif->bss_conf.basic_rates) + lowest_rate;
598 struct ieee80211_vif *vif = tx_req->vif;
599 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
600 struct ieee80211_sta *sta = tx_req->sta;
604 return rtwvif->mac_id;
606 rtwsta = (struct rtw89_sta *)sta->drv_priv;
607 return rtwsta->mac_id;
614 struct ieee80211_vif *vif = tx_req->vif;
615 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
616 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
618 rtwvif->sub_entity_idx);
621 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT;
624 desc_info->qsel = qsel;
625 desc_info->ch_dma = ch_dma;
626 desc_info->port = desc_info->hiq ? rtwvif->port : 0;
627 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
628 desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL;
629 desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE;
632 desc_info->en_wd_info = true;
633 desc_info->use_rate = true;
634 desc_info->dis_data_fb = true;
635 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req, chan);
639 desc_info->data_rate, chan->channel, chan->band_type,
640 chan->band_width);
647 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
649 desc_info->is_bmc = false;
650 desc_info->wd_page = false;
651 desc_info->ch_dma = RTW89_DMA_H2C;
664 const struct rtw89_chip_info *chip = rtwdev->chip;
665 struct rtw89_hal *hal = &rtwdev->hal;
668 if (!chip->dis_2g_40m_ul_ofdma ||
669 chan->band_type != RTW89_BAND_2G ||
670 chan->band_width != RTW89_CHANNEL_WIDTH_40)
673 om_bandwidth = chan->band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
674 rtw89_bandwidth_to_om[chan->band_width] : 0;
677 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
680 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
691 struct ieee80211_sta *sta = tx_req->sta;
693 struct sk_buff *skb = tx_req->skb;
694 struct ieee80211_hdr *hdr = (void *)skb->data;
695 __le16 fc = hdr->frame_control;
701 if (!sta || !sta->deflink.he_cap.has_he)
710 if (rtwsta && rtwsta->ra_report.might_fallback_legacy)
720 struct ieee80211_sta *sta = tx_req->sta;
721 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
722 struct sk_buff *skb = tx_req->skb;
723 struct ieee80211_hdr *hdr = (void *)skb->data;
724 __le16 fc = hdr->frame_control;
744 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
745 *htc = rtwsta->htc_template ? rtwsta->htc_template :
750 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
752 qc = (u8 *)data + hdr_len - IEEE80211_QOS_CTL_LEN;
762 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
763 struct ieee80211_vif *vif = tx_req->vif;
764 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
771 desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
772 desc_info->a_ctrl_bsr = true;
775 if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr)
778 rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr;
779 desc_info->bk = true;
785 struct ieee80211_vif *vif = tx_req->vif;
786 struct ieee80211_sta *sta = tx_req->sta;
787 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
788 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
789 enum rtw89_sub_entity_idx idx = rtwvif->sub_entity_idx;
793 if (rate_pattern->enable)
794 return rate_pattern->rate;
796 if (vif->p2p)
798 else if (chan->band_type == RTW89_BAND_2G)
803 if (!sta || !sta->deflink.supp_rates[chan->band_type])
806 return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate;
813 struct ieee80211_vif *vif = tx_req->vif;
814 struct ieee80211_sta *sta = tx_req->sta;
815 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
817 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
818 struct sk_buff *skb = tx_req->skb;
822 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
824 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
827 desc_info->ch_dma = ch_dma;
828 desc_info->tid_indicate = tid_indicate;
829 desc_info->qsel = qsel;
830 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
831 desc_info->port = desc_info->hiq ? rtwvif->port : 0;
832 desc_info->er_cap = rtwsta ? rtwsta->er_cap : false;
833 desc_info->stbc = rtwsta ? rtwsta->ra.stbc_cap : false;
834 desc_info->ldpc = rtwsta ? rtwsta->ra.ldpc_cap : false;
837 desc_info->en_wd_info = true;
839 if (IEEE80211_SKB_CB(skb)->control.hw_key)
842 desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req);
849 struct sk_buff *skb = tx_req->skb;
852 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
853 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work);
857 if (skb->protocol == htons(ETH_P_ARP)) {
858 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work);
862 if (skb->protocol == htons(ETH_P_IP) &&
863 ip_hdr(skb)->protocol == IPPROTO_UDP) {
865 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
866 (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
867 skb->len > 282) {
868 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work);
873 if (skb->protocol == htons(ETH_P_IP) &&
874 ip_hdr(skb)->protocol == IPPROTO_ICMP) {
875 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work);
886 struct ieee80211_hdr *hdr = (void *)skb->data;
887 __le16 fc = hdr->frame_control;
889 desc_info->hdr_llc_len = ieee80211_hdrlen(fc);
890 desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
897 const struct rtw89_chip_info *chip = rtwdev->chip;
899 if (!RTW89_CHK_FW_FEATURE(TX_WAKE, &rtwdev->fw))
902 if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
905 if (chip->chip_id != RTL8852C &&
906 tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT)
916 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
917 struct sk_buff *skb = tx_req->skb;
919 struct ieee80211_hdr *hdr = (void *)skb->data;
925 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
926 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) {
928 tx_req->tx_type = tx_type;
930 is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
931 is_multicast_ether_addr(hdr->addr1));
933 desc_info->seq = seq;
934 desc_info->pkt_size = skb->len;
935 desc_info->is_bmc = is_bmc;
936 desc_info->wd_page = true;
937 desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM;
939 switch (tx_req->tx_type) {
979 init_completion(&wait->completion);
980 rcu_assign_pointer(skb_data->wait, wait);
983 time_left = wait_for_completion_timeout(&wait->completion,
986 ret = -ETIMEDOUT;
987 else if (!wait->tx_done)
988 ret = -EAGAIN;
990 rcu_assign_pointer(skb_data->wait, NULL);
1003 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
1006 test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags));
1019 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
1024 return -ENOSPC;
1041 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1048 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true);
1049 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true);
1067 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
1068 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1069 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1070 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1071 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1072 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |
1073 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |
1074 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);
1081 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1082 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1083 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1084 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1085 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1086 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
1093 u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1094 FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1095 FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
1102 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
1103 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
1104 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |
1105 FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);
1112 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
1113 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
1114 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
1121 u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1122 FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1129 u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1130 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1131 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1132 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1139 u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
1140 FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
1147 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
1148 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
1149 FIELD_PREP(RTW89_TXWD_INFO0_DATA_STBC, desc_info->stbc) |
1150 FIELD_PREP(RTW89_TXWD_INFO0_DATA_LDPC, desc_info->ldpc) |
1151 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1152 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);
1159 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DATA_STBC, desc_info->stbc) |
1160 FIELD_PREP(RTW89_TXWD_INFO0_DATA_LDPC, desc_info->ldpc) |
1161 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1162 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) |
1163 FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) |
1171 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
1172 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1174 desc_info->data_retry_lowest_rate);
1181 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1182 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
1183 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
1184 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1191 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1192 FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1193 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1200 bool rts_en = !desc_info->is_bmc;
1214 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
1215 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1216 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1218 if (!desc_info->en_wd_info)
1222 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
1223 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1224 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
1225 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1237 txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
1238 txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
1239 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1240 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1241 if (desc_info->sec_en) {
1242 txwd_body->dword4 = rtw89_build_txwd_body4(desc_info);
1243 txwd_body->dword5 = rtw89_build_txwd_body5(desc_info);
1245 txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
1247 if (!desc_info->en_wd_info)
1251 txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
1252 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1253 txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
1254 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1260 u32 dword = FIELD_PREP(BE_TXD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1261 FIELD_PREP(BE_TXD_BODY0_WDINFO_EN, desc_info->en_wd_info) |
1262 FIELD_PREP(BE_TXD_BODY0_CH_DMA, desc_info->ch_dma) |
1263 FIELD_PREP(BE_TXD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1264 FIELD_PREP(BE_TXD_BODY0_WD_PAGE, desc_info->wd_page);
1271 u32 dword = FIELD_PREP(BE_TXD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1272 FIELD_PREP(BE_TXD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1273 FIELD_PREP(BE_TXD_BODY1_SEC_TYPE, desc_info->sec_type);
1280 u32 dword = FIELD_PREP(BE_TXD_BODY2_TID_IND, desc_info->tid_indicate) |
1281 FIELD_PREP(BE_TXD_BODY2_QSEL, desc_info->qsel) |
1282 FIELD_PREP(BE_TXD_BODY2_TXPKTSIZE, desc_info->pkt_size) |
1283 FIELD_PREP(BE_TXD_BODY2_AGG_EN, desc_info->agg_en) |
1284 FIELD_PREP(BE_TXD_BODY2_BK, desc_info->bk) |
1285 FIELD_PREP(BE_TXD_BODY2_MACID, desc_info->mac_id);
1292 u32 dword = FIELD_PREP(BE_TXD_BODY3_WIFI_SEQ, desc_info->seq);
1299 u32 dword = FIELD_PREP(BE_TXD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1300 FIELD_PREP(BE_TXD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1307 u32 dword = FIELD_PREP(BE_TXD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1308 FIELD_PREP(BE_TXD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1309 FIELD_PREP(BE_TXD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1310 FIELD_PREP(BE_TXD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1317 u32 dword = FIELD_PREP(BE_TXD_BODY7_USERATE_SEL, desc_info->use_rate) |
1318 FIELD_PREP(BE_TXD_BODY7_DATA_ER, desc_info->er_cap) |
1320 FIELD_PREP(BE_TXD_BODY7_DATARATE, desc_info->data_rate);
1327 u32 dword = FIELD_PREP(BE_TXD_INFO0_DATA_STBC, desc_info->stbc) |
1328 FIELD_PREP(BE_TXD_INFO0_DATA_LDPC, desc_info->ldpc) |
1329 FIELD_PREP(BE_TXD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1330 FIELD_PREP(BE_TXD_INFO0_MULTIPORT_ID, desc_info->port);
1337 u32 dword = FIELD_PREP(BE_TXD_INFO1_MAX_AGG_NUM, desc_info->ampdu_num) |
1338 FIELD_PREP(BE_TXD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1340 desc_info->data_retry_lowest_rate);
1347 u32 dword = FIELD_PREP(BE_TXD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1348 FIELD_PREP(BE_TXD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1349 FIELD_PREP(BE_TXD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1356 bool rts_en = !desc_info->is_bmc;
1370 txwd_body->dword0 = rtw89_build_txwd_body0_v2(desc_info);
1371 txwd_body->dword1 = rtw89_build_txwd_body1_v2(desc_info);
1372 txwd_body->dword2 = rtw89_build_txwd_body2_v2(desc_info);
1373 txwd_body->dword3 = rtw89_build_txwd_body3_v2(desc_info);
1374 if (desc_info->sec_en) {
1375 txwd_body->dword4 = rtw89_build_txwd_body4_v2(desc_info);
1376 txwd_body->dword5 = rtw89_build_txwd_body5_v2(desc_info);
1378 txwd_body->dword7 = rtw89_build_txwd_body7_v2(desc_info);
1380 if (!desc_info->en_wd_info)
1384 txwd_info->dword0 = rtw89_build_txwd_info0_v2(desc_info);
1385 txwd_info->dword1 = rtw89_build_txwd_info1_v2(desc_info);
1386 txwd_info->dword2 = rtw89_build_txwd_info2_v2(desc_info);
1387 txwd_info->dword4 = rtw89_build_txwd_info4_v2(desc_info);
1393 u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1394 FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1407 txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
1413 u32 dword = FIELD_PREP(BE_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1414 FIELD_PREP(BE_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1427 txwd_v2->dword0 = rtw89_build_txwd_fwcmd0_v2(desc_info);
1435 const struct rtw89_chip_info *chip = rtwdev->chip;
1436 const struct rtw89_rxinfo *rxinfo = (const struct rtw89_rxinfo *)skb->data;
1438 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen;
1448 invalid = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_INVALID_V1);
1453 return -EINVAL;
1455 rx_cnt_valid = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_RX_CNT_VLD);
1457 plcp_size = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_PLCP_LEN_V1) << 3;
1458 usr_num = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_USR_NUM_V1);
1460 plcp_size = le32_get_bits(rxinfo->w1, RTW89_RXINFO_W1_PLCP_LEN) << 3;
1461 usr_num = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_USR_NUM);
1463 if (usr_num > chip->ppdu_max_usr) {
1466 return -EINVAL;
1473 user = &rxinfo->user[i];
1474 if (!le32_get_bits(user->w0, RTW89_RXINFO_USER_MAC_ID_VALID))
1477 phy_ppdu->mac_id =
1478 le32_get_bits(user->w0, RTW89_RXINFO_USER_MACID);
1482 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
1484 /* 8-byte alignment */
1491 if (phy_sts > skb->data + skb->len)
1492 return -EINVAL;
1494 phy_ppdu->buf = phy_sts;
1495 phy_ppdu->len = skb->data + skb->len - phy_sts;
1503 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1505 struct rtw89_dev *rtwdev = rtwsta->rtwdev;
1506 struct rtw89_hal *hal = &rtwdev->hal;
1507 u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
1512 if (rtwsta->mac_id != phy_ppdu->mac_id || !phy_ppdu->to_self)
1515 if (hal->ant_diversity && hal->antenna_rx) {
1516 ant_pos = __ffs(hal->antenna_rx);
1520 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg);
1523 ewma_rssi_add(&rtwsta->rssi[ant_pos], phy_ppdu->rssi[0]);
1525 for (i = 0; i < rtwdev->chip->rf_path_num; i++)
1526 ewma_rssi_add(&rtwsta->rssi[i], phy_ppdu->rssi[i]);
1529 if (phy_ppdu->ofdm.has) {
1530 ewma_snr_add(&rtwsta->avg_snr, phy_ppdu->ofdm.avg_snr);
1531 ewma_evm_add(&rtwsta->evm_min[evm_pos], phy_ppdu->ofdm.evm_min);
1532 ewma_evm_add(&rtwsta->evm_max[evm_pos], phy_ppdu->ofdm.evm_max);
1557 physts_ie_len_tab = physts_ie_len_tabs[rtwdev->chip->chip_gen];
1559 ie = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_TYPE);
1563 ie_len = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_LEN) * VAR_LEN_UNIT;
1576 phy_ppdu->chan_idx = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_CH_IDX);
1578 if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) {
1579 phy_ppdu->ldpc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_LDPC);
1580 phy_ppdu->stbc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_STBC);
1583 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
1586 if (!phy_ppdu->to_self)
1589 phy_ppdu->ofdm.avg_snr = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_AVG_SNR);
1590 phy_ppdu->ofdm.evm_max = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MAX);
1591 phy_ppdu->ofdm.evm_min = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MIN);
1592 phy_ppdu->ofdm.has = true;
1595 if (rtwdev->chip->cfo_src_fd) {
1596 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_FD_CFO);
1599 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_PREMB_CFO);
1612 ie = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_TYPE);
1627 const struct rtw89_phy_sts_hdr *hdr = phy_ppdu->buf;
1628 u8 *rssi = phy_ppdu->rssi;
1630 phy_ppdu->ie = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_IE_MAP);
1631 phy_ppdu->rssi_avg = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_RSSI_AVG);
1632 rssi[RF_PATH_A] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_A);
1633 rssi[RF_PATH_B] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_B);
1634 rssi[RF_PATH_C] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_C);
1635 rssi[RF_PATH_D] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_D);
1641 const struct rtw89_phy_sts_hdr *hdr = phy_ppdu->buf;
1645 physts_valid = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_VALID);
1647 return -EINVAL;
1649 len_from_header = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_LEN) << 3;
1651 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
1654 if (len_from_header != phy_ppdu->len) {
1656 return -EINVAL;
1674 if (phy_ppdu->ie < RTW89_CCK_PKT)
1675 return -EINVAL;
1678 pos = phy_ppdu->buf + PHY_STS_HDR_LEN;
1679 end = phy_ppdu->buf + phy_ppdu->len;
1681 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
1682 end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
1697 return -EINVAL;
1715 phy_ppdu->valid = true;
1717 ieee80211_iterate_stations_atomic(rtwdev->hw,
1753 return status->eht.gi == gi_ltf;
1755 return status->he_gi == gi_ltf;
1762 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1768 data_rate = desc_info->data_rate;
1784 bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1785 gi_ltf = rtw89_rxdesc_to_nl_he_eht_gi(rtwdev, desc_info->gi_ltf, false, eht);
1786 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
1787 status->rate_idx == rate_idx &&
1789 status->bw == bw;
1806 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1807 struct ieee80211_trigger *tf = (struct ieee80211_trigger *)skb->data;
1811 if (!ether_addr_equal(vif->bss_conf.bssid, tf->ta) ||
1812 rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION ||
1813 rtwvif->net_type == RTW89_NET_TYPE_NO_LINK)
1816 type = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_TYPE_MASK);
1820 end = (u8 *)tf + skb->len;
1821 pos = tf->variable;
1823 while (end - pos >= RTW89_TF_BASIC_USER_INFO_SZ) {
1826 tf_bw = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_ULBW_MASK);
1835 if (aid == vif->cfg.aid) {
1838 rtwvif->stats.rx_tf_acc++;
1839 rtwdev->stats.rx_tf_acc++;
1842 rtwvif->pwr_diff_en = true;
1854 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
1857 mutex_lock(&rtwdev->mutex);
1859 if (!rtwdev->scanning)
1863 if (!info->cancel || !test_bit(info->id, rtwdev->pkt_offload))
1866 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
1875 mutex_unlock(&rtwdev->mutex);
1882 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1883 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
1885 const u8 *ies = mgmt->u.beacon.variable, *ssid_ie;
1888 if (rx_status->band != NL80211_BAND_6GHZ)
1891 ssid_ie = cfg80211_find_ie(WLAN_EID_SSID, ies, skb->len);
1894 if (ether_addr_equal(info->bssid, mgmt->bssid)) {
1895 info->cancel = true;
1900 if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0)
1903 if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0) {
1904 info->cancel = true;
1910 ieee80211_queue_work(rtwdev->hw, &rtwdev->cancel_6ghz_probe_work);
1921 WRITE_ONCE(rtwvif->sync_bcn_tsf, le64_to_cpu(mgmt->u.beacon.timestamp));
1927 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1929 struct rtw89_dev *rtwdev = iter_data->rtwdev;
1930 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
1931 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1932 struct sk_buff *skb = iter_data->skb;
1933 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1934 struct rtw89_rx_phy_ppdu *phy_ppdu = iter_data->phy_ppdu;
1935 const u8 *bssid = iter_data->bssid;
1937 if (rtwdev->scanning &&
1938 (ieee80211_is_beacon(hdr->frame_control) ||
1939 ieee80211_is_probe_resp(hdr->frame_control)))
1942 if (!vif->bss_conf.bssid)
1945 if (ieee80211_is_trigger(hdr->frame_control)) {
1950 if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
1953 if (ieee80211_is_beacon(hdr->frame_control)) {
1954 if (vif->type == NL80211_IFTYPE_STATION &&
1955 !test_bit(RTW89_FLAG_WOWLAN, rtwdev->flags)) {
1956 rtw89_vif_sync_bcn_tsf(rtwvif, hdr, skb->len);
1959 pkt_stat->beacon_nr++;
1962 if (!ether_addr_equal(vif->addr, hdr->addr1))
1965 if (desc_info->data_rate < RTW89_HW_RATE_NR)
1966 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
1968 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false);
1978 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false);
1984 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
1993 u16 chan = rcd->prev_primary_channel;
1994 u8 band = rtw89_hw_to_nl80211_band(rcd->prev_band_type);
1996 if (status->band != NL80211_BAND_2GHZ &&
1997 status->encoding == RX_ENC_LEGACY &&
1998 status->rate_idx < RTW89_HW_RATE_OFDM6) {
1999 status->freq = ieee80211_channel_to_frequency(chan, band);
2000 status->band = band;
2006 if (rx_status->band == NL80211_BAND_2GHZ ||
2007 rx_status->encoding != RX_ENC_LEGACY)
2013 if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) {
2014 rx_status->rate_idx = 0;
2018 /* No 4 CCK rates for non-2G */
2019 rx_status->rate_idx -= 4;
2027 if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
2033 if (phy_ppdu->ldpc)
2034 rx_status->enc_flags |= RX_ENC_FLAG_LDPC;
2035 if (phy_ppdu->stbc)
2036 rx_status->enc_flags |= u8_encode_bits(1, RX_ENC_FLAG_STBC_MASK);
2066 rx_status->flag |= RX_FLAG_RADIOTAP_TLV_AT_END;
2072 tlv->type = cpu_to_le16(IEEE80211_RADIOTAP_EHT);
2073 tlv->len = cpu_to_le16(eht_len);
2075 eht = (struct ieee80211_radiotap_eht *)tlv->data;
2076 eht->known = cpu_to_le32(IEEE80211_RADIOTAP_EHT_KNOWN_GI);
2077 eht->data[0] =
2078 le32_encode_bits(rx_status->eht.gi, IEEE80211_RADIOTAP_EHT_DATA0_GI);
2080 eht->user_info[0] =
2084 eht->user_info[0] |=
2085 le32_encode_bits(rx_status->rate_idx, IEEE80211_RADIOTAP_EHT_USER_INFO_MCS) |
2086 le32_encode_bits(rx_status->nss, IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_O);
2087 if (rx_status->enc_flags & RX_ENC_FLAG_LDPC)
2088 eht->user_info[0] |=
2091 /* U-SIG */
2097 tlv->type = cpu_to_le16(IEEE80211_RADIOTAP_EHT_USIG);
2098 tlv->len = cpu_to_le16(usig_len);
2100 if (rx_status->bw >= ARRAY_SIZE(rx_status_bw_to_radiotap_eht_usig))
2103 bw = rx_status_bw_to_radiotap_eht_usig[rx_status->bw];
2107 usig = (struct ieee80211_radiotap_eht_usig *)tlv->data;
2108 usig->common =
2126 if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
2129 if (rx_status->encoding == RX_ENC_HE) {
2130 rx_status->flag |= RX_FLAG_RADIOTAP_HE;
2133 } else if (rx_status->encoding == RX_ENC_EHT) {
2144 struct napi_struct *napi = &rtwdev->napi;
2156 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi);
2158 rtwdev->napi_budget_countdown--;
2166 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
2167 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
2174 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
2175 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
2188 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
2189 .len = skb->len,
2190 .to_self = desc_info->addr1_match,
2191 .rate = desc_info->data_rate,
2192 .mac_id = desc_info->mac_id};
2195 if (desc_info->mac_info_valid) {
2216 switch (desc_info->pkt_type) {
2225 desc_info->pkt_type);
2235 const struct rtw89_chip_info *chip = rtwdev->chip;
2241 desc_info->pkt_size = le32_get_bits(rxd_s->dword0, AX_RXD_RPKT_LEN_MASK);
2242 desc_info->drv_info_size = le32_get_bits(rxd_s->dword0, AX_RXD_DRV_INFO_SIZE_MASK);
2243 desc_info->long_rxdesc = le32_get_bits(rxd_s->dword0, AX_RXD_LONG_RXD);
2244 desc_info->pkt_type = le32_get_bits(rxd_s->dword0, AX_RXD_RPKT_TYPE_MASK);
2245 desc_info->mac_info_valid = le32_get_bits(rxd_s->dword0, AX_RXD_MAC_INFO_VLD);
2246 if (chip->chip_id == RTL8852C)
2247 desc_info->bw = le32_get_bits(rxd_s->dword1, AX_RXD_BW_v1_MASK);
2249 desc_info->bw = le32_get_bits(rxd_s->dword1, AX_RXD_BW_MASK);
2250 desc_info->data_rate = le32_get_bits(rxd_s->dword1, AX_RXD_RX_DATARATE_MASK);
2251 desc_info->gi_ltf = le32_get_bits(rxd_s->dword1, AX_RXD_RX_GI_LTF_MASK);
2252 desc_info->user_id = le32_get_bits(rxd_s->dword1, AX_RXD_USER_ID_MASK);
2253 desc_info->sr_en = le32_get_bits(rxd_s->dword1, AX_RXD_SR_EN);
2254 desc_info->ppdu_cnt = le32_get_bits(rxd_s->dword1, AX_RXD_PPDU_CNT_MASK);
2255 desc_info->ppdu_type = le32_get_bits(rxd_s->dword1, AX_RXD_PPDU_TYPE_MASK);
2256 desc_info->free_run_cnt = le32_get_bits(rxd_s->dword2, AX_RXD_FREERUN_CNT_MASK);
2257 desc_info->icv_err = le32_get_bits(rxd_s->dword3, AX_RXD_ICV_ERR);
2258 desc_info->crc32_err = le32_get_bits(rxd_s->dword3, AX_RXD_CRC32_ERR);
2259 desc_info->hw_dec = le32_get_bits(rxd_s->dword3, AX_RXD_HW_DEC);
2260 desc_info->sw_dec = le32_get_bits(rxd_s->dword3, AX_RXD_SW_DEC);
2261 desc_info->addr1_match = le32_get_bits(rxd_s->dword3, AX_RXD_A1_MATCH);
2263 shift_len = desc_info->shift << 1; /* 2-byte unit */
2264 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
2265 desc_info->offset = data_offset + shift_len + drv_info_len;
2266 if (desc_info->long_rxdesc)
2267 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_long);
2269 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_short);
2270 desc_info->ready = true;
2272 if (!desc_info->long_rxdesc)
2276 desc_info->frame_type = le32_get_bits(rxd_l->dword4, AX_RXD_TYPE_MASK);
2277 desc_info->addr_cam_valid = le32_get_bits(rxd_l->dword5, AX_RXD_ADDR_CAM_VLD);
2278 desc_info->addr_cam_id = le32_get_bits(rxd_l->dword5, AX_RXD_ADDR_CAM_MASK);
2279 desc_info->sec_cam_id = le32_get_bits(rxd_l->dword5, AX_RXD_SEC_CAM_IDX_MASK);
2280 desc_info->mac_id = le32_get_bits(rxd_l->dword5, AX_RXD_MAC_ID_MASK);
2281 desc_info->rx_pl_id = le32_get_bits(rxd_l->dword5, AX_RXD_RX_PL_ID_MASK);
2295 desc_info->pkt_size = le32_get_bits(rxd_s->dword0, BE_RXD_RPKT_LEN_MASK);
2296 desc_info->drv_info_size = le32_get_bits(rxd_s->dword0, BE_RXD_DRV_INFO_SZ_MASK);
2297 desc_info->phy_rpt_size = le32_get_bits(rxd_s->dword0, BE_RXD_PHY_RPT_SZ_MASK);
2298 desc_info->hdr_cnv_size = le32_get_bits(rxd_s->dword0, BE_RXD_HDR_CNV_SZ_MASK);
2299 desc_info->shift = le32_get_bits(rxd_s->dword0, BE_RXD_SHIFT_MASK);
2300 desc_info->long_rxdesc = le32_get_bits(rxd_s->dword0, BE_RXD_LONG_RXD);
2301 desc_info->pkt_type = le32_get_bits(rxd_s->dword0, BE_RXD_RPKT_TYPE_MASK);
2302 if (desc_info->pkt_type == RTW89_CORE_RX_TYPE_PPDU_STAT)
2303 desc_info->mac_info_valid = true;
2305 desc_info->frame_type = le32_get_bits(rxd_s->dword2, BE_RXD_TYPE_MASK);
2306 desc_info->mac_id = le32_get_bits(rxd_s->dword2, BE_RXD_MAC_ID_MASK);
2307 desc_info->addr_cam_valid = le32_get_bits(rxd_s->dword2, BE_RXD_ADDR_CAM_VLD);
2309 desc_info->icv_err = le32_get_bits(rxd_s->dword3, BE_RXD_ICV_ERR);
2310 desc_info->crc32_err = le32_get_bits(rxd_s->dword3, BE_RXD_CRC32_ERR);
2311 desc_info->hw_dec = le32_get_bits(rxd_s->dword3, BE_RXD_HW_DEC);
2312 desc_info->sw_dec = le32_get_bits(rxd_s->dword3, BE_RXD_SW_DEC);
2313 desc_info->addr1_match = le32_get_bits(rxd_s->dword3, BE_RXD_A1_MATCH);
2315 desc_info->bw = le32_get_bits(rxd_s->dword4, BE_RXD_BW_MASK);
2316 desc_info->data_rate = le32_get_bits(rxd_s->dword4, BE_RXD_RX_DATARATE_MASK);
2317 desc_info->gi_ltf = le32_get_bits(rxd_s->dword4, BE_RXD_RX_GI_LTF_MASK);
2318 desc_info->ppdu_cnt = le32_get_bits(rxd_s->dword4, BE_RXD_PPDU_CNT_MASK);
2319 desc_info->ppdu_type = le32_get_bits(rxd_s->dword4, BE_RXD_PPDU_TYPE_MASK);
2321 desc_info->free_run_cnt = le32_to_cpu(rxd_s->dword5);
2323 shift_len = desc_info->shift << 1; /* 2-byte unit */
2324 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
2325 phy_rtp_len = desc_info->phy_rpt_size << 3; /* 8-byte unit */
2326 hdr_cnv_len = desc_info->hdr_cnv_size << 4; /* 16-byte unit */
2327 desc_info->offset = data_offset + shift_len + drv_info_len +
2330 if (desc_info->long_rxdesc)
2331 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_long_v2);
2333 desc_info->rxd_len = sizeof(struct rtw89_rxdesc_short_v2);
2334 desc_info->ready = true;
2336 if (!desc_info->long_rxdesc)
2341 desc_info->sr_en = le32_get_bits(rxd_l->dword6, BE_RXD_SR_EN);
2342 desc_info->user_id = le32_get_bits(rxd_l->dword6, BE_RXD_USER_ID_MASK);
2343 desc_info->addr_cam_id = le32_get_bits(rxd_l->dword6, BE_RXD_ADDR_CAM_MASK);
2344 desc_info->sec_cam_id = le32_get_bits(rxd_l->dword6, BE_RXD_SEC_CAM_IDX_MASK);
2346 desc_info->rx_pl_id = le32_get_bits(rxd_l->dword7, BE_RXD_RX_PL_ID_MASK);
2362 struct ieee80211_rx_status *rx_status = iter_data->rx_status;
2363 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2364 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
2365 u8 mac_id = iter_data->mac_id;
2367 if (mac_id != rtwsta->mac_id)
2370 rtwsta->rx_status = *rx_status;
2371 rtwsta->rx_hw_rate = desc_info->data_rate;
2380 if (!desc_info->addr1_match || !desc_info->long_rxdesc)
2383 if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
2389 iter_data.mac_id = desc_info->mac_id;
2390 ieee80211_iterate_stations_atomic(rtwdev->hw,
2407 rx_status->freq = chandef->chan->center_freq;
2408 rx_status->band = chandef->chan->band;
2410 if (rtwdev->scanning &&
2411 RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
2413 u8 chan = cur->primary_channel;
2414 u8 band = cur->band_type;
2418 rx_status->freq = ieee80211_channel_to_frequency(chan, nl_band);
2419 rx_status->band = nl_band;
2422 if (desc_info->icv_err || desc_info->crc32_err)
2423 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
2425 if (desc_info->hw_dec &&
2426 !(desc_info->sw_dec || desc_info->icv_err))
2427 rx_status->flag |= RX_FLAG_DECRYPTED;
2429 rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
2431 data_rate = desc_info->data_rate;
2434 rx_status->encoding = RX_ENC_LEGACY;
2435 rx_status->rate_idx = rtw89_get_data_not_ht_idx(rtwdev, data_rate);
2438 rx_status->encoding = RX_ENC_HT;
2439 rx_status->rate_idx = rtw89_get_data_ht_mcs(rtwdev, data_rate);
2440 if (desc_info->gi_ltf)
2441 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
2443 rx_status->encoding = RX_ENC_VHT;
2444 rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
2445 rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
2446 if (desc_info->gi_ltf)
2447 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
2449 rx_status->encoding = RX_ENC_HE;
2450 rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
2451 rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
2453 rx_status->encoding = RX_ENC_EHT;
2454 rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
2455 rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
2462 gi = rtw89_rxdesc_to_nl_he_eht_gi(rtwdev, desc_info->gi_ltf, true, eht);
2464 rx_status->eht.gi = gi;
2466 rx_status->he_gi = gi;
2467 rx_status->flag |= RX_FLAG_MACTIME_START;
2468 rx_status->mactime = desc_info->free_run_cnt;
2475 const struct rtw89_chip_info *chip = rtwdev->chip;
2477 if (rtw89_disable_ps_mode || !chip->ps_mode_supported ||
2478 RTW89_CHK_FW_FEATURE(NO_DEEP_PS, &rtwdev->fw))
2481 if ((chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) &&
2482 !RTW89_CHK_FW_FEATURE(NO_LPS_PG, &rtwdev->fw))
2485 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
2488 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
2497 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
2498 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
2502 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
2503 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
2514 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
2515 u8 ppdu_cnt = desc_info->ppdu_cnt;
2516 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
2518 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
2523 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
2525 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
2531 if (desc_info->long_rxdesc &&
2532 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP)
2533 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
2541 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
2544 napi_enable(&rtwdev->napi);
2550 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
2553 napi_synchronize(&rtwdev->napi);
2554 napi_disable(&rtwdev->napi);
2560 rtwdev->netdev = alloc_netdev_dummy(0);
2561 if (!rtwdev->netdev)
2562 return -ENOMEM;
2564 netif_napi_add(rtwdev->netdev, &rtwdev->napi,
2565 rtwdev->hci.ops->napi_poll);
2573 netif_napi_del(&rtwdev->napi);
2574 free_netdev(rtwdev->netdev);
2585 spin_lock_bh(&rtwdev->ba_lock);
2586 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2588 struct ieee80211_sta *sta = txq->sta;
2589 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2590 u8 tid = txq->tid;
2597 if (rtwsta->disassoc) {
2607 sta->addr, tid, ret);
2608 if (ret == -EINVAL)
2609 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
2612 list_del_init(&rtwtxq->list);
2614 spin_unlock_bh(&rtwdev->ba_lock);
2622 spin_lock_bh(&rtwdev->ba_lock);
2623 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2626 if (sta == txq->sta)
2627 list_del_init(&rtwtxq->list);
2629 spin_unlock_bh(&rtwdev->ba_lock);
2637 spin_lock_bh(&rtwdev->ba_lock);
2638 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2641 if (sta == txq->sta) {
2642 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2643 list_del_init(&rtwtxq->list);
2646 spin_unlock_bh(&rtwdev->ba_lock);
2652 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2655 skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2656 skb_unlink(skb, &rtwsta->roc_queue);
2665 struct ieee80211_sta *sta = txq->sta;
2668 if (unlikely(!rtwsta) || unlikely(rtwsta->disassoc))
2671 if (!test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags) ||
2672 test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2675 spin_lock_bh(&rtwdev->ba_lock);
2676 if (!test_and_set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2677 list_add_tail(&rtwtxq->list, &rtwdev->forbid_ba_list);
2678 spin_unlock_bh(&rtwdev->ba_lock);
2680 ieee80211_stop_tx_ba_session(sta, txq->tid);
2681 cancel_delayed_work(&rtwdev->forbid_ba_work);
2682 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->forbid_ba_work,
2690 struct ieee80211_hw *hw = rtwdev->hw;
2692 struct ieee80211_sta *sta = txq->sta;
2693 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2695 if (test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2698 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
2706 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
2709 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
2710 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
2714 spin_lock_bh(&rtwdev->ba_lock);
2715 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
2716 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
2717 ieee80211_queue_work(hw, &rtwdev->ba_work);
2719 spin_unlock_bh(&rtwdev->ba_lock);
2728 struct ieee80211_vif *vif = txq->vif;
2729 struct ieee80211_sta *sta = txq->sta;
2736 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
2745 ieee80211_free_txskb(rtwdev->hw, skb);
2768 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2769 struct ieee80211_sta *sta = txq->sta;
2770 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2772 if (!sta || rtwsta->max_agg_wait <= 0)
2775 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
2779 *frame_cnt -= 1;
2782 rtwtxq->wait_cnt = 1;
2786 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) {
2788 rtwtxq->wait_cnt++;
2792 rtwtxq->wait_cnt = 0;
2798 struct ieee80211_hw *hw = rtwdev->hw;
2809 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2810 rtwvif = (struct rtw89_vif *)txq->vif->drv_priv;
2812 if (rtwvif->offchan) {
2816 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
2828 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
2841 mutex_lock(&rtwdev->mutex);
2843 mutex_unlock(&rtwdev->mutex);
2857 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
2866 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2875 spin_lock_bh(&rtwdev->ba_lock);
2876 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2877 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2878 list_del_init(&rtwtxq->list);
2880 spin_unlock_bh(&rtwdev->ba_lock);
2886 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2887 struct rtw89_vif *rtwvif_target = data, *rtwvif = rtwsta->rtwvif;
2888 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2893 if (rtwvif->sub_entity_idx != rtwvif_target->sub_entity_idx)
2896 if (skb_queue_len(&rtwsta->roc_queue) == 0)
2899 skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2900 skb_unlink(skb, &rtwsta->roc_queue);
2915 ieee80211_iterate_stations_atomic(rtwdev->hw,
2929 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
2933 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
2935 ret = -EINVAL;
2939 skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, qos);
2941 ret = -ENOMEM;
2945 hdr = (struct ieee80211_hdr *)skb->data;
2947 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2968 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
2969 struct ieee80211_hw *hw = rtwdev->hw;
2970 struct rtw89_roc *roc = &rtwvif->roc;
2975 lockdep_assert_held(&rtwdev->mutex);
2984 "roc send null-1 failed: %d\n", ret);
2987 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2988 tmp->offchan = true;
2990 cfg80211_chandef_create(&roc_chan, &roc->chan, NL80211_CHAN_NO_HT);
2991 rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan);
2994 rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
2998 cancel_delayed_work(&rtwvif->roc.roc_work);
2999 ieee80211_queue_delayed_work(hw, &rtwvif->roc.roc_work,
3000 msecs_to_jiffies(rtwvif->roc.duration));
3005 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
3006 struct ieee80211_hw *hw = rtwdev->hw;
3007 struct rtw89_roc *roc = &rtwvif->roc;
3011 lockdep_assert_held(&rtwdev->mutex);
3019 rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
3021 rtwdev->hal.rx_fltr);
3023 roc->state = RTW89_ROC_IDLE;
3024 rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, NULL);
3029 "roc send null-0 failed: %d\n", ret);
3032 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
3033 tmp->offchan = false;
3036 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
3038 if (hw->conf.flags & IEEE80211_CONF_IDLE)
3039 ieee80211_queue_delayed_work(hw, &roc->roc_work,
3047 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
3048 struct rtw89_roc *roc = &rtwvif->roc;
3050 mutex_lock(&rtwdev->mutex);
3052 switch (roc->state) {
3064 mutex_unlock(&rtwdev->mutex);
3084 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
3085 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
3087 stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT);
3088 stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT);
3090 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
3091 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
3093 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
3094 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
3095 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
3096 stats->tx_cnt);
3097 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
3098 stats->rx_cnt);
3099 stats->tx_avg_len = stats->tx_cnt ?
3100 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
3101 stats->rx_avg_len = stats->rx_cnt ?
3102 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
3104 stats->tx_unicast = 0;
3105 stats->rx_unicast = 0;
3106 stats->tx_cnt = 0;
3107 stats->rx_cnt = 0;
3108 stats->rx_tf_periodic = stats->rx_tf_acc;
3109 stats->rx_tf_acc = 0;
3111 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
3122 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats);
3124 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats);
3133 if ((rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION &&
3134 rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT) ||
3135 rtwvif->tdls_peer)
3138 if (rtwvif->offchan)
3141 if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE &&
3142 rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE)
3178 stats->tx_unicast = 0;
3179 stats->rx_unicast = 0;
3180 stats->tx_cnt = 0;
3181 stats->rx_cnt = 0;
3182 ewma_tp_init(&stats->tx_ewma_tp);
3183 ewma_tp_init(&stats->rx_ewma_tp);
3192 if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags))
3195 mutex_lock(&rtwdev->mutex);
3197 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
3200 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
3204 if (rtwdev->scanning)
3227 if (rtwdev->lps_enabled && !rtwdev->btc.lps)
3231 mutex_unlock(&rtwdev->mutex);
3258 const struct rtw89_chip_info *chip = rtwdev->chip;
3259 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
3264 lockdep_assert_held(&rtwdev->mutex);
3266 idx = rtw89_core_acquire_bit_map(cam_info->ba_cam_map, chip->bacam_num);
3267 if (idx == chip->bacam_num) {
3273 return -ENOSPC;
3275 for_each_set_bit(i, cam_info->ba_cam_map, chip->bacam_num) {
3276 tmp = &cam_info->ba_cam_entry[i];
3277 if (tmp->tid == 0 || tmp->tid == 5)
3282 list_del(&entry->list);
3287 return -ENOSPC;
3289 entry = &cam_info->ba_cam_entry[idx];
3292 entry->tid = tid;
3293 list_add_tail(&entry->list, &rtwsta->ba_cam_list);
3303 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
3307 lockdep_assert_held(&rtwdev->mutex);
3309 list_for_each_entry_safe(entry, tmp, &rtwsta->ba_cam_list, list) {
3310 if (entry->tid != tid)
3313 idx = entry - cam_info->ba_cam_entry;
3314 list_del(&entry->list);
3316 rtw89_core_release_bit_map(cam_info->ba_cam_map, idx);
3321 return -ENOENT;
3326 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \
3330 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3332 switch (vif->type) {
3334 if (vif->p2p)
3335 rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_CLIENT;
3337 rtwvif->wifi_role = RTW89_WIFI_ROLE_STATION;
3340 if (vif->p2p)
3341 rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_GO;
3343 rtwvif->wifi_role = RTW89_WIFI_ROLE_AP;
3353 switch (vif->type) {
3356 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE;
3357 rtwvif->self_role = RTW89_SELF_ROLE_AP;
3360 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC;
3361 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
3365 rtwvif->net_type = RTW89_NET_TYPE_INFRA;
3366 rtwvif->trigger = vif->bss_conf.he_support;
3368 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
3369 rtwvif->trigger = false;
3371 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
3372 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
3386 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3387 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
3388 struct rtw89_hal *hal = &rtwdev->hal;
3389 u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
3393 rtwsta->rtwdev = rtwdev;
3394 rtwsta->rtwvif = rtwvif;
3395 rtwsta->prev_rssi = 0;
3396 INIT_LIST_HEAD(&rtwsta->ba_cam_list);
3397 skb_queue_head_init(&rtwsta->roc_queue);
3399 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
3400 rtw89_core_txq_init(rtwdev, sta->txq[i]);
3402 ewma_rssi_init(&rtwsta->avg_rssi);
3403 ewma_snr_init(&rtwsta->avg_snr);
3405 ewma_rssi_init(&rtwsta->rssi[i]);
3406 ewma_evm_init(&rtwsta->evm_min[i]);
3407 ewma_evm_init(&rtwsta->evm_max[i]);
3410 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
3412 rtwsta->mac_id = rtwvif->mac_id;
3422 } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
3423 rtwsta->mac_id = rtw89_acquire_mac_id(rtwdev);
3424 if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM)
3425 return -ENOSPC;
3427 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false);
3429 rtw89_release_mac_id(rtwdev, rtwsta->mac_id);
3437 rtw89_release_mac_id(rtwdev, rtwsta->mac_id);
3460 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3461 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
3463 if (vif->type == NL80211_IFTYPE_STATION)
3466 rtwdev->total_sta_assoc--;
3467 if (sta->tdls)
3468 rtwvif->tdls_peer--;
3469 rtwsta->disassoc = true;
3478 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3479 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
3488 if (vif->type == NL80211_IFTYPE_AP || sta->tdls)
3489 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam);
3490 if (sta->tdls)
3491 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta->bssid_cam);
3493 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
3524 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3525 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
3528 rtwvif->sub_entity_idx);
3531 if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
3532 if (sta->tdls) {
3533 ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif, bssid_cam, sta->addr);
3540 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, bssid_cam);
3566 rtwdev->total_sta_assoc++;
3567 if (sta->tdls)
3568 rtwvif->tdls_peer++;
3573 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
3574 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3576 if (bss_conf->he_support &&
3577 !(bss_conf->he_oper.params & IEEE80211_HE_OPERATION_ER_SU_DISABLE))
3578 rtwsta->er_cap = true;
3582 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template, chan);
3585 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id);
3601 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3602 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
3605 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
3609 } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
3610 rtw89_release_mac_id(rtwdev, rtwsta->mac_id);
3631 u32 mask = tid_conf->mask;
3632 u8 tids = tid_conf->tids;
3643 txq = sta->txq[i];
3644 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
3647 if (tid_conf->ampdu == NL80211_TID_CONFIG_ENABLE) {
3648 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3650 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags))
3651 ieee80211_stop_tx_ba_session(sta, txq->tid);
3652 spin_lock_bh(&rtwdev->ba_lock);
3653 list_del_init(&rtwtxq->list);
3654 set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3655 spin_unlock_bh(&rtwdev->ba_lock);
3660 if (tid_conf->amsdu == NL80211_TID_CONFIG_ENABLE)
3661 sta->max_amsdu_subframes = 0;
3663 sta->max_amsdu_subframes = 1;
3674 for (i = 0; i < tid_config->n_tid_conf; i++)
3676 &tid_config->tid_conf[i]);
3685 struct rtw89_hal *hal = &rtwdev->hal;
3686 u8 nss = hal->rx_nss;
3689 ht_cap->ht_supported = true;
3690 ht_cap->cap = 0;
3691 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
3695 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
3696 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
3699 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
3700 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
3701 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3703 ht_cap->mcs.rx_mask[i] = 0xFF;
3704 ht_cap->mcs.rx_mask[4] = 0x01;
3705 ht_cap->mcs.rx_highest = highest[nss - 1];
3717 const struct rtw89_chip_info *chip = rtwdev->chip;
3718 const __le16 *highest = chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160) ?
3720 struct rtw89_hal *hal = &rtwdev->hal;
3726 if (i < hal->tx_nss)
3730 if (i < hal->rx_nss)
3736 vht_cap->vht_supported = true;
3737 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
3743 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
3744 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
3745 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
3747 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
3748 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
3749 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
3751 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
3752 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
3753 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
3754 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
3756 if (ieee80211_hw_check(rtwdev->hw, SUPPORTS_VHT_EXT_NSS_BW))
3757 vht_cap->vht_mcs.tx_highest |=
3766 const struct rtw89_chip_info *chip = rtwdev->chip;
3767 struct rtw89_hal *hal = &rtwdev->hal;
3768 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
3769 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
3771 int nss = hal->rx_nss;
3784 he_cap = &iftype_data->he_cap;
3785 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
3786 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
3788 he_cap->has_he = true;
3807 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
3825 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
3840 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
3851 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
3852 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
3853 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160)) {
3854 he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
3855 he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
3867 iftype_data->he_6ghz_capa.capa = capa;
3876 const struct rtw89_chip_info *chip = rtwdev->chip;
3880 struct rtw89_hal *hal = &rtwdev->hal;
3885 if (chip->chip_gen == RTW89_CHIP_AX)
3889 chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_320))
3892 eht_cap = &iftype_data->eht_cap;
3893 eht_cap_elem = &eht_cap->eht_cap_elem;
3894 eht_nss = &eht_cap->eht_mcs_nss_supp;
3896 eht_cap->has_eht = true;
3898 eht_cap_elem->mac_cap_info[0] =
3901 eht_cap_elem->mac_cap_info[1] = 0;
3903 eht_cap_elem->phy_cap_info[0] =
3907 eht_cap_elem->phy_cap_info[0] |=
3910 eht_cap_elem->phy_cap_info[0] |=
3911 u8_encode_bits(u8_get_bits(sts - 1, BIT(0)),
3913 eht_cap_elem->phy_cap_info[1] =
3914 u8_encode_bits(u8_get_bits(sts - 1, GENMASK(2, 1)),
3916 u8_encode_bits(sts - 1,
3919 eht_cap_elem->phy_cap_info[1] |=
3920 u8_encode_bits(sts - 1,
3923 eht_cap_elem->phy_cap_info[2] = 0;
3925 eht_cap_elem->phy_cap_info[3] =
3931 eht_cap_elem->phy_cap_info[4] =
3935 eht_cap_elem->phy_cap_info[5] =
3939 eht_cap_elem->phy_cap_info[6] = 0;
3940 eht_cap_elem->phy_cap_info[7] = 0;
3941 eht_cap_elem->phy_cap_info[8] = 0;
3943 val = u8_encode_bits(hal->rx_nss, IEEE80211_EHT_MCS_NSS_RX) |
3944 u8_encode_bits(hal->tx_nss, IEEE80211_EHT_MCS_NSS_TX);
3945 eht_nss->bw._80.rx_tx_mcs9_max_nss = val;
3946 eht_nss->bw._80.rx_tx_mcs11_max_nss = val;
3947 eht_nss->bw._80.rx_tx_mcs13_max_nss = val;
3948 eht_nss->bw._160.rx_tx_mcs9_max_nss = val;
3949 eht_nss->bw._160.rx_tx_mcs11_max_nss = val;
3950 eht_nss->bw._160.rx_tx_mcs13_max_nss = val;
3952 eht_nss->bw._320.rx_tx_mcs9_max_nss = val;
3953 eht_nss->bw._320.rx_tx_mcs11_max_nss = val;
3954 eht_nss->bw._320.rx_tx_mcs13_max_nss = val;
3999 struct ieee80211_hw *hw = rtwdev->hw;
4003 u8 support_bands = rtwdev->chip->support_bands;
4009 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap);
4011 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz;
4018 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap);
4019 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap);
4021 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz;
4029 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz;
4035 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
4036 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
4037 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
4039 kfree((__force void *)sband_2ghz->iftype_data);
4041 kfree((__force void *)sband_5ghz->iftype_data);
4043 kfree((__force void *)sband_6ghz->iftype_data);
4047 return -ENOMEM;
4052 struct ieee80211_hw *hw = rtwdev->hw;
4054 if (hw->wiphy->bands[NL80211_BAND_2GHZ])
4055 kfree((__force void *)hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
4056 if (hw->wiphy->bands[NL80211_BAND_5GHZ])
4057 kfree((__force void *)hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
4058 if (hw->wiphy->bands[NL80211_BAND_6GHZ])
4059 kfree((__force void *)hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
4060 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
4061 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
4062 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]);
4063 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
4064 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
4065 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
4073 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
4075 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
4084 if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE)
4087 rtwdev = rtwvif->rtwdev;
4088 mutex_lock(&rtwdev->mutex);
4090 mutex_unlock(&rtwdev->mutex);
4095 struct completion *cmpl = &wait->completion;
4099 cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond);
4101 return -EBUSY;
4105 atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE);
4106 return -ETIMEDOUT;
4109 if (wait->data.err)
4110 return -EFAULT;
4120 cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE);
4124 wait->data = *data;
4125 complete(&wait->completion);
4159 quirk = (uintptr_t)match->driver_data;
4163 set_bit(quirk, rtwdev->quirks);
4182 /* pre-config BB/RF, BB reset/RFC reset */
4206 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
4209 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
4213 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.log.enable);
4221 struct rtw89_btc *btc = &rtwdev->btc;
4224 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
4229 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
4231 mutex_unlock(&rtwdev->mutex);
4233 cancel_work_sync(&rtwdev->c2h_work);
4234 cancel_work_sync(&rtwdev->cancel_6ghz_probe_work);
4235 cancel_work_sync(&btc->eapol_notify_work);
4236 cancel_work_sync(&btc->arp_notify_work);
4237 cancel_work_sync(&btc->dhcp_notify_work);
4238 cancel_work_sync(&btc->icmp_notify_work);
4239 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
4240 cancel_delayed_work_sync(&rtwdev->track_work);
4241 cancel_delayed_work_sync(&rtwdev->chanctx_work);
4242 cancel_delayed_work_sync(&rtwdev->coex_act1_work);
4243 cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
4244 cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
4245 cancel_delayed_work_sync(&rtwdev->cfo_track_work);
4246 cancel_delayed_work_sync(&rtwdev->forbid_ba_work);
4247 cancel_delayed_work_sync(&rtwdev->antdiv_work);
4249 mutex_lock(&rtwdev->mutex);
4252 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
4253 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
4262 const struct rtw89_chip_info *chip = rtwdev->chip;
4263 u8 mac_id_num = chip->support_macid_num;
4266 mac_id = find_first_zero_bit(rtwdev->mac_id_map, mac_id_num);
4270 set_bit(mac_id, rtwdev->mac_id_map);
4276 clear_bit(mac_id, rtwdev->mac_id_map);
4281 struct rtw89_btc *btc = &rtwdev->btc;
4284 INIT_LIST_HEAD(&rtwdev->ba_list);
4285 INIT_LIST_HEAD(&rtwdev->forbid_ba_list);
4286 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
4287 INIT_LIST_HEAD(&rtwdev->early_h2c_list);
4289 if (!(rtwdev->chip->support_bands & BIT(band)))
4291 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]);
4293 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
4294 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
4295 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
4296 INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
4297 INIT_DELAYED_WORK(&rtwdev->chanctx_work, rtw89_chanctx_work);
4298 INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
4299 INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
4300 INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
4301 INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
4302 INIT_DELAYED_WORK(&rtwdev->forbid_ba_work, rtw89_forbid_ba_work);
4303 INIT_DELAYED_WORK(&rtwdev->antdiv_work, rtw89_phy_antdiv_work);
4304 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
4305 if (!rtwdev->txq_wq)
4306 return -ENOMEM;
4307 spin_lock_init(&rtwdev->ba_lock);
4308 spin_lock_init(&rtwdev->rpwm_lock);
4309 mutex_init(&rtwdev->mutex);
4310 mutex_init(&rtwdev->rf_mutex);
4311 rtwdev->total_sta_assoc = 0;
4313 rtw89_init_wait(&rtwdev->mcc.wait);
4314 rtw89_init_wait(&rtwdev->mac.fw_ofld_wait);
4316 INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work);
4317 INIT_WORK(&rtwdev->ips_work, rtw89_ips_work);
4318 INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work);
4319 INIT_WORK(&rtwdev->cancel_6ghz_probe_work, rtw89_cancel_6ghz_probe_work);
4321 skb_queue_head_init(&rtwdev->c2h_queue);
4323 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
4325 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
4326 rtwdev->dbcc_en = false;
4327 rtwdev->mlo_dbcc_mode = MLO_DBCC_NOT_SUPPORT;
4328 rtwdev->mac.qta_mode = RTW89_QTA_SCC;
4330 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) {
4331 rtwdev->dbcc_en = true;
4332 rtwdev->mac.qta_mode = RTW89_QTA_DBCC;
4333 rtwdev->mlo_dbcc_mode = MLO_2_PLUS_0_1RF;
4336 INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
4337 INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
4338 INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
4339 INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
4341 init_completion(&rtwdev->fw.req.completion);
4342 init_completion(&rtwdev->rfk_wait.completion);
4344 schedule_work(&rtwdev->load_firmware_work);
4360 destroy_workqueue(rtwdev->txq_wq);
4361 mutex_destroy(&rtwdev->rf_mutex);
4362 mutex_destroy(&rtwdev->mutex);
4370 rtwvif->sub_entity_idx);
4372 rtwdev->scanning = true;
4377 ether_addr_copy(rtwvif->mac_addr, mac_addr);
4378 rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type);
4389 struct rtw89_vif *rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL;
4394 ether_addr_copy(rtwvif->mac_addr, vif->addr);
4401 rtwdev->scanning = false;
4402 rtwdev->dig.bypass_dig = true;
4403 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
4404 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
4409 const struct rtw89_chip_info *chip = rtwdev->chip;
4415 if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) {
4422 rtwdev->hal.cv = cv;
4429 rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK);
4435 rtwdev->hal.support_cckpd =
4436 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) &&
4437 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV);
4438 rtwdev->hal.support_igi =
4439 rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
4444 const struct rtw89_chip_info *chip = rtwdev->chip;
4445 const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf;
4446 struct rtw89_efuse *efuse = &rtwdev->efuse;
4448 u8 rfe_type = efuse->rfe_type;
4451 sel = chip->dflt_parms;
4455 while (conf->rfe_parms) {
4456 if (rfe_type == conf->rfe_type) {
4457 sel = conf->rfe_parms;
4463 sel = chip->dflt_parms;
4466 rtwdev->rfe_parms = rtw89_load_rfe_data_from_fw(rtwdev, sel);
4467 rtw89_load_txpwr_table(rtwdev, rtwdev->rfe_parms->byr_tbl);
4472 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
4479 ret = mac->parse_efuse_map(rtwdev);
4483 ret = mac->parse_phycap_map(rtwdev);
4540 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
4548 const struct rtw89_chip_info *chip = rtwdev->chip;
4549 struct ieee80211_hw *hw = rtwdev->hw;
4550 struct rtw89_efuse *efuse = &rtwdev->efuse;
4551 struct rtw89_hal *hal = &rtwdev->hal;
4555 hw->vif_data_size = sizeof(struct rtw89_vif);
4556 hw->sta_data_size = sizeof(struct rtw89_sta);
4557 hw->txq_data_size = sizeof(struct rtw89_txq);
4558 hw->chanctx_data_size = sizeof(struct rtw89_chanctx_cfg);
4560 SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
4562 hw->extra_tx_headroom = tx_headroom;
4563 hw->queues = IEEE80211_NUM_ACS;
4564 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
4565 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
4566 hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
4568 hw->radiotap_mcs_details |= IEEE80211_RADIOTAP_MCS_HAVE_FEC |
4570 hw->radiotap_vht_details |= IEEE80211_RADIOTAP_VHT_KNOWN_STBC;
4587 if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
4590 if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
4593 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
4598 if (hal->ant_diversity) {
4599 hw->wiphy->available_antennas_tx = 0x3;
4600 hw->wiphy->available_antennas_rx = 0x3;
4602 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
4603 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
4606 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
4611 if (!chip->support_rnr)
4612 hw->wiphy->flags |= WIPHY_FLAG_SPLIT_SCAN_6GHZ;
4614 if (chip->chip_gen == RTW89_CHIP_BE)
4615 hw->wiphy->flags |= WIPHY_FLAG_DISABLE_WEXT;
4617 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
4619 hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
4620 hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN;
4623 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
4626 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
4627 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
4628 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
4629 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
4630 hw->wiphy->max_remain_on_channel_duration = 1000;
4632 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
4633 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
4634 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
4648 hw->wiphy->sar_capa = &rtw89_sar_capa;
4674 struct ieee80211_hw *hw = rtwdev->hw;
4712 int fw_format = -1;
4721 no_chanctx = chip->support_chanctx_num == 0 ||
4726 ops->add_chanctx = ieee80211_emulate_add_chanctx;
4727 ops->remove_chanctx = ieee80211_emulate_remove_chanctx;
4728 ops->change_chanctx = ieee80211_emulate_change_chanctx;
4729 ops->switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx;
4730 ops->assign_vif_chanctx = NULL;
4731 ops->unassign_vif_chanctx = NULL;
4732 ops->remain_on_channel = NULL;
4733 ops->cancel_remain_on_channel = NULL;
4741 hw->wiphy->iface_combinations = rtw89_iface_combs;
4743 if (no_chanctx || chip->support_chanctx_num == 1)
4744 hw->wiphy->n_iface_combinations = 1;
4746 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw89_iface_combs);
4748 rtwdev = hw->priv;
4749 rtwdev->hw = hw;
4750 rtwdev->dev = device;
4751 rtwdev->ops = ops;
4752 rtwdev->chip = chip;
4753 rtwdev->fw.req.firmware = firmware;
4754 rtwdev->fw.fw_format = fw_format;
4770 kfree(rtwdev->ops);
4771 kfree(rtwdev->rfe_data);
4772 release_firmware(rtwdev->fw.req.firmware);
4773 ieee80211_free_hw(rtwdev->hw);