Lines Matching full:efuse

20 #include "efuse.h"
996 WARN(1, "invalid hw configuration from efuse\n");
1210 struct rtw_efuse *efuse = &rtwdev->efuse;
1240 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1421 wifi_only = !rtwdev->efuse.btcoex;
1562 struct rtw_efuse *efuse = &rtwdev->efuse;
1575 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1582 if (efuse->hw_cap.nss > 1) {
1598 struct rtw_efuse *efuse = &rtwdev->efuse;
1602 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1603 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1630 if (efuse->hw_cap.nss > 1) {
1843 struct rtw_efuse *efuse = &rtwdev->efuse;
1880 efuse->physical_size = chip->phy_efuse_size;
1881 efuse->logical_size = chip->log_efuse_size;
1882 efuse->protect_size = chip->ptct_efuse_size;
1935 struct rtw_efuse *efuse = &rtwdev->efuse;
1953 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1954 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1955 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1956 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1957 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1959 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1961 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1962 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1963 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1967 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1968 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1981 struct rtw_efuse *efuse = &rtwdev->efuse;
1986 /* power on mac to read efuse */
2003 if (efuse->crystal_cap == 0xff)
2004 efuse->crystal_cap = 0;
2005 if (efuse->pa_type_2g == 0xff)
2006 efuse->pa_type_2g = 0;
2007 if (efuse->pa_type_5g == 0xff)
2008 efuse->pa_type_5g = 0;
2009 if (efuse->lna_type_2g == 0xff)
2010 efuse->lna_type_2g = 0;
2011 if (efuse->lna_type_5g == 0xff)
2012 efuse->lna_type_5g = 0;
2013 if (efuse->channel_plan == 0xff)
2014 efuse->channel_plan = 0x7f;
2015 if (efuse->rf_board_option == 0xff)
2016 efuse->rf_board_option = 0;
2017 if (efuse->bt_setting & BIT(0))
2018 efuse->share_ant = true;
2019 if (efuse->regd == 0xff)
2020 efuse->regd = 0;
2021 if (efuse->tx_bb_swing_setting_2g == 0xff)
2022 efuse->tx_bb_swing_setting_2g = 0;
2023 if (efuse->tx_bb_swing_setting_5g == 0xff)
2024 efuse->tx_bb_swing_setting_5g = 0;
2026 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
2027 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
2028 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
2029 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
2030 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
2032 if (!is_valid_ether_addr(efuse->addr)) {
2033 eth_random_addr(efuse->addr);
2034 dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n");
2076 rtw_err(rtwdev, "failed to setup chip efuse info\n");
2291 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);