Lines Matching +full:irqs +full:- +full:map +full:- +full:range
1 /*-
110 * as we want. To support 32-bit cards let's assume
113 * 0x00000000 - 0x000FFFFF IO
114 * 0x00100000 - 0xFFFFFFFF Memory
217 * ARM64TODO Workaround - otherwise an em(4) interface appears to be
239 *result = sc->id;
262 return (pci_domain_activate_bus(sc->id, child, r));
280 return (pci_domain_deactivate_bus(sc->id, child, r));
291 struct resource_map_request *argsp, struct resource_map *map)
316 start = range_addr_pci_to_phys(sc->ranges, start);
317 error = bus_space_map(&memmap_bus, start, length, 0, &map->r_bushandle);
320 map->r_bustag = &memmap_bus;
321 map->r_vaddr = (void *)map->r_bushandle;
322 map->r_size = length;
328 struct resource_map *map)
334 bus_space_unmap(map->r_bustag, map->r_bushandle, map->r_size);
350 return (pci_domain_adjust_bus(sc->id, child, res, start, end));
367 return (sc->dmat);
372 int *irqs)
378 irqs));
382 thunder_pem_release_msi(device_t pci, device_t child, int count, int *irqs)
387 return (PCIB_RELEASE_MSI(device_get_parent(bus), child, count, irqs));
436 * numbers using hard-coded domain portion for each group.
459 start = rman_get_start(sc->reg);
462 sc->node = (start >> SLI_NODE_SHIFT) & SLI_NODE_MASK;
463 sc->id = ((start >> SLI_ID_SHIFT) & SLI_ID_MASK) +
464 (SLI_PEMS_PER_NODE * sc->node);
465 sc->sli = sc->id % SLI_PEMS_PER_GROUP;
466 sc->sli_group = (sc->id / SLI_PEMS_PER_GROUP) % SLI_GROUPS_PER_NODE;
467 sc->sli_window_base = SLI_BASE |
468 (((uint64_t)sc->node) << SLI_NODE_SHIFT) |
469 ((uint64_t)sc->sli_group << SLI_GROUP_SHIFT);
470 sc->sli_window_base += SLI_WINDOW_SPACING * sc->sli;
489 device_printf(sc->dev, "SLI group is not correct\n");
492 /* Clear lower 32-bits of the SLIx register */
493 regval = bus_space_read_8(sc->reg_bst, handle,
496 bus_space_write_8(sc->reg_bst, handle,
507 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_ON_REG);
509 device_printf(sc->dev, "PEM%d is not ON\n", sc->id);
513 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS);
515 bus_space_write_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS, regval);
523 device_printf(sc->dev, "PCIe RC: Port %d Link Timeout\n",
524 sc->id);
538 device_printf(sc->dev, "%s failed\n", __func__);
542 /* To support 32-bit PCIe devices, set S2M_REGx_ACC[BA]=0x0 */
544 thunder_pem_slix_s2m_regx_acc_modify(sc, sc->sli_group, i);
556 bus_space_write_8(sc->reg_bst, sc->reg_bsh, PEM_CFG_RD,
558 bus_space_barrier(sc->reg_bst, sc->reg_bsh, PEM_CFG_RD, 8,
561 data = PEM_CFG_RD_REG_DATA(bus_space_read_8(sc->reg_bst, sc->reg_bsh,
586 t = sc->reg_bst;
587 h = sc->pem_sli_base;
589 bus_space_map(sc->reg_bst, sc->sli_window_base + offset,
607 bus_space_unmap(sc->reg_bst, h, PCIE_REGMAX);
630 t = sc->reg_bst;
631 h = sc->pem_sli_base;
633 bus_space_map(sc->reg_bst, sc->sli_window_base + offset,
650 bus_space_unmap(sc->reg_bst, h, PCIE_REGMAX);
663 return (pci_domain_alloc_bus(sc->id, child, rid, start, end,
680 if (range_addr_is_phys(sc->ranges, start, count)) {
681 start = range_addr_phys_to_pci(sc->ranges, start);
682 end = start + count - 1;
711 return (pci_domain_release_bus(sc->id, child, res));
730 return (&sc->io_rman);
732 return (&sc->mem_rman);
762 struct resource_map map;
773 sc->dev = dev;
783 sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
785 if (sc->reg == NULL) {
791 error = bus_map_resource(dev, SYS_RES_MEMORY, sc->reg, &req, &map);
793 device_printf(dev, "could not map memory.\n");
796 rman_set_mapping(sc->reg, &map);
798 sc->reg_bst = rman_get_bustag(sc->reg);
799 sc->reg_bsh = rman_get_bushandle(sc->reg);
812 &sc->dmat);
816 /* Map SLI, do it only once */
818 bus_space_map(sc->reg_bst, SLIX_S2M_REGX_ACC,
822 bus_space_map(sc->reg_bst, SLIX_S2M_REGX_ACC +
829 "bus_space_map failed to map slix_s2m_regx_base\n");
838 sc->mem_rman.rm_type = RMAN_ARRAY;
839 sc->mem_rman.rm_descr = "PEM PCIe Memory";
840 error = rman_init(&sc->mem_rman);
846 sc->io_rman.rm_type = RMAN_ARRAY;
847 sc->io_rman.rm_descr = "PEM PCIe IO";
848 error = rman_init(&sc->io_rman);
863 sc->ranges[0].pci_base = PCI_MEMORY_BASE;
864 sc->ranges[0].size = PCI_MEMORY_SIZE;
865 sc->ranges[0].phys_base = sc->sli_window_base + SLI_PCI_OFFSET +
866 sc->ranges[0].pci_base;
867 sc->ranges[0].flags = SYS_RES_MEMORY;
870 sc->ranges[1].pci_base = PCI_IO_BASE;
871 sc->ranges[1].size = PCI_IO_SIZE;
872 sc->ranges[1].phys_base = sc->sli_window_base + SLI_PCI_OFFSET +
873 sc->ranges[1].pci_base;
874 sc->ranges[1].flags = SYS_RES_IOPORT;
877 base = sc->ranges[tuple].pci_base;
878 size = sc->ranges[tuple].size;
880 continue; /* empty range element */
882 rman = thunder_pem_get_rman(dev, sc->ranges[tuple].flags, 0);
885 base + size - 1);
891 rman_fini(&sc->mem_rman);
897 sc->ranges[tuple].pci_base,
898 sc->ranges[tuple].phys_base,
899 sc->ranges[tuple].size,
900 sc->ranges[tuple].flags);
914 rman_fini(&sc->io_rman);
916 rman_fini(&sc->mem_rman);
918 bus_free_resource(dev, SYS_RES_MEMORY, sc->reg);
929 rman_fini(&sc->io_rman);
930 rman_fini(&sc->mem_rman);
932 if (sc->reg != NULL)
933 bus_free_resource(dev, SYS_RES_MEMORY, sc->reg);