Lines Matching +full:sysc +full:- +full:delay +full:- +full:us
1 /*-
61 /* Documentation/devicetree/bindings/bus/ti-sysc.txt
63 * Documentation/devicetree/clock/clock-bindings.txt
65 * Documentation/devicetree/clock/ti-clkctl.txt
91 { "ti,sysc-dra7-mcan", TI_SYSC_DRA7_MCAN },
92 { "ti,sysc-usb-host-fs", TI_SYSC_USB_HOST_FS },
93 { "ti,sysc-dra7-mcasp", TI_SYSC_DRA7_MCASP },
94 { "ti,sysc-mcasp", TI_SYSC_MCASP },
95 { "ti,sysc-omap-aes", TI_SYSC_OMAP_AES },
96 { "ti,sysc-omap3-sham", TI_SYSC_OMAP3_SHAM },
97 { "ti,sysc-omap4-sr", TI_SYSC_OMAP4_SR },
98 { "ti,sysc-omap3630-sr", TI_SYSC_OMAP3630_SR },
99 { "ti,sysc-omap3430-sr", TI_SYSC_OMAP3430_SR },
100 { "ti,sysc-omap4-timer", TI_SYSC_OMAP4_TIMER },
101 { "ti,sysc-omap2-timer", TI_SYSC_OMAP2_TIMER },
103 { "ti,sysc-omap4-simple", TI_SYSC_OMAP4_SIMPLE },
104 { "ti,sysc-omap4", TI_SYSC_OMAP4 },
105 { "ti,sysc-omap2", TI_SYSC_OMAP2 },
106 { "ti,sysc", TI_SYSC },
110 /* reg-names can be "rev", "sysc" and "syss" */
111 static const char * reg_names[] = { "rev", "sysc", "syss" };
118 #include <dt-bindings/bus/ti-sysc.h>
158 * All sysc seems to have a reg["rev"] register.
165 return (sc->reg[REG_REV].address);
172 return (sc->offset_reg[REG_REV]);
179 return (sc->reg[REG_SYSC].address);
186 return (sc->offset_reg[REG_SYSC]);
193 return (sc->reg[REG_SYSS].address);
200 return (sc->offset_reg[REG_SYSS]);
204 * Due no memory region is assigned the sysc driver the children needs to
206 * Check if sysc has reset bit.
211 switch (sc->device_type) {
215 if (sc->ti_sysc_mask & SYSC_OMAP4_SOFTRESET) {
223 if (sc->ti_sysc_mask & SYSC_OMAP2_SOFTRESET) {
240 TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
241 err = clk_enable(clkp->clk);
244 DPRINTF(sc->dev, "clk_enable %s failed %d\n",
245 clk_get_name(clkp->clk), err);
258 TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
259 err = clk_disable(clkp->clk);
262 DPRINTF(sc->dev, "clk_enable %s failed %d\n",
263 clk_get_name(clkp->clk), err);
280 node = ofw_bus_get_node(sc->dev);
283 err = OF_searchencprop(OF_parent(node), "#address-cells",
285 if (err == -1)
288 DPRINTF(sc->dev, "Expect parent #address-cells=[1||2]\n");
292 err = OF_searchencprop(OF_parent(node), "#size-cells",
294 if (err == -1)
298 DPRINTF(sc->dev, "Expect parent #size-cells = [1||2]\n");
312 sc->reg[idx].address = 0;
313 sc->reg[idx].size = 0;
316 /* Loop through reg-names and figure out which reg-name corresponds to
320 err = ofw_bus_find_string_index(node, "reg-names",
326 sc->reg[prop_idx].address <<= 32;
327 sc->reg[prop_idx].address |= reg[reg_i++];
331 sc->reg[prop_idx].size <<= 32;
332 sc->reg[prop_idx].size |= reg[reg_i++];
335 if (sc->sc.nranges == 0)
336 sc->offset_reg[prop_idx] = sc->reg[prop_idx].address;
338 sc->offset_reg[prop_idx] = sc->reg[prop_idx].address -
339 sc->sc.ranges[REG_REV].host;
341 DPRINTF(sc->dev, "reg[%s] address %#jx size %#jx\n",
343 sc->reg[prop_idx].address,
344 sc->reg[prop_idx].size);
356 node = ofw_bus_get_node(sc->dev);
365 DPRINTF(sc->dev, "Limit %s\n", name);
366 no = SYSC_IDLE_MAX-1;
374 DPRINTF(sc->dev, "%s[%d] = %d ",
378 DPRINTF(sc->dev, "SYSC_IDLE_FORCE\n");
381 DPRINTF(sc->dev, "SYSC_IDLE_NO\n");
384 DPRINTF(sc->dev, "SYSC_IDLE_SMART\n");
387 DPRINTF(sc->dev, "SYSC_IDLE_SMART_WKUP\n");
393 idle[i] = -1;
402 clk = malloc(sc->num_clocks*sizeof(clk_t), M_DEVBUF, M_WAITOK | M_ZERO);
405 for (index = 0; index < sc->num_clocks; index++) {
406 err = clk_get_by_ofw_index(sc->dev, 0, index, &clk[index]);
415 for (index = 0; index < sc->num_clocks; index++) {
417 clkp->clk = clk[index];
418 TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);
432 node = ofw_bus_get_node(sc->dev);
435 cdev = simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL);
449 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
452 device_set_desc(dev, "TI SYSC Interconnect");
466 sc->dev = dev;
467 sc->device_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
469 node = ofw_bus_get_node(sc->dev);
470 /* ranges - use simplebus */
471 simplebus_init(sc->dev, node);
472 if (simplebus_fill_ranges(node, &sc->sc) < 0) {
473 DPRINTF(sc->dev, "could not get ranges\n");
477 if (sc->sc.nranges == 0) {
478 DPRINTF(sc->dev, "nranges == 0\n");
482 /* Required field reg & reg-names - assume at least "rev" exists */
485 DPRINTF(sc->dev, "parse_regfields failed %d\n", err);
490 if (OF_hasprop(node, "ti,sysc-mask")) {
491 OF_getencprop(node, "ti,sysc-mask", &value, sizeof(cell_t));
492 sc->ti_sysc_mask = value;
494 if (OF_hasprop(node, "ti,syss-mask")) {
495 OF_getencprop(node, "ti,syss-mask", &value, sizeof(cell_t));
496 sc->ti_syss_mask = value;
498 if (OF_hasprop(node, "ti,sysc-delay-us")) {
499 OF_getencprop(node, "ti,sysc-delay-us", &value, sizeof(cell_t));
500 sc->ti_sysc_delay_us = value;
503 DPRINTF(sc->dev, "sysc_mask %x syss_mask %x delay_us %x\n",
504 sc->ti_sysc_mask, sc->ti_syss_mask, sc->ti_sysc_delay_us);
506 parse_idle(sc, "ti,sysc-midle", sc->ti_sysc_midle);
507 parse_idle(sc, "ti,sysc-sidle", sc->ti_sysc_sidle);
509 if (OF_hasprop(node, "ti,no-reset-on-init"))
510 sc->ti_no_reset_on_init = true;
512 sc->ti_no_reset_on_init = false;
514 if (OF_hasprop(node, "ti,no-idle-on-init"))
515 sc->ti_no_idle_on_init = true;
517 sc->ti_no_idle_on_init = false;
519 if (OF_hasprop(node, "ti,no-idle"))
520 sc->ti_no_idle = true;
522 sc->ti_no_idle = false;
524 DPRINTF(sc->dev,
525 "no-reset-on-init %d, no-idle-on-init %d, no-idle %d\n",
526 sc->ti_no_reset_on_init,
527 sc->ti_no_idle_on_init,
528 sc->ti_no_idle);
532 read_clock_cells(sc->dev, &cell_info);
536 sc->num_clocks = cell_info.num_real_clocks;
537 TAILQ_INIT(&sc->clk_list);
541 DPRINTF(sc->dev, "Failed to attach clocks\n");
542 bus_attach_children(sc->dev);
547 err = ti_sysc_simplebus_attach_child(sc->dev);
549 DPRINTF(sc->dev, "ti_sysc_simplebus_attach_child %d\n",
554 sc->attach_done = true;
556 bus_attach_children(sc->dev);
576 if (sc->attach_done) {
577 bus_generic_new_pass(sc->dev);
581 node = ofw_bus_get_node(sc->dev);
585 DPRINTF(sc->dev, "Failed to attach clocks\n");
590 err = ti_sysc_simplebus_attach_child(sc->dev);
592 DPRINTF(sc->dev,
596 sc->attach_done = true;
598 bus_attach_children(sc->dev);