Lines Matching defs:sclh
102 uint8_t sclh; /* Fast/Standard mode SCL high time */
109 * OMAP4 i2c bus clock is 96MHz / ((psc + 1) * (scll + 7 + sclh + 5)).
124 * AM335x i2c bus clock is 48MHZ / ((psc + 1) * (scll + 7 + sclh + 5))
475 uint16_t fifo_trsh, reg, scll, sclh;
565 sclh = clkcfg->sclh & I2C_SCLH_MASK;
583 sclh |= clkcfg->hssclh << I2C_HSSCLH_SHIFT;
592 ti_i2c_write_2(sc, I2C_REG_SCLH, sclh);
751 int clk, psc, sclh, scll;
762 sclh = (int)ti_i2c_read_2(sc, I2C_REG_SCLH) & I2C_SCLH_MASK;
764 clk = I2C_CLK / psc / (scll + 7 + sclh + 5);