Lines Matching +full:mux +full:- +full:add +full:- +full:data

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
55  * Documentation/devicetree/bindings/clock/ti/mux.txt
76 	{ "ti,mux-clock",		TI_MUX_CLOCK },
77 	{ "ti,composite-mux-clock",	TI_COMPOSITE_MUX_CLOCK },
87 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
90 	device_set_desc(dev, "TI Mux Clock");
99 	sc->clkdom = clkdom_create(sc->sc_dev);
100 	if (sc->clkdom == NULL) {
101 		DPRINTF(sc->sc_dev, "Failed to create clkdom\n");
105 	err = clknode_mux_register(sc->clkdom, &sc->mux_def);
107 		DPRINTF(sc->sc_dev, "clknode_mux_register failed %x\n", err);
111 	err = clkdom_finit(sc->clkdom);
113 		DPRINTF(sc->sc_dev, "Clk domain finit fails %x.\n", err);
129 	sc->sc_dev = dev;
134 	sc->mux_def.offset = value;
136 	if (OF_hasprop(node, "ti,bit-shift")) {
137 		OF_getencprop(node, "ti,bit-shift", &value, sizeof(value));
138 		sc->mux_def.shift = value;
139 		DPRINTF(sc->sc_dev, "ti,bit-shift => shift %x\n", sc->mux_def.shift);
141 	if (OF_hasprop(node, "ti,index-starts-at-one")) {
142 		/* FIXME: Add support in dev/extres/clk */
143 		/*sc->mux_def.mux_flags =  ... */
144 		device_printf(sc->sc_dev, "ti,index-starts-at-one - Not implemented\n");
147 	if (OF_hasprop(node, "ti,set-rate-parent"))
148 		device_printf(sc->sc_dev, "ti,set-rate-parent - Not implemented\n");
149 	if (OF_hasprop(node, "ti,latch-bit"))
150 		device_printf(sc->sc_dev, "ti,latch-bit - Not implemented\n");
152 	read_clock_cells(sc->sc_dev, &sc->clock_cell);
154 	create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
157 	if (sc->mux_def.mux_flags)
158 		sc->mux_def.width = fls(sc->clock_cell.num_real_clocks-1);
160 		sc->mux_def.width = fls(sc->clock_cell.num_real_clocks);
162 	DPRINTF(sc->sc_dev, "sc->clock_cell.num_real_clocks %x def.width %x\n",
163 		sc->clock_cell.num_real_clocks, sc->mux_def.width);
165 	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
169 		DPRINTF(sc->sc_dev, "find_parent_clock_names failed\n");
170 		bus_attach_children(sc->dev);
178 		DPRINTF(sc->sc_dev, "register_clk failed\n");
179 		bus_attach_children(sc->dev);
183 	sc->attach_done = true;
185 	free_clkdef(&sc->mux_def.clkdef);
187 	bus_attach_children(sc->dev);
199 	if (sc->attach_done) {
203 	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
206 		DPRINTF(sc->sc_dev, "ti_mux_new_pass find_parent_clock_names failed\n");
213 		DPRINTF(sc->sc_dev, "ti_mux_new_pass register_clk failed\n");
217 	sc->attach_done = true;
219 	free_clkdef(&sc->mux_def.clkdef);