Lines Matching +full:cd +full:- +full:inverted
1 /*-
53 * variable-duty-cycle PWM output.
62 #define PWM_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
63 #define PWM_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
64 #define PWM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
65 #define PWM_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \
66 device_get_nameunit(_sc->sc_dev), "am335x_ehrpwm softc", MTX_DEF)
67 #define PWM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
69 #define EPWM_READ2(_sc, reg) bus_read_2((_sc)->sc_mem_res, reg)
71 bus_write_2((_sc)->sc_mem_res, reg, value)
102 /* Counter-compare */
142 /* Trip-Zone module */
155 /* PWM-chopper */
161 /* High-Resolution PWM */
174 bool inverted; /* signal inverted? */
193 {"ti,am3352-ehrpwm", true},
194 {"ti,am33xx-ehrpwm", true},
207 tbcmp = max(1, duty / sc->sc_clktick);
209 sc->sc_channels[chan].duty = tbcmp * sc->sc_clktick;
220 sc->sc_channels[chan].enabled = enable;
223 * Turn off any existing software-force of the channel, then force
229 if (!sc->sc_channels[chan].enabled) {
230 if (sc->sc_channels[chan].inverted)
246 sc->sc_clkfreq = 0;
247 sc->sc_clktick = 0;
248 sc->sc_period = 0;
254 * that we can express the requested period as a 16-bit tick count.
258 const u_int cd = 1 << clkdiv;
261 pwmclk = PWM_CLOCK / (cd * cdhs);
280 if (sc->sc_clkfreq != pwmclk || sc->sc_clktick != pwmtick ||
281 sc->sc_period != tbprd * pwmtick) {
282 sc->sc_clkfreq = pwmclk;
283 sc->sc_clktick = pwmtick;
284 sc->sc_period = tbprd * pwmtick;
291 EPWM_WRITE2(sc, EPWM_TBPRD, tbprd - 1);
293 device_printf(sc->sc_dev, "clkdiv %u hspclkdiv %u tbprd %u "
295 clkdiv, hspclkdiv, tbprd - 1,
296 sc->sc_clkfreq, sc->sc_clktick, sc->sc_period, period);
348 *period = sc->sc_period;
349 *duty = sc->sc_channels[channel].duty;
366 sc->sc_channels[channel].inverted = true;
367 /* Action-Qualifier 15.2.2.5 */
375 sc->sc_channels[channel].inverted = false;
398 if (sc->sc_channels[channel].inverted == true)
434 *enabled = sc->sc_channels[channel].enabled;
446 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
461 sc->sc_dev = dev;
465 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
466 &sc->sc_mem_rid, RF_ACTIVE);
467 if (sc->sc_mem_res == NULL) {
477 EPWM_WRITE2(sc, EPWM_TBPRD, DEFAULT_PWM_PERIOD - 1);
481 /* Action-Qualifier 15.2.2.5 */
491 /* PWM-chopper described in 15.2.2.7 */
493 * to control the power switching-elements
504 /* disable TZn as one-shot / CVC trip source 15.2.4.18 */
515 if ((sc->sc_busdev = device_add_child(dev, "pwmbus", -1)) == NULL) {
525 if (sc->sc_mem_res)
527 sc->sc_mem_rid, sc->sc_mem_res);
540 if ((error = bus_generic_detach(sc->sc_dev)) != 0)
545 if (sc->sc_mem_res)
547 sc->sc_mem_rid, sc->sc_mem_res);