Lines Matching +full:disable +full:- +full:dc
1 /*-
58 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, 4 * (_r), (_v))
59 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, 4 * (_r))
205 {"nvidia,tegra124-hdmi", 1},
225 return -EINVAL;
231 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
232 frame->pixel_repeat = 1;
234 frame->video_code = drm_match_cea_mode(mode);
236 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
242 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
243 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
244 frame->picture_aspect = mode->picture_aspect_ratio;
245 else if (frame->video_code > 0)
246 frame->picture_aspect = drm_get_cea_aspect_ratio(
247 frame->video_code);
250 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
251 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
255 /* --------------------------------------------------------------------- */
264 sc = device_get_softc(output->dev);
266 /* Disable consumers clock for while. */
267 rv = clk_disable(sc->clk_hdmi);
269 device_printf(sc->dev, "Cannot disable 'hdmi' clock\n");
274 device_printf(sc->dev, "Cannot disable display clock\n");
280 rv = clk_set_freq(sc->clk_parent, freq, 0);
282 device_printf(output->dev,
288 rv = clk_set_parent_by_clk(clk, sc->clk_parent);
290 device_printf(output->dev, "Cannot set parent clock\n");
295 device_printf(output->dev,
299 rv = clk_set_freq(sc->clk_hdmi, pclk, 0);
301 device_printf(output->dev,
309 device_printf(sc->dev, "Cannot enable display clock\n");
312 rv = clk_enable(sc->clk_hdmi);
314 device_printf(sc->dev, "Cannot enable 'hdmi' clock\n");
320 device_printf(output->dev,
325 DRM_DEBUG_KMS("DC frequency: %llu\n", freq);
330 /* -------------------------------------------------------------------
344 device_printf(sc->dev, "Cannot setup AVI infoframe: %zd\n", rv);
349 device_printf(sc->dev, "Cannot pack AVI infoframe: %zd\n", rv);
377 frame.channels = sc->audio_chans;
380 device_printf(sc->dev, "Cannot pack audio infoframe\n");
396 /* -------------------------------------------------------------------
408 size = drm_eld_size(sc->output.connector.eld);
412 val |= sc->output.connector.eld[i];
428 if (reg->audio_clk == freq) {
430 *acr_reg = reg->acr_reg;
432 *nval_reg = reg->nval_reg;
434 *aval_reg = reg->aval_reg;
482 err_f = cts_f - TO_FFP(cts);
484 err_f = -err_f;
490 better_n = abs(n - ideal_n) < abs((int)(*best_n) - ideal_n);
519 if (!sc->hdmi_mode)
521 rv = get_audio_regs(sc->audio_freq, NULL, NULL, &aval_reg);
523 device_printf(sc->dev, "Unsupported audio frequency.\n");
527 rv = clk_get_freq(sc->clk_hdmi, &hdmi_freq);
529 device_printf(sc->dev, "Cannot get hdmi frequency: %d\n", rv);
533 rv = get_hda_cts_n(sc->audio_freq, hdmi_freq, &audio_cts, &audio_n,
536 device_printf(sc->dev, "Cannot compute audio coefs: %d\n", rv);
544 SOR_AUDIO_CNTRL0_SOURCE_SELECT(sc->audio_src_type) |
556 AUDIO_N_VALUE(audio_n - 1));
580 /* Disable audio */
585 /* Disable audio infoframes */
595 if (!sc->hdmi_mode)
609 /* -------------------------------------------------------------------
621 if (!sc->hdmi_mode)
632 sc->audio_freq = val & 0x00FFFFFF;
633 sc->audio_chans = (val >> 24) & 0x0f;
634 DRM_DEBUG_KMS("%d channel(s) at %dHz\n", sc->audio_chans,
635 sc->audio_freq);
650 WR4(sc, HDMI_NV_PDISP_SOR_PLL0, tmds->pll0);
651 WR4(sc, HDMI_NV_PDISP_SOR_PLL1, tmds->pll1);
652 WR4(sc, HDMI_NV_PDISP_PE_CURRENT, tmds->pe_c);
653 WR4(sc, HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT, tmds->drive_c);
654 WR4(sc, HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT, tmds->peak_c);
655 WR4(sc, HDMI_NV_PDISP_SOR_PAD_CTLS0, tmds->pad_ctls);
680 for (i = 1000; i > 0; i--) {
687 device_printf(sc->dev, "Timeouted while enabling SOR power.\n");
695 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
697 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
720 device_t dc;
723 dc = NULL;
724 if (sc->output.encoder.crtc != NULL) {
725 crtc = container_of(sc->output.encoder.crtc, struct tegra_crtc,
727 dc = crtc->dev;
730 if (dc != NULL) {
731 TEGRA_DC_HDMI_ENABLE(dc, false);
732 TEGRA_DC_DISPLAY_ENABLE(dc, false);
739 /* Disable interrupts */
754 device_t dc;
757 mode = &sc->output.encoder.crtc->mode;
758 crtc = container_of(sc->output.encoder.crtc, struct tegra_crtc,
760 dc = crtc->dev;
763 sc->pclk = mode->clock * 1000;
764 h_sync_width = mode->hsync_end - mode->hsync_start;
765 h_back_porch = mode->htotal - mode->hsync_end;
766 h_front_porch = mode->hsync_start - mode->hdisplay;
767 h_pulse_start = 1 + h_sync_width + h_back_porch - 10;
768 h_max_ac_packet = (h_sync_width + h_back_porch + h_front_porch -
769 HDMI_REKEY_DEFAULT - 18) / 32;
772 if (sc->output.connector.edid_blob_ptr == NULL) {
773 sc->hdmi_mode = false;
775 sc->hdmi_mode = drm_detect_hdmi_monitor(
776 (struct edid *)sc->output.connector.edid_blob_ptr->data);
780 rv = clk_get_freq(sc->clk_hdmi, &freq);
782 device_printf(sc->dev,
799 TEGRA_DC_SETUP_TIMING(dc, h_pulse_start);
806 if (crtc->nvidia_head != 0)
808 if ((mode->hdisplay != 640) || (mode->vdisplay != 480))
812 /* Program SOR reference clock - it uses 8.2 fractional divisor */
818 if (sc->hdmi_mode) {
821 sc->hdmi_mode = false;
828 if (sc->hdmi_mode)
833 for (i = 0; i < sc->n_tmds_configs; i++) {
834 if (sc->pclk <= sc->tmds_config[i].pclk) {
835 tmds_init(sc, sc->tmds_config + i);
861 TEGRA_DC_DISPLAY_ENABLE(dc, false);
867 TEGRA_DC_HDMI_ENABLE(dc, true);
868 TEGRA_DC_DISPLAY_ENABLE(dc, true);
874 if (sc->hdmi_mode) {
882 /* -------------------------------------------------------------------
898 sc = device_get_softc(output->dev);
900 freq = HDMI_DC_CLOCK_MULTIPIER * mode->clock * 1000;
901 rv = clk_test_freq(sc->clk_parent, freq, 0);
902 DRM_DEBUG_KMS("Test HDMI frequency: %u kHz, rv: %d\n", mode->clock, rv);
965 sc = device_get_softc(output->dev);
968 device_printf(sc->dev, "Cannot enable HDMI port\n");
980 sc = device_get_softc(output->dev);
985 device_printf(sc->dev, "Cannot disable HDMI port\n");
994 .disable = hdmi_encoder_disable,
997 /* -------------------------------------------------------------------
1010 node = ofw_bus_get_node(sc->dev);
1011 sc->drm = drm;
1012 sc->output.setup_clock = &hdmi_setup_clock;
1014 rv = tegra_drm_encoder_attach(&sc->output, node);
1021 drm_connector_init(&drm->drm_dev, &sc->output.connector,
1024 drm_connector_helper_add(&sc->output.connector,
1027 sc->output.connector.dpms = DRM_MODE_DPMS_OFF;
1029 drm_encoder_init(&drm->drm_dev, &sc->output.encoder,
1032 drm_encoder_helper_add(&sc->output.encoder, &hdmi_encoder_helper_funcs);
1034 drm_mode_connector_attach_encoder(&sc->output.connector,
1035 &sc->output.encoder);
1037 rv = tegra_drm_encoder_init(&sc->output, drm);
1039 device_printf(sc->dev, "Unable to init HDMI output\n");
1042 sc->output.encoder.possible_crtcs = 0x3;
1052 tegra_drm_encoder_exit(&sc->output, drm);
1061 rv = regulator_get_by_ofw_property(sc->dev, 0, "hdmi-supply",
1062 &sc->supply_hdmi);
1064 device_printf(sc->dev, "Cannot get 'hdmi' regulator\n");
1067 rv = regulator_get_by_ofw_property(sc->dev,0, "pll-supply",
1068 &sc->supply_pll);
1070 device_printf(sc->dev, "Cannot get 'pll' regulator\n");
1073 rv = regulator_get_by_ofw_property(sc->dev, 0, "vdd-supply",
1074 &sc->supply_vdd);
1076 device_printf(sc->dev, "Cannot get 'vdd' regulator\n");
1080 rv = hwreset_get_by_ofw_name(sc->dev, 0, "hdmi", &sc->hwreset_hdmi);
1082 device_printf(sc->dev, "Cannot get 'hdmi' reset\n");
1085 rv = clk_get_by_ofw_name(sc->dev, 0, "parent", &sc->clk_parent);
1087 device_printf(sc->dev, "Cannot get 'parent' clock\n");
1090 rv = clk_get_by_ofw_name(sc->dev, 0, "hdmi", &sc->clk_hdmi);
1092 device_printf(sc->dev, "Cannot get 'hdmi' clock\n");
1104 rv = clk_set_parent_by_clk(sc->clk_hdmi, sc->clk_parent);
1106 device_printf(sc->dev,
1112 rv = clk_set_freq(sc->clk_parent, 594000000, 0);
1114 device_printf(sc->dev,
1118 rv = clk_set_freq(sc->clk_hdmi, 594000000 / 4, 0);
1120 device_printf(sc->dev,
1125 rv = regulator_enable(sc->supply_hdmi);
1127 device_printf(sc->dev, "Cannot enable 'hdmi' regulator\n");
1130 rv = regulator_enable(sc->supply_pll);
1132 device_printf(sc->dev, "Cannot enable 'pll' regulator\n");
1135 rv = regulator_enable(sc->supply_vdd);
1137 device_printf(sc->dev, "Cannot enable 'vdd' regulator\n");
1141 rv = clk_enable(sc->clk_hdmi);
1143 device_printf(sc->dev, "Cannot enable 'hdmi' clock\n");
1147 rv = hwreset_deassert(sc->hwreset_hdmi);
1149 device_printf(sc->dev, "Cannot unreset 'hdmi' reset\n");
1179 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
1194 sc->dev = dev;
1195 sc->output.dev = sc->dev;
1196 node = ofw_bus_get_node(sc->dev);
1198 sc->audio_src_type = SOURCE_SELECT_AUTO;
1199 sc->audio_freq = 44100;
1200 sc->audio_chans = 2;
1201 sc->hdmi_mode = false;
1203 sc->tmds_config = tegra124_tmds_config;
1204 sc->n_tmds_configs = nitems(tegra124_tmds_config);
1207 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
1209 if (sc->mem_res == NULL) {
1215 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
1216 if (sc->irq_res == NULL) {
1221 rv = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
1222 NULL, hdmi_intr, sc, &sc->irq_ih);
1240 rv = TEGRA_DRM_REGISTER_CLIENT(device_get_parent(sc->dev), sc->dev);
1249 TEGRA_DRM_DEREGISTER_CLIENT(device_get_parent(sc->dev), sc->dev);
1251 if (sc->irq_ih != NULL)
1252 bus_teardown_intr(dev, sc->irq_res, sc->irq_ih);
1253 if (sc->clk_parent != NULL)
1254 clk_release(sc->clk_parent);
1255 if (sc->clk_hdmi != NULL)
1256 clk_release(sc->clk_hdmi);
1257 if (sc->hwreset_hdmi != NULL)
1258 hwreset_release(sc->hwreset_hdmi);
1259 if (sc->supply_hdmi != NULL)
1260 regulator_release(sc->supply_hdmi);
1261 if (sc->supply_pll != NULL)
1262 regulator_release(sc->supply_pll);
1263 if (sc->supply_vdd != NULL)
1264 regulator_release(sc->supply_vdd);
1265 if (sc->irq_res != NULL)
1266 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
1267 if (sc->mem_res != NULL)
1268 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
1284 TEGRA_DRM_DEREGISTER_CLIENT(device_get_parent(sc->dev), sc->dev);
1286 if (sc->irq_ih != NULL)
1287 bus_teardown_intr(dev, sc->irq_res, sc->irq_ih);
1288 if (sc->clk_parent != NULL)
1289 clk_release(sc->clk_parent);
1290 if (sc->clk_hdmi != NULL)
1291 clk_release(sc->clk_hdmi);
1292 if (sc->hwreset_hdmi != NULL)
1293 hwreset_release(sc->hwreset_hdmi);
1294 if (sc->supply_hdmi != NULL)
1295 regulator_release(sc->supply_hdmi);
1296 if (sc->supply_pll != NULL)
1297 regulator_release(sc->supply_pll);
1298 if (sc->supply_vdd != NULL)
1299 regulator_release(sc->supply_vdd);
1300 if (sc->irq_res != NULL)
1301 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
1302 if (sc->mem_res != NULL)
1303 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);