Lines Matching defs:pclk
128 uint32_t pclk;
140 .pclk = 27000000,
149 .pclk = 74250000,
158 .pclk = 148500000,
167 .pclk = UINT_MAX,
190 uint64_t pclk;
258 hdmi_setup_clock(struct tegra_drm_encoder *output, clk_t clk, uint64_t pclk)
279 freq = HDMI_DC_CLOCK_MULTIPIER * pclk;
299 rv = clk_set_freq(sc->clk_hdmi, pclk, 0);
763 sc->pclk = mode->clock * 1000;
834 if (sc->pclk <= sc->tmds_config[i].pclk) {