Lines Matching +full:pin +full:- +full:ctrl +full:- +full:enable
1 /*-
28 * Vybrid Family 12-bit Analog to Digital Converter (ADC)
53 #define ADC_HC0 0x00 /* Ctrl reg for hardware triggers */
54 #define ADC_HC1 0x04 /* Ctrl reg for hardware triggers */
64 #define CFG_OVWREN (1 << 16) /* Data Overwrite Enable */
73 #define CFG_ADLPC (1 << 7) /* Low-Power Configuration */
79 #define CFG_MODE_12 0x2 /* 12-bit mode */
84 #define GC_ADCO (1 << 6) /* Continuous Conversion Enable */
85 #define GC_AVGE (1 << 5) /* Hardware average enable */
86 #define GC_ACFE (1 << 4) /* Compare Function Enable */
89 #define GC_DMAEN (1 << 1) /* DMA Enable */
90 #define GC_ADACKEN (1 << 0) /* Asynchronous clock output enable */
107 #define ADC_PCTL 0x30 /* Pin control register */
121 { -1, 0 }
131 if (!ofw_bus_is_compatible(dev, "fsl,mvf600-adc")) in adc_probe()
135 "12-bit Analog to Digital Converter"); in adc_probe()
185 if (bus_alloc_resources(dev, adc_spec, sc->res)) { in adc_attach()
191 sc->bst = rman_get_bustag(sc->res[0]); in adc_attach()
192 sc->bsh = rman_get_bushandle(sc->res[0]); in adc_attach()
197 err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_BIO | INTR_MPSAFE, in adc_attach()
198 NULL, adc_intr, sc, &sc->ih); in adc_attach()
204 /* Configure 12-bit mode */ in adc_attach()