Lines Matching +full:cs +full:- +full:2
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
13 * 2. Redistributions in binary form must reproduce the above copyright
58 {"broadcom,bcm2835-spi", 1},
59 {"brcm,bcm2835-spi", 1},
74 device_printf(dev, "CS=%b\n", reg,
75 "\20\1CS0\2CS1\3CPHA\4CPOL\7CSPOL"
80 if (reg % 2)
81 reg--;
105 mtx_assert(&sc->sc_mtx, MA_OWNED);
130 if (error != 0 || req->newptr == NULL)
150 if (error != 0 || req->newptr == NULL)
201 ctx = device_get_sysctl_ctx(sc->sc_dev);
202 tree_node = device_get_sysctl_tree(sc->sc_dev);
221 bcm_spi_cspol2_proc, "IU", "SPI BUS chip select 2 polarity");
231 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
251 sc->sc_dev = dev;
254 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
256 if (!sc->sc_mem_res) {
261 sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
262 sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
265 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
267 if (!sc->sc_irq_res) {
268 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
274 if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
275 NULL, bcm_spi_intr, sc, &sc->sc_intrhand)) {
276 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
277 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
282 mtx_init(&sc->sc_mtx, "bcm_spi", NULL, MTX_DEF);
315 mtx_destroy(&sc->sc_mtx);
316 if (sc->sc_intrhand)
317 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand);
318 if (sc->sc_irq_res)
319 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
320 if (sc->sc_mem_res)
321 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
330 uint32_t cs, written;
333 cmd = sc->sc_cmd;
334 cs = BCM_SPI_READ(sc, SPI_CS) & (SPI_CS_TA | SPI_CS_TXD);
335 while (sc->sc_written < sc->sc_len &&
336 cs == (SPI_CS_TA | SPI_CS_TXD)) {
337 data = (uint8_t *)cmd->tx_cmd;
338 written = sc->sc_written++;
339 if (written >= cmd->tx_cmd_sz) {
340 data = (uint8_t *)cmd->tx_data;
341 written -= cmd->tx_cmd_sz;
344 cs = BCM_SPI_READ(sc, SPI_CS) & (SPI_CS_TA | SPI_CS_TXD);
352 uint32_t cs, read;
355 cmd = sc->sc_cmd;
356 cs = BCM_SPI_READ(sc, SPI_CS) & SPI_CS_RXD;
357 while (sc->sc_read < sc->sc_len && cs == SPI_CS_RXD) {
358 data = (uint8_t *)cmd->rx_cmd;
359 read = sc->sc_read++;
360 if (read >= cmd->rx_cmd_sz) {
361 data = (uint8_t *)cmd->rx_data;
362 read -= cmd->rx_cmd_sz;
365 cs = BCM_SPI_READ(sc, SPI_CS) & SPI_CS_RXD;
378 if ((sc->sc_flags & BCM_SPI_BUSY) == 0) {
383 /* TX - Fill up the FIFO. */
386 /* RX - Drain the FIFO. */
390 if (sc->sc_written == sc->sc_len && sc->sc_read == sc->sc_len) {
392 if ((sc->sc_flags & BCM_SPI_KEEP_CS) == 0) {
396 wakeup(sc->sc_dev);
406 uint32_t cs, mode, clock;
411 KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz,
413 KASSERT(cmd->tx_data_sz == cmd->rx_data_sz,
418 spibus_get_cs(child, &cs);
419 if ((cs & (~SPIBUS_CS_HIGH)) > 2) {
421 "Invalid chip select %u requested by %s\n", cs,
444 if (sc->sc_thread != curthread)
445 while (sc->sc_flags & BCM_SPI_BUSY)
446 mtx_sleep(dev, &sc->sc_mtx, 0, "bcm_spi", 0);
449 sc->sc_flags = BCM_SPI_BUSY;
451 if ((cmd->flags & SPI_FLAG_KEEP_CS) != 0)
452 sc->sc_flags |= BCM_SPI_KEEP_CS;
455 if (sc->sc_thread != curthread)
460 sc->sc_thread = curthread;
463 sc->sc_cmd = cmd;
464 sc->sc_read = 0;
465 sc->sc_written = 0;
466 sc->sc_len = cmd->tx_cmd_sz + cmd->tx_data_sz;
470 * Assign CS polarity first, while the CS indicates 'inactive'.
471 * This will need to set the correct polarity bit based on the 'cs', and
475 if((cs & ~SPIBUS_CS_HIGH) == 0) {
478 ((cs & (SPIBUS_CS_HIGH)) ? SPI_CS_CSPOL0 : 0));
480 else if((cs & ~SPIBUS_CS_HIGH) == 1) {
483 ((cs & (SPIBUS_CS_HIGH)) ? SPI_CS_CSPOL1 : 0));
485 else if((cs & ~SPIBUS_CS_HIGH) == 2) {
488 ((cs & (SPIBUS_CS_HIGH)) ? SPI_CS_CSPOL2 : 0));
494 * This must happen before CS output pin is active.
503 * Set the clock divider in 'SPI_CLK - see 'bcm_spi_clock_proc()'.
509 clock = 2;
510 else if (clock % 2)
511 clock--;
518 * Set the CS for this transaction, enable interrupts and announce
523 (cs & (~SPIBUS_CS_HIGH)) | /* cs is the lower 2 bits of the reg */
527 err = mtx_sleep(dev, &sc->sc_mtx, 0, "bcm_spi", hz * 2);
530 if (!(cmd->flags & SPI_FLAG_KEEP_CS)) {
533 sc->sc_thread = 0;
537 sc->sc_flags &= ~BCM_SPI_BUSY;
546 device_printf(sc->sc_dev, "SPI error (timeout)\n");