Lines Matching +full:msi +full:- +full:base +full:- +full:spi
1 /*-
48 #define ERR_NOT_IN_MAP -1
66 {"annapurna-labs,al-msix", true},
67 {"annapurna-labs,alpine-msix", true},
120 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
123 device_set_desc(dev, "Annapurna-Labs MSI-X Controller");
146 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
147 if (sc->res == NULL) {
152 sc->base_addr = (bus_addr_t)rman_get_start(sc->res);
154 /* Register this device to handle MSI interrupts */
156 device_printf(dev, "could not register MSI-X controller\n");
160 device_printf(dev, "MSI-X controller registered\n");
165 device_printf(dev, "No interrupt-parrent found. "
169 /* While at parent - store interrupt cells prop */
171 "#interrupt-cells", &icells, sizeof(icells)) == -1) {
172 device_printf(dev, "DTB: Missing #interrupt-cells "
183 sc->gic_dev = gic_dev;
202 sc->irq_min = interrupts[0];
203 sc->irq_max = interrupts[1];
204 sc->irq_count = (sc->irq_max - sc->irq_min + 1);
206 if (sc->irq_count > MAX_MSIX_COUNT) {
207 device_printf(dev, "Available MSI-X count exceeds buffer size."
209 sc->irq_count = MAX_MSIX_COUNT;
212 mtx_init(&sc->msi_mtx, "msi_mtx", NULL, MTX_DEF);
214 sc->irq_alloc = vmem_create("Alpine MSI-X IRQs", 0, sc->irq_count,
217 device_printf(dev, "MSI-X SPI IRQ %d-%d\n", sc->irq_min, sc->irq_max);
231 if (sc->isrcs[i] == isrc)
241 int i, spi;
249 spi = sc->irq_min + i;
253 * [63:20] - MSIx TBAR
254 * Same value as the MSIx Translation Base Address Register
255 * [19] - WFE_EXIT
258 * [18:17] - Target GIC ID
259 * Specifies which IO-GIC (external shared GIC) is targeted
261 * 1: IO-GIC 0
264 * [16:13] - Local GIC Target List
272 * [12:3] - SPIn
273 * Specifies the SPI (Shared Peripheral Interrupt) index to
276 * If targeting any local GIC than only SPI[249:0] are valid
277 * [2] - Function vector
278 * MSI Data vector extension hint
279 * [1:0] - Reserved
282 *addr = (uint64_t)sc->base_addr + (uint64_t)((1 << 16) + (spi << 3));
286 device_printf(dev, "MSI mapping: SPI: %d addr: %jx data: %x\n",
287 spi, (uintmax_t)*addr, *data);
306 if (vmem_alloc(sc->irq_alloc, count, M_FIRSTFIT | M_NOWAIT,
313 fdt_data->hdr.type = INTR_MAP_DATA_FDT;
314 fdt_data->iparent = 0;
315 fdt_data->ncells = GIC_INTR_CELL_CNT;
316 fdt_data->cells[0] = AL_SPI_INTR; /* code for SPI interrupt */
317 fdt_data->cells[1] = 0; /* SPI number (uninitialized) */
318 fdt_data->cells[2] = AL_EDGE_HIGH; /* trig = edge, pol = high */
320 mtx_lock(&sc->msi_mtx);
323 fdt_data->cells[1] = sc->irq_min + i;
324 error = PIC_MAP_INTR(sc->gic_dev,
328 sc->isrcs[j] = NULL;
329 mtx_unlock(&sc->msi_mtx);
330 vmem_free(sc->irq_alloc, irq_base, count);
335 sc->isrcs[i] = *srcs;
339 mtx_unlock(&sc->msi_mtx);
344 "MSI-X allocation: start SPI %d, count %d\n",
345 (int)irq_base + sc->irq_min, count);
347 *pic = sc->gic_dev;
361 mtx_lock(&sc->msi_mtx);
364 vmem_free(sc->irq_alloc, pos, count);
368 sc->isrcs[pos] = NULL;
372 mtx_unlock(&sc->msi_mtx);