Lines Matching +full:per +full:- +full:peripheral

42 system provides a uniform, modular and architecture-independent
48 .Bl -bullet -offset indent
50 architecture-independent macros or functions to access parallel ports
57 with kernel-in drivers.
61 and non-standard software:
63 .Bl -column "Driver" -compact
66 .It Sy pps Ta "Pulse per second Timing Interface"
67 .It Sy lpbb Ta "Philips official parallel port I2C bit-banging interface"
73 .Bl -column "Driver" -compact
86 parallel port bus, then initialize it and upper peripheral device drivers.
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104 bidirectional 8/4-bits mode, also called NIBBLE mode
126 printer or peripheral.
130 In this mode, outputs are 8-bits long.
136 any transfer is 8-bits long.
142 adapter and the peripheral.
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168 operate at close to the same performance levels as an equivalent ISA plug-in
175 peripheral vendors may implement protocol handshake with the following
178 with your peripheral, allowing the peripheral to request more data, stop the
181 At any time, the peripheral may interrupt the host with the nAck signal without
188 .Sh IEEE1284-1994 Standard
191 Bidirectional Parallel Peripheral Interface for Personal Computers".
196 also specifies a format for a peripheral identification string and a method of
207 The computer acts as master and the peripheral as slave.
215 it is supported by the peripheral, then to enter one of the forward idle
222 host must have previously negotiated to permit the peripheral to
227 But peripheral requests are only a hint to the master host.
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259 share the parallel port bus among the daisy-chain like connected devices
263 propose an arch-independent interface to access the hardware layer.
268 layer gathers the parallel peripheral device drivers.
280 This architecture should support IEEE1284-1994 modes.
290 ppbus attachment tries to detect any PnP parallel peripheral (according to
292 draft from (c)1993-4 Microsoft Corporation)
319 is a general purpose mechanism to allow fast low-level
322 standard (in IEEE1284 modes) or non-standard transfers.