Lines Matching +full:bus +full:- +full:width
30 .Nd generic PCI/PCIe bus driver
32 To compile the PCI bus driver into the kernel,
35 .Bd -ragged -offset indent
40 .Pq SR-IOV :
41 .Bd -ragged -offset indent
45 To compile in support for native PCI-express HotPlug:
46 .Bd -ragged -offset indent
91 or a BAR read access could have function-specific side-effects.
113 driver also includes support for PCI-PCI bridges,
114 various platform-specific Host-PCI bridges,
126 .Bl -tag -width 012345678901234
147 .Bl -tag -width match_buf_len
149 The length, in bytes, of the buffer filled with user-supplied patterns.
151 The number of user-supplied patterns.
153 Pointer to a buffer filled with user-supplied patterns.
162 .Bl -tag -width pd_vendor
165 domain, bus, slot and function.
203 .Bl -tag -width pc_subvendor
206 domain, bus, slot and function.
264 .Bl -ohang
302 configuration registers specified by the passed-in
308 .Bl -tag -width pi_width
312 structure which specifies the domain, bus, slot and function the user would
314 If the specific bus is not found, errno will be set to ENODEV and -1 returned
321 The width, in bytes, of the data the user would like to read.
324 3-byte reads and reads larger than 4 bytes are
326 If an invalid width is passed, errno will be set to EINVAL.
335 configuration registers specified in the passed-in
341 The limitations on data width described for
350 device specified in the passed-in
370 the memory-mapped PCI BAR into its address space.
374 .Bl -tag -width Vt struct pcise pbm_sel
404 Regular memory-like BAR should be mapped with
410 .Bl -tag -width PCIIO_BAR_MMAP_ACTIVATE
423 Without the flag, read-only mapping is established.
424 Note that it is common for the device registers to have side-effects
438 .Bl -tag
453 1-byte, 2-byte, 4-byte and 8-byte perations are supported.
476 tunable to a non-zero value.
477 .Bl -tag -width indent
479 Ignore any firmware-assigned memory and I/O port resources.
485 Ignore any firmware-assigned bus number registers in PCI-PCI bridges.
488 bus driver and PCI-PCI bridge driver to allocate bus numbers for secondary
489 buses behind PCI-PCI bridges.
491 Ignore any firmware-assigned memory and I/O port resource windows in PCI-PCI
493 This forces the PCI-PCI bridge driver to allocate memory and I/O port resources
496 By default the PCI-PCI bridge driver will allocate windows that
497 contain the firmware-assigned resources devices behind the bridge.
498 In addition, the PCI-PCI bridge driver will suballocate from existing window
505 must be enabled to fully ignore firmware-supplied resource assignments.
506 .It Va hw.pci.default_vgapci_unit Pq Defaults to -1
520 .Bl -tag -width indent
546 up non-powered PCI devices after a suspend.
555 Enable support for PCI-express Alternative RID Interpretation.
556 This is often used in conjunction with SR-IOV.
559 firmware-assigned memory or I/O port resources.
564 This enables decoding for such resources during bus probe.
571 .Pq MSI-X .
572 MSI-X interrupts can be disabled by setting this tunable to 0.
574 Enable support for PCI-express Electromechanical Interlock.
576 Enable support for native PCI-express HotPlug.
578 MSI and MSI-X interrupts are disabled for certain chipsets known to have
579 broken MSI and MSI-X implementations when this tunable is set.
580 It can be set to zero to permit use of MSI and MSI-X interrupts if the
584 used when creating Virtual Functions via SR-IOV.
589 for any memory or I/O port resources with firmware-assigned ranges that
603 .Bl -tag -width indent
609 The bus address of the PCI device in decimal.
637 .Bl -tag -width -indent
644 The bus address of the PCI device in decimal.
667 at PCI bus 14 slot 0 function 0,
671 card at PCI bus 6 slot 0 function 0,
680 .Bl -tag -width /dev/pci -compact
696 Support for device listing and matching was re-implemented by