Lines Matching +full:clock +full:- +full:measure
5 .\" ----------------------------------------------------------------------------
6 .\" "THE BEER-WARE LICENSE" (Revision 42):
9 .\" this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
10 .\" ----------------------------------------------------------------------------
16 .A "Poul-Henning Kamp" "The FreeBSD Project"
18 The FreeBSD timecounters are an architecture-independent implementation
21 multiplication to canonical timescales based on micro- or nano-seconds
22 and can interface seamlessly to the NTP PLL/FLL facilities for clock
23 synchronisation. Timecounters are implemented using lock-less
24 stable-storage based primitives which scale efficiently in SMP
47 On the other hand, it took a long time for a real time clock to
71 can measure with the highest precision of all physical quantities.
79 While it is possible to measure time by means other than oscillations,
80 for instance transport or consumption of a substance at a well-known
90 sun-dial Earths rotation about its axis.
94 atomic Quantum-state transitions in atoms.
97 We can therefore with good fidelity define ``a clock'' to be the
108 with an error less than �2 cdot 10 sup{-15}� [DMK2001] with commercially
109 available products doing better than �1 cdot 10 sup{-14}� [AG2002].
113 from putting a stake in the ground, so to speak, and measure from
137 Earth. This resulted in time-intervals being very unwieldy business,
140 Eventually the new leap-second method were introduced in 1972.
149 UTC is defined basically the same way, but every so often a leap-second
157 reporting to the BIPM in Paris who calculate the ``paper clock'' which
161 and measurement company formerly known as ``Hewlett-Packard'') which
165 custom-design units like the PTB2 and NIST7.
172 The perceived wisdom of leap-seconds have been gradually decreasing
173 in recent years, as devices and products with built-in calendar
181 as the count of standard seconds since 00:00:00 01-01-1970 UTC,
182 ignoring the leap-seconds. This definition has never been perceived
193 deficiency by transmitting the UTC-TAI offset as part of the protocol.
197 ``timespec''. Both of these formats are two-component structures
206 t3.tv_sec = t1.tv_sec - t2.tv_sec;
207 t3.tv_nsec = t1.tv_nsec -
211 t3.tv_nsec -= 1000000000;
213 t3.tv_sec--;
221 increasingly uncomfortable situation that CPU clock periods and
236 very distinct and well defined properties of a clock.
238 Resolution in clocks is simply a matter of the step-size of the
243 Precision talks about how close to the intended rate the clock runs,
245 size of the smallest timeinterval we can measure.
264 representation as the diameter of the bullet-hole is not correct,
267 gets too quantum-mechanical-oid to serve the instructional purpose.
275 On the x-axis we have time and on the y-axis how wrong the clock
284 one can see from the graphic above, a stable clock which is not
286 is as good as any clock.
289 devices, once you get into the �10 cdot 10 sup{-15}� territory
295 This particularly becomes an issue with space-based atomic standards
329 The NTP kernel PLL/FLL code allows the local clock and timescale
338 with external clock or frequency hardware, but it has many other
350 mostly a question of the resolution and steer-ability requirements.
365 But timecounters also need to represent the clock period of the
366 chosen hardware and this hardware might be the GHz range CPU-clock.
367 The list of clock frequencies we could support with 32 bits are:
375 �2 sup{32} / (2 sup{32}-1)� �=� 1.000 Hz
378 represent clock frequencies even in the low GHz area, much less in
392 �2 sup{64} / (2 sup{64}-1)� �=� 1.000 Hz
411 timespec formats is that it is a binary number, not a pseudo-decimal
427 u = bt1->frac;
428 bt3->frac = bt1->frac + bt2->frac;
429 bt3->sec = bt1->sec + bt2->sec;
430 if (u > bt3->frac)
431 bt3->sec += 1;
446 ts->tv_sec = bt->sec;
447 ts->tv_nsec =
449 (uint32_t)(bt->frac >> 32)) >> 32;
460 bt->sec = ts->tv_sec;
463 bt->frac = ts->tv_nsec *
522 The delta-count operation is straightforward subtraction, but we
523 need to logically AND the result with a bit-mask with the same number
529 Delta Count = (Count sub{now} - Count sub{ref}) ~ BITAND ~ mask
550 Delta Count = (Count sub{now} - Count sub{ref}) ~ BITAND ~ mask
589 This quasi-decimal number is a bit of a square peg in our round binary
600 within an factor of a million of the �10 sup{-15}� performance level
606 In this case the correction may be as large as \(+- 5000 PPM which
607 leaves us room to multiply with about 850 in a multiply-before-divide
614 A divide-before-multiply approximation necessarily results in a loss
624 of the requested change, or �1.06 cdot 10 sup -14� per nanosecond
679 has enough bits to not roll over and that our clock frequency is
688 This would however be a very heavy-handed approach. First of
696 A pseudo-stable-storage with generation count method has been
712 meta-data.
715 This scheme has an inherent risk that a process may be de-scheduled for
731 gen = th->th_generation;
734 gen != th->th_generation);
766 instruction(-sequence).
779 The problem with this device is that it only has 8bit bus-width,
784 Obviously, on multi-CPU systems this cannot be done without some
814 The next kind of hardware support to materialise was the ``CPU clock
815 counter'' called ``TSC'' in official data-sheets.
816 This is basically a on-CPU counter, which counts at the rate
817 of the CPU clock.
820 precisely proportional with the clock frequency for the
824 CPU clock to match computing demand in order to minimise the power
839 Another wiggle for the TSC is that it is not usable on multi-CPU
846 run synchronously (ie: at the same rate) because the CPU clock frequency
857 The reason for this odd-ball frequency has to be sought in the ghastly
867 have failed to provide latching suitable to avoid meta-stability
874 latched by examining the width of a histogram over read delta-values.
881 to determine which piece of hardware is best suited for clock
884 One example of this is the Loran-C receiver designed by Prof. Dave Mills
887 implements the software-half of the receiver has properly initialised
888 and locked onto a Loran-C signal.
914 a precision of \(+- 10 nanoseconds \(+- one count which in practice
915 averages out to roughly \(+- 15 nanoseconds\**:
919 a clock with a roughly 55 nanosecond period and then predicts in
938 In both cases, the computers clock frequency controlled
957 The source-code is located almost entirely in the kernel source file
966 open source license or the even more free ``Beer-ware'' license.
985 Various micro-optimizations, mostly to compensate for inadequate
1003 NTP, for lending out the neglected twin Loran-C receiver and for
1013 The staff at the NELS Loran-C control station in B�, Norway for providing
1014 information about step-changes.
1016 The staff at NELS Loran-C station Ei�e, Faeroe
1037 Poul-Henning Kamp
1041 "A computer-controlled LORAN-C receiver for precision timekeeping."
1043 Electrical Engineering Department Report 92-3-1, University of Delaware, March 1992, 63 pp.
1046 …ime and Time Interval (PTTI) Applications and Planning Meeting (Reston VA, November 2000), 431-439.
1050 Mills, D.L., and P.-H. Kamp.
1051 …ime and Time Interval (PTTI) Applications and Planning Meeting (Reston VA, November 2000), 423-430.
1066 This ``gee-wiz'' kind of article in Dr. Dobbs Journal is a good place to