Lines Matching full:dram

474 Counts cycles all the entries in the DRAM channel 0 high priority queue are
478 Counts cycles all the entries in the DRAM channel 1 high priority queue are
482 Counts cycles all the entries in the DRAM channel 2 high priority queue are
486 Counts cycles all the entries in the DRAM channel 0 high priority queue are
490 Counts cycles all the entries in the DRAM channel 1 high priority queue are
494 Counts cycles all the entries in the DRAM channel 2 high priority queue are
499 read request to DRAM channel 0.
503 read request to DRAM channel 1.
507 read request to DRAM channel 2.
511 write request to DRAM channel 0.
515 write request to DRAM channel 1.
519 write request to DRAM channel 2.
601 Counts number of full cache line writes to DRAM channel 0.
604 Counts number of full cache line writes to DRAM channel 1.
607 Counts number of full cache line writes to DRAM channel 2.
610 Counts number of full cache line writes to DRAM.
613 Counts number of partial cache line writes to DRAM channel 0.
616 Counts number of partial cache line writes to DRAM channel 1.
619 Counts number of partial cache line writes to DRAM channel 2.
622 Counts number of partial cache line writes to DRAM.
625 Counts number of DRAM channel 0 cancel requests.
628 Counts number of DRAM channel 1 cancel requests.
631 Counts number of DRAM channel 2 cancel requests.
634 Counts number of DRAM cancel requests.
637 Counts number of DRAM channel 0 priority updates.
645 Counts number of DRAM channel 1 priority updates.
652 Counts number of DRAM channel 2 priority updates.
659 Counts number of DRAM priority updates.
666 Counts number of IMC DRAM channel 0 retries.
667 DRAM retry only occurs when configured in RAS mode.
670 Counts number of IMC DRAM channel 1 retries.
671 DRAM retry only occurs when configured in RAS mode.
674 Counts number of IMC DRAM channel 2 retries.
675 DRAM retry only occurs when configured in RAS mode.
678 Counts number of IMC DRAM retries from any channel.
679 DRAM retry only occurs when configured in RAS mode.
872 Counts number of DRAM Channel 0 open commands issued either for read or write.
873 To read or write data, the referenced DRAM page must first be opened.
876 Counts number of DRAM Channel 1 open commands issued either for read or write.
877 To read or write data, the referenced DRAM page must first be opened.
880 Counts number of DRAM Channel 2 open commands issued either for read or write.
881 To read or write data, the referenced DRAM page must first be opened.
884 DRAM channel 0 command issued to CLOSE a page due to page idle timer expiration.
888 DRAM channel 1 command issued to CLOSE a page due to page idle timer expiration.
892 DRAM channel 2 command issued to CLOSE a page due to page idle timer expiration.
896 Counts the number of precharges (PRE) that were issued to DRAM channel 0
904 Counts the number of precharges (PRE) that were issued to DRAM channel 1
912 Counts the number of precharges (PRE) that were issued to DRAM channel 2
920 Counts the number of times a read CAS command was issued on DRAM channel 0.
923 Counts the number of times a read CAS command was issued on DRAM channel 0
927 Counts the number of times a read CAS command was issued on DRAM channel 1.
930 Counts the number of times a read CAS command was issued on DRAM channel 1
934 Counts the number of times a read CAS command was issued on DRAM channel 2.
937 Counts the number of times a read CAS command was issued on DRAM channel 2
941 Counts the number of times a write CAS command was issued on DRAM channel 0.
944 Counts the number of times a write CAS command was issued on DRAM channel 0
948 Counts the number of times a write CAS command was issued on DRAM channel 1.
951 Counts the number of times a write CAS command was issued on DRAM channel 1
955 Counts the number of times a write CAS command was issued on DRAM channel 2.
958 Counts the number of times a write CAS command was issued on DRAM channel 2
962 Counts number of DRAM channel 0 refresh commands.
963 DRAM loses data content over time.
968 Counts number of DRAM channel 1 refresh commands.
969 DRAM loses data content over time.
973 Counts number of DRAM channel 2 refresh commands.
974 DRAM loses data content over time.
978 Counts number of DRAM Channel 0 precharge-all (PREALL) commands that close
980 PREALL is issued when the DRAM needs to be refreshed or needs to go into a power down mode.
983 Counts number of DRAM Channel 1 precharge-all (PREALL) commands that close
985 PREALL is issued when the DRAM needs to be refreshed or needs to go into a power down mode.
988 Counts number of DRAM Channel 2 precharge-all (PREALL) commands that close
990 PREALL is issued when the DRAM needs to be refreshed or needs to go into a power down mode.
993 Uncore cycles DRAM was throttled due to its temperature being above the